Smart Transducer Networks

Transcription

1 Smart Transducer Networks Wilfried Elmenreich Bernhard Huber Implementation Requirements 2 Definition A smart transducer is the integration of an analog or digital sensor or actuator element, a processing unit, and a communication interface. Physical Transducer Smart Transducer MCU Network Interface Digital Communication System Motivation Sensor/Actuators become more complex (e.g. providing various modes of interfacing, operation...) Requirement for fault-tolerant and distributed systems -> networked sensors and actuators Embedded microcontrollers can handle complexity at a fair price Cheap mass-production of flexible general purpose smart transducers 3 4 Design Principles for ST (1) Two-Level Design Approach Node level: Transducer developer handles sensor- and actuator-specific details Functionality of transducer is exported via well-specified interface System level: System integrator can handle node as black boxes and build on exported services Composability principle guarantees that services, which are established at node level are maintained at system level Design Principles for ST (2) Real-Time Service Knowledge about the exact instant of an event Predictable timing with low jitter (control loops) Guaranteed timing behavior under load and fault hypotheses 5 6 1

2 Design Principles for ST (3) Diagnosis & Management Support Design Principles for ST (4) Configuration & Planning Support Diagnosis access to ST internals Not necessarily real-time capable Monitoring support without a probe effect on real-time service Machine-readable description of ST properties Automated configuration saves time Required qualification of personal can be lower Fewer configuration faults, since monotone and error-prone tasks are done by computer 7 8 Three Interfaces of a Node SPLIF Service Providing Linking Interface SRLIF Service Requesting Linking Interface Implementation Requirements 9 10 TTP/A Protocol (1) TTP/A Protocol (2) One active master per cluster Up to 250 slaves Communication organized in rounds TDMA bus allocation For details see: TTP/A Smart Transducer Programming A Beginner s Guide Available at: ( Publication & Research Reports

3 Interface File System (IFS) (1) hierarchical distributed data structure source and sink of each communication Unique addressing scheme: Cluster (0..255) Node (0..255) File (0..63) Record (0..255) Byte (0..3) IFS maps all relevant properties (sensor and actuator data, calibration parameters, configuration data, serial number, ) Interface File System (IFS) (2) Header Record First record of each file contains status information (access permissions, file length, etc) Special Files Documentation file: physical name of node (similar to MAC address) Configuration file: logical name of the node, current fireworks-byte, epoch-counter etc. Round Descriptor List (RODL): holds information about actions performed by a node for a particular round Round Sequence file (ROSE): specifies sequence of rounds, only implemented in the TTP/A master Round Types Master-slave round: Master accesses a record by broadcasting its IFS address and a tag indicating operation (read, write, ) MSA and MSD part Multipartner round: TDMA communication is predefined by RODL Up to 6 different modes (predefined schedules) Common Communication and Action Schedule slot node A Send Receive Receive Execute B Receive Send Receive Send C Receive Receive Send Receive D Receive Receive Execute Receive Round Description List (RODL) For each slot in each round: Operation (receive, send, receive and synchronize clock, execute) Data source/sink (IFS address + message length) Each node has its own RODL (part of a big picture ) RODL must be consistently defined over all nodes RODL itself is accessible via IFS Realization of Three Interfaces (1) Real-Time Service (RS): Multipartner rounds Configuration and Planning (CP) Interface Master-Slave rounds accessing RODL Diagnostic and Maintenance (DM) Interface Master-Slave Rounds during operation

4 Realization of Three Interface (2) TTP/A Example SRLIF SPLIF RS Interface: I/O file realizes Service Requestung Linking Interface (SRLIF) and Service Providing Linking Interface (SPLIF) CP Interface: access via RODL DM Interface: local data of individual TTP/A tasks (stored in service file) Three TTP/A nodes Node 0 is the TTP/A master (synchronization of slaves via fireworks byte) Node 3 executes in slot 0x03 a counter and broadcasts the actual value in slot 0x01 Node 2 receives the counter value in slot 0x01 and displays the new value in slot 0x03 (also by executing a TTP/A task) Inter-round gap (end of round) in slot 0x07 In the following the code of node 3 is illustrated The example is available on the Lab homepage TTP/A Example: IFS Layout TTP/A Example: RODL Layout TTP/A specific include files e.g. IFS access macros name of the IFS file for the application (suggested range 0x30 to 0x3d) memory section for IFS storage (ifs_int_eep EEPROM) (ifs_int_0 zero initialized SRAM) layout of the application file IFS address signed 8-bit int value for incr. value unsigned 8-bit value for error code declaration of TTP/A task TTP/A specific include files e.g. IFS access macros layout of the RODL (for node 3 only) RODL filename (0x00 to 0x07); length of RODL; memory section for storage (EEPROM) operation: send slot: 0x01 IFS addr: I/O file record 0x01, byte 0 length: 1 (len 1 is stored) operation: execute slot: 0x01 IFS addr: specifies the task to execute end of round: slot 0x TTP/A Example: Node Source-Code application file with initialization pointer to I/O file = I/O file increment value = 1; error flag = 0 I/O file parameters for file definition: file number, variable name, TTPA/task, file length, memory section, and access mode code for TTP/A task code for initialization function TTP/A Implementation / Case Study adding an initialization function: task handle, function pointer to task, order, execution states adding a background task is similar

5 Architectural Requirements Case Study Hardware Standard UART (may be also a software UART) About 2KB ROM for protocol code About 32 byte RAM for protocol-specific variables (e.g., RODL memory) Supports any serial bus PCMCIA Master/Gateway Atmel AVR TTP/A nodes Case Study Software RODL design tool Written in Java => Platform-independent Connects to cluster via CORBA interface Monitoring tool Displays contents of node s IFS Refreshes data periodically Connects directly via RS232 Important for lab course TTP/A Implementation / Case Study OMG Smart Transducer Standard Example Architecture Specifies a CORBA interface for accessing the IFS contents of a TTP/A cluster remotely Specifies IFS addressing scheme Specifies real-time communication CORBA can be used for configuration and monitoring Access to real-time service interface possible, when a RT-CORBA is used

6 Conclusion Design Principles Implementation Requirements Two-level design for ST applications Node level: transducer details System level: integration to overall system TTP/A: Master/Slave protocol supporting periodic real-time traffic and sporadic diagnostic and management communication Low-cost, highly-efficient (no addressing overhead) Standardized CORBA interface supports remote tool access