Embedded and Real-Time Operating Systems

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1 Embedded and Real-Time Operating Systems

2 K.C. Wang Embedded and Real-Time Operating Systems 123

3 K.C. Wang School of Electrical Engineering and Computer Science Washington State University Pullman, WA USA ISBN ISBN (ebook) DOI / Library of Congress Control Number: Springer International Publishing AG 2017 This work is subject to copyright. All rights are reserved by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed. The use of general descriptive names, registered names, trademarks, service marks, etc. in this publication does not imply, even in the absence of a specific statement, that such names are exempt from the relevant protective laws and regulations and therefore free for general use. The publisher, the authors and the editors are safe to assume that the advice and information in this book are believed to be true and accurate at the date of publication. Neither the publisher nor the authors or the editors give a warranty, express or implied, with respect to the material contained herein or for any errors or omissions that may have been made. The publisher remains neutral with regard to jurisdictional claims in published maps and institutional affiliations. Printed on acid-free paper This Springer imprint is published by Springer Nature The registered company is Springer International Publishing AG The registered company address is: Gewerbestrasse 11, 6330 Cham, Switzerland

4 Dedicated to Cindy

5 Preface Since the publication of my first book on the Design and Implementation of the MTX Operating System by Springer in 2015, I have received inquiries from many enthusiastic readers about how to run the MTX OS on their ARM based mobile devices, such as ipods or iphones, etc. which motivated me to write this book. The purpose of this book is to provide a suitable platform for teaching and learning the theory and practice of embedded and real-time operating systems. It covers the basic concepts and principles of operating systems, and it shows how to apply them to the design and implementation of complete operating systems for embedded and real-time systems. In order to do these in a concrete and meaningful way, it uses the ARM toolchain for program development, and it uses ARM virtual machines to demonstrate the design principles and implementation techniques. Due to its technical contents, this book is not intended for entry-level courses that teach only the concepts and principles of operating systems without any programming practice. It is intended for technically oriented Computer Science/Engineering courses on embedded and real-time systems that emphasize both theory and practice. The book s evolutional style, coupled with detailed source code and complete working sample systems, make it especially suitable for self-study. Undertaking this book project has proved to be yet another very demanding and time-consuming endeavor, but I enjoyed the challenges. While preparing the book manuscripts for publication, I have been blessed with the encouragements and helps from numerous people, including many of my former TaiDa EE60 classmates. I would like to take this opportunity to thank all of them. I am also grateful to Springer International Publishing AG for allowing me to disclose the source code of this book to the public for free, which are available at for download. Special thanks go to Cindy for her continuing support and inspirations, which have made this book possible. Last but not least, I would like to thank my family again for bearing with me with endless excuses of being busy all the time. Pullman, WA October, 2016 K.C. Wang vii

6 Contents 1 Introduction About This Book Motivations of This Book Objective and Intended Audience Unique Features of This Book Book Contents Use This Book as a Textbook for Embedded Systems Use This Book as a Textbook for Operating Systems Use This Book for Self-study References ARM Architecture and Programming ARM Processor Modes ARM CPU Registers General Registers Status Registers Change ARM Processor Mode Instruction Pipeline ARM Instructions Condition Flags and Conditions Branch Instructions Arithmetic Operations Comparison Operations Logical Operations Data Movement Operations Immediate Value and Barrel Shifter Multiply Instructions LOAD and Store Instructions Base Register Block Data Transfer Stack Operations Stack and Subroutines Software Interrupt (SWI) PSR Transfer Instructions Coprocessor Instructions ARM Toolchain ARM System Emulators ARM Programming ARM Assembly Programming Example ARM Assembly Programming Example Combine Assembly with C Programming ix

7 x Contents 2.8 Device Drivers System Memory Map GPIO Programming UART Driver for Serial I/O Color LCD Display Driver Summary References Interrupts and Exceptions Processing ARM Exceptions ARM Processor Modes ARM Exceptions Exceptions Vector Table Exception Handlers Return from Exception Handlers Interrupts and Interrupts Processing Interrupt Types Interrupt Controllers Primary and Secondary Interrupt Controllers Interrupt Processing Vector Table Contents Hardware Interrupt Sequence Interrupts Control in Software Interrupt Handlers Non-nested Interrupt Handler Timer Driver ARM Versatile 926EJS Timers Timer Driver Program Keyboard Driver ARM PL050 Mouse-Keyboard Interface Keyboard Driver Interrupt-Driven Driver Design Keyboard Driver Program UART Driver ARM PL011 UART Interface UART Registers Interrupt-Driven UART Driver Program Secure Digital (SD) Cards SD Card Protocols SD Card Driver Improved SDC Driver Multi-sector Data Transfer Vectored Interrupts ARM PL190 Vectored Interrupts Controller (VIC) Configure VIC for Vectored Interrupts Vectored Interrupts Handlers Demonstration of Vectored Interrupts Nested Interrupts Why Nested Interrupts Nested Interrupts in ARM Handle Nested Interrupts in SYS Mode Demonstration of Nested Interrupts

8 Contents xi 3.10 Nested Interrupts and Process Switch Summary References Models of Embedded Systems Program Structures of Embedded Systems Super-Loop Model Super-Loop Program Examples Event-Driven Model Shortcomings of Super-Loop Programs Events Periodic Event-Driven Program Asynchronous Event-Driven Program Event Priorities Process Models Uniprocessor Process Model Multiprocessor Process Model Real Address Space Process Model Virtual Address Space Process Model Static Process Model Dynamic Process Model Non-preemptive Process Model Preemptive Process Model Uniprocessor (UP) Kernel Model Uniprocessor (UP) Operating System Model Multiprocessor (MP) System Model Real-Time (RT) System Model Design Methodology of Embedded System Software High-Level Language Support for Event-Driven Programming State Machine Model StateChart Model Summary References Process Management in Embedded Systems Multitasking The Process Concept Multitasking and Context Switch A Simple Multitasking Program Context Switching Demonstration of Multitasking Dynamic Processes Dynamic Process Creation Demonstration of Dynamic Processes Process Scheduling Process Scheduling Terminology Goals, Policy and Algorithms of Process Scheduling Process Scheduling in Embedded Systems Process Synchronization Sleep and Wakeup Device Drivers Using Sleep/Wakeup

9 xii Contents 5.7 Event-Driven Embedded Systems Using Sleep/Wakeup Demonstration of Event-Driven Embedded System Using Sleep/Wakeup Resource Management Using Sleep/Wakeup Shortcomings of Sleep/Wakeup Semaphores Applications of Semaphores Semaphore Lock Mutex lock Resource Management using Semaphore Wait for Interrupts and Messages Process Cooperation Advantages of Semaphores Cautions of Using Semaphores Use Semaphores in Embedded Systems Other Synchronization Mechanisms Event Flags in OpenVMS Event Variables in MVS ENQ/DEQ in MVS High-Level Synchronization Constructs Condition Variables Monitors Process Communication Shared Memory Pipes Signals Message Passing Uniprocessor (UP) Embedded System Kernel Non-preemptive UP Kernel Demonstration of Non-preemptive UP Kernel Preemptive UP Kernel Demonstration of Preemptive UP Kernel Summary References Memory Management in ARM Process Address Spaces Memory Management Unit (MMU) in ARM MMU Registers Accessing MMU Registers Enabling and Disabling the MMU Domain Access Control Translation Table Base Register Domain Access Control Register Fault Status Registers Fault Address Register Virtual Address Translations Translation Table Base Translation Table Level-One Descriptor Translation of Section References

10 Contents xiii 6.7 Translation of Page References Level-1 Page Table Level-2 Page Descriptors Translation of Small Page References Translation of Large Page References Memory Management Example Programs One-Level Paging Using 1 MB Sections Two-Level Paging Using 4 KB Pages One-Level Paging with High VA Space Two-Level Paging with High VA Space Summary Reference User Mode Process and System Calls User Mode Processes Virtual Address Space Mapping User Mode Process User Mode Image System Kernel Supporting User Mode Processes PROC Structure Reset Handler Kernel Code Kernel Compile-Link Script Demonstration of Kernel with User Mode Process Embedded System with User Mode Processes Processes in the Same Domain Demonstration of Processes in the Same Domain Processes with Individual Domains Demonstration of Processes with Individual Domains RAMDisk Creating RAM Disk Image Process Image File Loader Process Management Process Creation Process Termination Process Family Tree Wait for Child Process Termination Fork-Exec in Unix/Linux Implementation of Fork Implementation of Exec Demonstration of Fork-Exec Simple sh for Command Execution vfork Demonstration of vfork Threads Thread Creation Demonstration of Threads Threads Synchronization Embedded System with Two-Level Paging Static 2-Level Paging Demonstration of Static 2-Level Paging Dynamic 2-Level Paging Demonstration of 2-Level Dynamic Paging

11 xiv Contents 7.10 KMH Memory Mapping KMH Using One-Level Static Paging KMH Using Two-Level Static Paging KMH Using Two-Level Dynamic Paging Embedded System Supporting File Systems Create SD Card Image Format SD Card Partitions as File Systems Create Loop Devices for SD Card Partitions Embedded System with SDC File System SD Card Driver Using Semaphore System Kernel Using SD File System Demonstration of SDC File System Boot Kernel Image from SDC SDC Booter Program Demonstration of Booting Kernel from SDC Booting Kernel from SDC with Dynamic Paging Two-Stage Booting Demonstration of Two-Stage Booting Summary References General Purpose Embedded Operating Systems General Purpose Operating Systems Embedded General Purpose Operating Systems Porting Existing GPOS to Embedded Systems Develop an Embedded GPOS for ARM Organization of EOS Hardware Platform EOS Source File Tree EOS Kernel Files Capabilities of EOS Startup Sequence of EOS Process Management in EOS Assembly Code of EOS Kernel Files of EOS Process Management Functions Pipes Message Passing Demonstration of Message Passing Memory Management in EOS Memory Map of EOS Virtual Address Spaces Kernel Mode Pgdir and Page Tables Process User Mode Page Tables Switch Pgdir During Process Switch Dynamic Paging Exception and Signal Processing Signal Processing in Unix/Linux Signal Processing in EOS Signals in PROC Resource Signal Origins in EOS Deliver Signal to Process Change Signal Handler in Kernel

12 Contents xv Signal Handling in EOS Kernel Dispatch Signal Catcher for Execution in User Mode Device Drivers Process Scheduling in EOS Timer Service in EOS File System File Operation Levels File I/O Operations EXT2 File System in EOS Implementation of Level-1 FS Implementation of Level-2 FS Implementation of Level-3 FS Block Device I/O Buffering I/O Buffer Management Algorithm Performance of the I/O Buffer Cache User Interface The INIT Program The Login Program The sh Program Demonstration of EOS EOS Startup Command Processing in EOS Signal and Exception Handling in EOS Summary References Multiprocessing in Embedded Systems Multiprocessing SMP System Requirements ARM MPcore Processors ARM Cortex-A9 MPcore Processor Processor Cores Snoop Control Unit (SCU) Generic Interrupt Controller (GIC) GIC Programming Example Configure the GIC to Route Interrupts Explanations of the GIC Configuration Code Interrupt Priority and Interrupt Mask Demonstration of GIC Programming Startup Sequence of ARM MPcores Raw Startup Sequence Booter Assisted Startup Sequence SMP Booting on Virtual Machines ARM SMP Startup Examples ARM SMP Startup Example Demonstration of SMP Startup Example ARM SMP Startup Example Demonstration of ARM SMP Startup Example Critical Regions in SMP Implementation of Critical Regions in SMP Shortcomings of XCHG/SWAP Operations ARM Synchronization Instructions for SMP

13 xvi Contents 9.9 Synchronization Primitives in SMP Spinlocks Spinlock Example Demonstration of SMP Startup with Spinlock Mutex in SMP Implementation of Mutex Using Spinlock Demonstration of SMP Startup with Mutex Lock Global and Local Timers Demonstration of Local Timers in SMP Semaphores in SMP Applications of Semaphores in SMP Conditional Locking Conditional Spinlock Conditional Mutex Conditional Semaphore Operations Memory Management in SMP Memory Management Models in SMP Uniform VA Spaces Non-uniform VA Spaces Parallel Computing in Non-uniform VA Spaces Multitasking in SMP SMP Kernel for Process Management The ts.s file The t.c file Kernel.c file Device Driver and Interrupt Handlers in SMP Demonstration of Process Management in SMP General Purpose SMP Operating System Organization of SMP_EOS SMP_EOS Source File Tree SMP_EOS Kernel Files Process Management in SMP_EOS Protect Kernel Data Structures in SMP Deadlock Prevention in SMP Adapt UP Algorithms for SMP Device Driver and Interrupt Handlers in SMP SMP_EOS Demonstration System Startup Sequence of SMP_EOS Capabilities of SMP_EOS Demonstration of SMP_EOS Summary References Embedded Real-Time Operating Systems Concepts of RTOS Task Scheduling in RTOS Rate-Monotonic Scheduling (RMS) Earliest-Deadline-First (EDF) Scheduling Deadline-Monotonic Scheduling (DMS) Priority Inversion Priority Inversion Prevention Priority Ceiling Priority Inheritance

14 Contents xvii 10.5 Survey of RTOS FreeRTOS MicroC/OS (µc/os) NuttX VxWorks QNX Real-time Linux Critique of Existing RTOS Design Principles of RTOS Interrupts Processing Task Management Task Scheduling Synchronization Tools Task Communication Memory Management File System Tracing and Debugging Uniprocessor RTOS (UP_RTOS) Task Management in UP_RTOS Task Synchronization in UP_RTOS Task Scheduling in UP_RTOS Task Communication in UP_RTOS Protection of Critical Regions File System and Logging UP_RTOS with Static Periodic Tasks and Round-Robin Scheduling UP_RTOS with Static Periodic Tasks and Preemptive Scheduling UP_RTOS with Dynamic Tasks Sharing Resources Multiprocessor RTOS (SMP_RTOS) SMP_RTOS Kernel for Task Management Adapt UP_RTOS to SMP Nested Interrupts in SMP_RTOS Preemptive Task Scheduling in SMP_RTOS Task Switch by SGI Timesliced Task Scheduling in SMP_RTOS Preemptive Task Scheduling in SMP_RTOS Priority Inheritance Demonstration of the SMP_RTOS System Summary References Index

About the Author K.C. Wang received the BSEE degree from National Taiwan University, in 1960 and the Ph.D. degree in Electrical Engineering from Northwestern University, Evanston, Ill in 1965.

15 About the Author K.C. Wang received the BSEE degree from National Taiwan University, in 1960 and the Ph.D. degree in Electrical Engineering from Northwestern University, Evanston, Ill in He is currently a Professor in the School of Electrical Engineering and Computer Science at Washington State University. His academic interests are in Operating Systems, Distributed Systems and Parallel Computing. xix

Design and Implementation of the MTX Operating System

Design and Implementation of the MTX Operating System K. C. Wang Design and Implementation of the MTX Operating System 1 3 K. C. Wang School of Electrical Engineering and Computer Science Washington State