The Future of NonStop

Transcription

1 The Future of NonStop Mark Pollans WW Sr. Product Manager December 2014

2 What else is happening today HP Discover 2014 Barcelona 2 4 December, 2014 HP Discover is not like any other IT event that I ve been to and HP certainly knows how to put on a magnificent show. Michael Webster 2

3 What took place two weeks ago in San Jose Celebrating Forty Years of NonStop Computing! November 16 th -19 th, 2014 at the Dolce Hayes Mansion, San Jose, California 3

4 Forward-looking statements This is a rolling (up to three year) roadmap and is subject to change without notice. This document contains forward looking statements regarding future operations, product development, product capabilities and availability dates. This information is subject to substantial uncertainties and is subject to change at any time without prior notification. Statements contained in this document concerning these matters only reflect Hewlett Packard's predictions and / or expectations as of the date of this document and actual results and future plans of Hewlett-Packard may differ significantly as a result of, among other things, changes in product strategy resulting from technological, internal corporate, market and other changes. This is not a commitment to deliver any material, code or functionality and should not be relied upon in making purchasing decisions. 4

5 Workload-optimized portfolio for better business outcomes For virtualized and cloud workloads For mission-critical environments HP BladeSystem HP OneView HP ProLiant scale-up DragonHawk HP Integrity blades & Superdome HP Integrity NonStop Convergence to accelerate IT service delivery For Big Data, HPC, and web scalability Common modular compute architecture Availability to function in real-time For core business applications HP ProLiant SL and XL HP Moonshot HP Apollo HP MicroServer HP ProLiant ML HP ProLiant DL Density and efficiency to scale rapidly Intelligence to increase productivity Global support and services Best-in-class partnerships Converged solutions 5.

6 Is your IT mission-critical Continuous Availability: to eliminate downtime High Availability: to minimize downtime HP NonStop systems are AL4 NonStop delivers AL4 AL3 AL2 AL1 Impact of component failure Availability Level 4 Switch to alternate resources is not perceptible to end users Availability Level 3 Short outage is needed for failover to take place Availability Level 2 Balancing may not be perceptible to end-users because of retry Availability Level 1 Need to switch to redundant resources before processing resumes. Source: IDC, September 2012, Doc # Worldwide and U.S. High-Availability Server Forecast and Analysis 6

7 Flexibility to choose your NonStop path Mission-critical your way Longevity with Integrity 3.5 HP Integrity NonStop HP Integrity NonStop MISSION-CRITICAL CONVERGED INFRASTRUCTURE HP NonStop on x86 MISSION-CRITICAL CONVERGED INFRASTRUCTURE 7 This is a rolling (up to three year) Statement of Direction and is subject to change without notice

8 Revolutionizing mission-critical leadership HP Integrity NonStop product line Current 9500 NonStop Entry-class NonStop BladeSystem 9500 Future Future NonStop enterprise Itanium mission-critical platforms Kittson Future NonStop enterprise x86 mission-critical platforms HP Future NonStop x86 product line 100% NonStop x86 NonStop Software and other enhancements SQL/MX NS JSP bit OSS NSASJ (JBoss EJB Container) NSJ 7.0 NSMQ (ActiveMQ) Integration with HP StoreOnce Python support NSASJ GUI Interface Distributed In Memory Cache (Hazelcast) 8 Mission-Critical Support This is a rolling (up to three year) Statement of Direction and is subject to change without notice

9 NonStop on x86 AKA HP Integrity NonStop X A Preview

10 This is a rolling (up to three year) Statement of Direction and is subject to change without notice NonStop on x86 product preview Future Expands the HP NonStop product family Intel Xeon x86 microprocessor Half-height blades - more CPUs per chassis and potential smaller footprint System interconnect based upon InfiniBand Leveraged CLIM I/O architecture Expected improved performance capacity Architected big endian model for compatibility Planned for the first half of 2015 with an Initial 4-core software license L Series RVU 10

11 The NonStop X software stack All layers of the software stack have been optimized for HP Integrity NonStop X APPLICATIONS Modern application development tools Middleware Database and transaction management System management and control Security NonStop Operating System NSDEE (Eclipse) + compilers support x86 Middleware products work as they did on Intel Itanium HP NonStop SQL/MX and SQL/MP are ported to x86 All manageability products offered on Itanium will run on x86 Security products have been tested and modified as needed to run on x86 The NonStop OS is optimized for x86 and InfiniBand HARDWARE 11

12 What is the same (or similar) Comparing NonStop X to NonStop Itanium The system is based upon the c7000 enclosure General system architecture is the same The collection of cores on a single blade compose a NonStop CPU 32b addressing is handled as sign extended 64b addresses The system is Big Endian Binary data can be shared between Itanium and x86 without byte swapping TNS programs still run on the platform With the a new translator 12

13 What is the different Comparing NonStop X to NonStop Itanium A 16 processor system will fit in a single c7000 chassis The system interconnect will be based upon InfiniBand Support for 10GbE networking There will be one message system, comm, and storage interrupt process per IPU The Maintenance Entity (ME) functionality will be hosted on a pair of Storage CLIMs On NonStop Itanium it is hosted on the ServerNet switches In the case of a dual CPU halt with CPUs 0 and 1, both are memory dumped to a Storage CLIM and are encrypted Native programs must be recompiled with x86 targeted compilers 13

14 Migrating an application to NonStop on x86 TNS object code TNS programs ( NonStop classic object code files) can be ported using one of three possible methods: 1. Run programs as is interpreted Source code is not required 2. Translate programs using the new TNS accelerator for x86 (OCAX) Source code is not required OCAX can also be run on an Integrity system to produce x86 code 3. Convert TNS programs into native TNS/X programs for x86 14

15 Endianness and the NonStop OS Itanium is a big endian CPU X86 is a little endian CPU The NonStop system runs big endian - from the users perspective Achieved via compiler technology and OS support Binary messages between x86 and Itanium systems need NO transformation This includes all data on disk Binary data can be transferred to/from Itanium / x86 directly and without conversion 15

16 Planned supported features and products The current versions of most features move to NonStop X SQL/MP SQL/MX - version 3.3 TS/MP - version 2.5 JAVA - version 7 in both 32b and 64b LTO6 tape drives 16

17 Products not being brought forward to NonStop X Non-CLIM based communication protocols SNAX and SWAN based I/O Tuxedo OSI subsystem TNS/R (MIPS, G-series) cross development tools Enterprise ToolKit (Visual Studio with integrated compilers) & Visual Inspect (VI) Replaced by NSDEE (aka Eclipse) 17

18 NonStop X Beta Program HP NonStop has been running an x86 Beta Program with NonStop partners Testing began in December of 2013 Companies had to migrate their products(s)/applications to run on NonStop x86 About 30 companies have been testing on the platform successfully Including ACI The Beta Program included selected NonStop customers as of September Recompilation of customer code is underway Systems available at the ATC for customer beta use Expected completion date is December 2014 POC - ATC available beyond beta as part of our regular business process 18

19 NonStop X Beta Program Some of the partners participating in the Beta Program 19

20 This is a rolling (up to three year) Statement of Direction and is subject to change without notice. HP Integrity NonStop X futures New product family of x86 systems that run the NonStop OS Significant improvements in capacity, throughput, and general performance Easier to move new applications from other platforms to the NonStop platform More software product offerings for this NonStop X system family First Release Second Release Future Intel Xeon 4-core fixed configuration InfiniBand interconnect Expand over IP clustering Intel Xeon 2, 4 and 6-core license configuration InfiniBand clustering Intel Xeon TMF audit trail increase New software offerings Entry-class platforms Carrier-grade offering CPU refresh I/O refresh 20

21 This is a rolling (up to three year) Statement of Direction and is subject to change without notice The beginning of a new family of NonStop products Introducing HP Integrity NonStop X: redefining availability and scalability for x86 100% HP NonStop NonStop Itanium Intel Itanium processor Proprietary interconnect NonStop Itanium Intel Itanium processor Proprietary interconnect NonStop X Intel Xeon processor Industry-standard interconnect Massive scalability Massive scalability Highest AL4 availability Highest AL4 availability The right compute for the right workload at the right economics every time 21

22 Revolutionizing the always-on, globally-connected world Because your customers never wait No matter what HP NonStop hardware architecture you choose, you will continue to get 100% NonStop value that makes what you do truly matter. - Meg Whitman, CEO, Hewlett-Packard Always on Timeless Efficient 22

23 Key takeaways NonStop s future today and tomorrow HP offers choice of NonStop systems: Itanium & x86 Strong roadmap and investing for the future Continued innovations Reminders HP NonStop Hardware and Software Roadmaps Full agenda lined up with very exciting content Thank you BITUG committee! Network with old friends and meet some new ones 23 This is a rolling (up to three year) Statement of Direction and is subject to change without notice

24 Thank you

25 Terminology and Names The NonStop x86 based product line is called HP Integrity NonStop X The software release is called the L-series and uses a new naming scheme (described later) The system architecture is called TNS/X (Itanium was TNS/E) The Processor Type is 11 (Itanium was 10 for all models) The short form Processor Name is NSX-D (model number 4), all models will be of the form NSX-xx As with Itanium, a given model may run with different IPU (aka cores) counts 25

26 Big Endian, how does it work The x86 is little endian, right? The compilers byte swap data items before placing them into memory for program variables Does not apply to non-program variables such as return addresses pushed onto the memory stack The OS along with the debuggers make the view complete But if you just scroll through memory you can see a mix of Big and Little endian datums Allows for binary data to be exchanged between Itanium and x86 systems without any special handling In particular, messages sent via Expand between a NonStop x86 based system and a NonStop Itanium system require no extra handling. 26