Chapter 6: System Integration

Transcription

1 Chapter 6: System Integration 6.1 Introduction This is a group task which is undertaken when all the individual tasks have been successfully completed. ssuming this, the state of the system in terms of working components should be: 1. C program for the image processing on the M 2. Video Capture system and Frame llocator in Verilog 3. C program for I2C Master communication from M FPG 4. C program for I2C Slave communication on PIC 5. C program for stepper motor control from PIC 6. C program for servo motor control In addition, you are supplied with the following Verilog components which will be placed in the FPG on the M : 1. Open Source Verilog for an I2C Master 2. VDU Controller which continuously reads a frame from memory and displays it on a monitor 2. n rbiter which determines which source unit (M, Video Capture System or VDU Controller) is granted a memory access in the next time clock period. The relationship of the hardware components on the M side is shown in Figure 6.1. The connection to the PIC hardware is via the I2C lines from the I2C Master. The VDEC is physically mounted on top of the M. camera image VDEC YCrCb Video Capture M emulator (jimulator) & debugger (Komodo) I 2 C Master VDU Controller F M E LL O C TO B I T E memory FPG I 2 C monitor To Camera Box Figure 6.1: Components of M Side of iimp Hardware 1

2 The PIC hardware is illustrated in Figure 6.2. Exerciser Breakout PIC Microcontroller Motor Drive camera output (to VDEC ) I2C (to M ) Camera Box camera Figure 6.2: PIC Hardware 6.2 System Development The integration needs to be incremental, starting with just a couple of tasks (say) and when the combination is working, add the next feature and get that working etc. In that way, it is easier to identify the source of errors when these occur. Fault finding when using the M is fairly limited unless you want to scrabble around with M code, so in this case you may want to do further stand-alone modelling and testing to pinpoint the error. If this results in changes to the hardware and software then you may need to go through all the integration steps again to make sure that in fixing one fault you haven t broken something else. The system development outlined below envisages the integration in parallel of the PIC system and the M system, i.e. ll the software required on the PIC (Figure 6.2) to act as an I2C slave and to drive the servo and stepper motors. ll the hardware for the FPG including the Video Capture, Frame llocator, rbiter, I2C Master and VDU Controller. ll the software to act as an I2C master and to perform the image processing. Note that different C programs need to be used at different stages in the development and this will involve (different) changes to the stand-alone C programs developed. Once the PIC system and M systems are operating correctly, then the PIC and M systems can be connected together for the final integration stage. Here an essential first task is to compute a scaling factor for the conversion of pixel movement to angular movement in tenths of a degree. The calibration needs to be initiated via the I2C master on the M side but the scaling 2

3 factor can be incorporated into the C program at either the PIC or M end. Incorporation at the PIC end is suggested because of a lack of support at the M end for division and multiplication and no support for floating point numbers M System Development This occurs in parallel with the PIC system development described in section fter Step 2 is successfully completed, the design transfers to the M hardware of Figure 6.1. The steps described below should be carried out in the order given. 1. a. The Video Grabbing and Image Capture Verilog modules (excluding the Frame llocator) should be combined and tested using the vid_capture_testbench to display on the virtual screen a red and blue checker pattern with a yellow bounding box one pixel wide one pixel in from the outer boundary. b. Before synthesising the entire logic to be downloaded onto the FPG, a check needs to be done to ensure that the modules designed for the Video Capture system and the Frame llocator are synthesisable. so start Cadence by typing start_cadence COMP20592 c. In the icds window, choose Tools->Verilog Integration->NC-Verilog. d. In the Virtuso Verilog Environment window, use the Browse button to enter COMP20592 for Library, <module name e.g. vid_add> for Cell, and functional for the View. Put run1 for the un Directory and press COMP20592 in the Library box. e. Initialise the design (running man icon). Generate a netlist with the second icon down (three ticks) (answering yes if asked about renetlisting) and check for correctness in the icds window. f. In the Verilog Environment window, select Commands->Xilinx Synthesis. This brings up a XILINX COMPILE window which details the various operations performed in synthesising the design. The report will tell you that Ngdbuild has failed as would be expected. However you should inspect the opening sections of the report which relate to synthesising the block. In particular, warnings or errors in the HDL nalysis section need to be addressed as these mean the design will (probably) not work as expected when downloaded onto the. Note that in synthesising, delays in the module are ignored. You should modify your design and re-run the synthesis until the HDL nalysis section of the report no longer has warnings or errors. ny warnings in the HDL Synthesis eport which follows the HDL nalysis should also be noted to make sure these can be ignored. g) epeat this synthesis process for each module of the Video Capture system and Frame llocator. Finally check that the vid_capture cell is synthesisable. Synthesising the Verilog Description of the System 2. When satisfied of the correct operation and that the description of the Video Capture system and Frame llocator is synthesisable, the combined Verilog description of the TL (egister Transfer Level) needs to be synthesised. This is the process of using CD tools to convert the Verilog description into the logic gates and flip flops available on the targeted implementation process, i.e. the elements of the FPG. The logic to be downloaded comprises the I2C master, the Video Capture system, the Frame llocator, the rbiter and the VDU Controller. The procedure is as follows: a. Start Cadence by typing start_cadence COMP20592 b. In the icds window, choose Tools->Library Manager c. From the Library Manager window, select COMP20592 from Library, processor from Cell, functional from View, and then File->Open to bring up a Verilog description and then Save this and close. This is necessary so that the top level module of the I2C master contained within processor is picked up correctly later on. 3

4 d. Back in the Library Manager window, select COMP20592 from Library, _test from Cell, schematic from View, and then File->Open to obtain a Schematic Editing window containing a schematic of the blocks of the entire system to be placed on the FPG. e. In the Schematic Editing window, select Xilinx->Simulation. This brings up the Verilog Environment window. Initialise the design (running man icon). Generate a netlist with the second icon down (three ticks) (answering yes to renetlisting) and check for correctness in the icds window. f. In the Verilog Environment window, select Commands->Xilinx Synthesis. This brings up a XILINX COMPILE window which details the various operations performed in synthesising the design. Look at the error report at the end of this to check that synthesis has been successfully completed and that the bit file <cell name>.bit has been generated. When it has, you can exit from Cadence. 3. On the M hardware, connect the camera output on the back of the camera box to the VDEC (coaxial cable) and the monitor to the M. 4. Initially prepare just a C program of the I2C initialisation of the VDEC. Powering up the M and Camera Box 5. The M and Camera Box are powered up by: a. switch on the monitor b. switch on +5V to the M (oversized plug i.e. a wall wart ) c. switch on the +12V to the camera box (oversized plug i.e. a wall wart ) d. press eset button on M Compiling the C program and linking it 6. Get the object code for code containing SWI operations by: a. In a terminal window, set a path which points to the M development tools by typing: PTH=$PTH:/home/cadtools5/gnuarm-3.4.3/bin b. Produce an object file init.o from init.s initialising the M by typing: arm-elf-gcc -c $COMP20592/gcc_support/init.s -o init.o c. The I2C library of functions contains swi functions and so requires a 3-stage process to obtain object code. ssuming the library is named i2c.c, in your working directory type: arm-elf-gcc -S <list of all C code files containing SWIs separated by a space> -o i2c.s $COMP20592/gcc-support/swi_pp i2c.s arm-elf-gcc -c -o3 pp_i2c.s -o i2c.o The first command generates an M assembly code file i2c.s from all the C programs and -S stops it being assembled. The second modifies the M assembler code to include SWI instructions, producing a file pp_i2c.s (pp denotes post processing). The third produces object code i2c.o from the modified M code file. 7. ny C program not containing SWIs, e.g. the VDEC initialisation sequence VDEC_init.c, can now be directly compiled into object code by typing: arm-elf-gcc -I $COMP20592/gcc_support -c VDEC_init.c -o VDEC_init.o 8. If there are any other C code files not containing swi functions, then Step 7 needs to be repeated for each C code file. 9. The different object code files now have to be linked by typing: arm-elf-ld -T $COMP20592/gcc-support/lscr init.o i2c.o VDEC_init.o -o <name of program>.elf lscr refers to a link script for allocating memory to object files. The output of this command is a.elf file which Komodo can run. Downloading the FPG configuration and the compiled object file 10. In a terminal window, start Komodo by typing: new_start_komodo & 4

5 but don t load the compiled program just yet. 11. Download the FPG logic by: a. In the Komodo window, use the Browse button associated with Load to find ~/Cadence/COMP20592/xilinx_compile/<cell name>.bit and press Load to download the FPG configuration. b. In the Komodo window, use the browse button to select the object program from the Cadence/COMP20592 directory <name of program>.elf from your working directory. c. In Komodo window, press the eset button d. In Komodo window press the un button Further C Program Development on the M With a C program which just initialises the VDEC registers, if the system is operating correctly, then the camera image should be captured in the store and displayed by the monitor. When operational, the next step is to add the C program for the image processing to the VDEC initialisation code. It is suggested that freeze_frame() be used so that intermediate results from the image processing are written back to the memory on the M using write_frame() (just as in the emulation environment) to act as a visual check that correct processing is occurring, that the largest object is being identified and pixel shifting to centre the largest object is being accurately performed. On the real hardware, unfreeze_frame() has the effect of enabling the displayed frame to move on. The new C program should of course be compiled and linked as described in Steps 6 to 9. If the M is already powered and initialised as described, then it is only necessary to download and run the new C program as described in Step 11b,c and d. When the image processing manipulation is believed to be correct, then the C program needs further development. This will remove write_frame requests and instead set up communication with the PIC via the I2C master. Write requests to the PIC request a horizontal and vertical camera position in pixels, while a read request to the PIC will result in a byte being returned indicating the status of the PIC I2C slave as shown in Figure 6.3. spare spare y_high y_low x_high x_low y motor in motion x motor in motion D7 D6 D5 D4 D3 D2 D1 D0 Figure 6.3: PIC Status egister The C code in the M needs to: 1. Initialise the registers on the VDEC. 2. equest motor centralisation (by sending x = y = 0 for the motor positions) 3. Perform a calibration sequence (see later) so that the pixel to 10*degrees conversion factor can be computed and incorporated into the scaling performed by the PIC on movement positions arriving from the I2C master. 3. Perform image processing so that the pixel movement continually centres the largest object in an image or tracks a slowly moving object. Here camera position requests are sent to the PIC via the I2C lines and the status monitored until the motors are no longer in motion. The image displayed on the monitor should give an indication as to what the system is doing. gain this new C program needs to be compiled and linked (steps 6 to 9) PIC System Development 5

6 This occurs in parallel with the M system development described in section The PIC hardware is assumed to be set up as in Figure 6.2. The steps involved are: 1. The individual C programs for driving the stepper and servo motors are combined into a single C program. This program must set the appropriate bits in a register which forms the PIC status for the I2C slave, i.e. the motors in motion bits, and bits indicating reaching the high and low x and y limits. It is suggested that the soft limits are set at x = 1200and y = 450. The C program is then compiled and downloaded onto the PIC. 2. The PIC system is tested for correct operation and in particular that the stepper and servomotors move simultaneously, i.e. the use of a timer rather than a delay loop in the program. 3. The I2C slave code is combined with the motors code, compile and downloaded to the PIC. 4. The Test Interface Board in modes 4 and 5 is used to verify I2C slave operations and motor movement. 5. When correctly operations, the software should be downloaded onto the PIC and all hardware brought up to CS. 6.3 System Integration The PIC hardware (Figure 6.2) should be connected to the M hardware (Figure 6.1). The camera output at the back of the camera box should be connected into the VDEC (coaxial cable). The I2C interface should be connected between the back of the camera box and the M (J45 plug/socket). The I2C cable has been designed so that it can be plugged in either way round! The system should be powered up as follows: a. switch on the monitor b. switch on +5V to the M (oversized plug i.e. a wall wart ) c. switch on the +12V to the camera box (oversized plug i.e. a wall wart ); this causes the motors to centralise d. switch on +12V to the PIC electronics; again this causes the motors to centralise e. press eset button on the PIC f. press eset button on M ssuming the C program to be run on the M is compiled and linked (steps 6 to 9), the next step is to download the FPG configuration and then the object file. So, follow steps 10 and 11 in section Calibration to Obtain Scaling Factor fter initialising the VDEC registers and centralising the motors, calibration needs to be undertaken.the motor movement is based on a camera movement specified as 10*degrees while the image processing computes camera movement in pixels. scaling factor is required so that pixel movement at the M end are converted to tenths of a degree at the PIC end. The procedure below suggests a way to achieve this and requires knowledge of the angle at which the high and low soft limits are set in the PIC s I2C status line. ssuming that the scaling factor from pixels to10*degrees is the same in the vertical and horizontal directions, then the calibration only needs to be done for one axis. Limits of 1200(horizontal) and 450(vertical) are assumed. From the centralised position of x = 0 y = 0, the I2C master sends horizontal camera positions, h, in increments of 1 and monitors when the x_high bit in the status line goes high; as an additional check, the PIC counts the numbers of steps this takes which could be displayed on the 6

7 LEDs of the Exerciser. The scaling factor is then 1200/h. s an additional check, the motors could then be re-centralised and the exercise repeated but this time decrementing h starting from 0. gain, the master should monitor when x_low goes high to give a scaling factor of /h (h is now -ve) and this of course should be identical to the previously calculated scaling factor (again using the Exerciser to check that the number of steps is consistent). To check the scaling factor in the y-direction, the motors are now centralised again and the exercise repeated but this time incrementing and then decrementing the vertical value, v, sent to the PIC starting from 0 both times and stopping when y_high and y_low go high. The vertical scaling factor should be 450/v and -450/v (v is now -ve). gain these should be identical to each other and consistent with the horizontal scaling factor. convention could be devised to automatically recognise that the master was in calibration mode. This would enable the PIC to automatically include it in the program without the need for post-programming. The maximum pixel movement reflecting the size of an image is 640 horizontally and 480vertically. So values outside this range could signal the start and end of calibration. For example y = 0, x = 0x7FFF (max +ve number) could indicate that x-calibration is starting; and this could be indicated back to the I2C master by bit 6 in the PIC I2C status line going high. If calibrating, PIC would then know that when was reached that the scaling factor was 1200/h and similarly that when was reached that the scaling factor was -1200/ h. The finish of x calibration would be signalled by sending y = 0, x = 0x8000 (max -ve number). The vertical scaling factor could be undertaken in a similar way with y = 0x7FFF, x = 0 signalling the start of y calibration and y = 0x8000, x = 0 signalling its end; again indicating this in the status line using bit 7 would be helpful. Following calibration, normal processing of the image received from the camera should proceed. Useful Facilities in Komodo You may find the following facilities useful if you are unlucky enough to have to start debugging M code. Special -> Symbol Window e.g. unfreeze_frame places a breakpoint at that address causing Komodo to halt at that point Special -> Simple breakpoints also sets breakpoints or a symbol can be typed in 7