Outline Introduction System development Video capture Image processing Results Application Conclusion Bibliography
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1 Real Time Video Capture and Image Processing System using FPGA Jahnvi Vaidya Advisors: Dr. Yufeng Lu and Dr. In Soo Ahn 4/30/2009
2 Outline Introduction System development Video capture Image processing Results Application Conclusion Bibliography
3 Embedded system
4 Equipment 30,816 logic cells bit multipliers 2,448 kb of block RAM PowerPc405 embedded processor Virtex II Pro FPGA board
5 Equipment Video decoder daughter board Component, composite and S-video inputs I 2 C compatible control bus High-speed Hirose FX2 data connector
6 Embedded development kit (EDK) flow C Code VHDL or Verilog Standard Embedded SW Development Flow Embedded Development Kit Standard FPGA HW Development Flow Code Entry C/C++ Include Cross the Compiler BSP and Compile the Software Linker Image? Board Support Package Data2MEM System Netlist 2 Compiled ELF 3 Compiled BIT HDL Entry Instantiate the Simulation/Synthesis System Netlist and Implementation the FPGA 1? Load Software Into FLASH Debugger Download Combined Image to FPGA Download Bitstream Into FPGA Chipscope RTOS, Board Support Package Xilinx Workshop
7 Objectives What does the project do?
8 Project goals Design a real-time video capture and image processing system using FPGA System development Video capture and real-time display Video capture and image processing
9 System development Video capture
10 Video capture Video Video Input Composi te signal Digilent Video decoder daughter board Hirose socket connecto r XUP Virtex II Pro board XSGA Video Port Output RS-232 Console
11 Video input Analog camera Resolution : 512x492 pixels Video output format : composite Video output PC Monitor
12
13 XUP-V2Pro Development System VDEC1 Board Analog Interlaced Video Composite S-Video Component (YPrPb) Video Decoder Video Timing Extraction Digital Video ITU-R BT.656 YCrCb Data Format Line Field Decoder 4:2:2 YCrCb Create the missing Chroma data samples 4:2:2 to 4:4:4 Conversion 4:4:4 YCrCb Color Space Conversion YCrCb to RGB Conversion 4:4:4 RGB Video Timing Generation Logic Hsync Vsync Blanking Pixel Clock Select the active line buffer for Buffer Control Logic Select the active line buffer for Analog Processive Video Video DAC 24 Bit RGB Video Data 858x525 60Hz Multiplexer Line Buffer (BRAM) Multiplexer XSGA Video Port Monitor Select the video source I2C Master Line Buffer (BRAM) De- interlace by Line doubling
14 Specifications Developed in VHDL using EDK tools C language is used to configure the video decoder Supports NTSC and PAL inputs Output format (NTSC) : 858x525 Hz refreshing rate
15 System development Image processing
16 Image processing Video Input Composite signal Digilent Video decoder daughter board Hirose socket connect or XUP Virtex II Pro board Image processing XSGA Video Port Video Output RS-232 Console
17 Image processing 1. Brightening 2. Sharpening 3. Blurring 4. Edge detection 1. Sobel x filter 2. Sobel y filter 3. Sobel xy filter
18 Work done Designed an embedded system to configure and drive the video decoder Developed video capture functions such as data buffer and color space conversions Developed a function to drive video DAC and display the image on the monitor through XSGA port Implemented image processing algorithms
19 Results
20 Results Original image Brightened image
21 Results Sharpened image Blurred image
22 Results Edge detected image
23 Applications Medical imaging Digital cinema Surveillance Machine intelligence High definition TV
24 Completed Conclusion Implemented real-time video capture system Successfully applied edge detection and other image processing algorithms Displayed real-time video data on monitor Future Work Saving video data in memory Advanced image processing algorithms could be studied on the system for different applications.
25 Bibliography [1]Xilinx Inc., Xilinx University Program Virtex II Pro Development System Hardware Reference Manual, March [2]Xilinx Inc., Digilent Video Decoder Board (VDEC1) Reference Manual, April [3]Christophe Desmouliers. Real-Time FPGA-Based Embedded Video Capturing and Video Processing, Project Report, Illinois Institute of Technology, August [4] Xilinx Inc., Xilinx EDK Workshop, May 2008
26 Questions? Thank you!
27 Thank you Dr. Yufeng Lu Dr. In Soo Ahn
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