instructions aligned is little-endian
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1
2 MEMÓRIA
3 Data Types These instructions load and store aligned data: Load word (lw) Load halfword (lh) Load halfword unsigned (lhu) Load byte (lb) Load byte unsigned (lbu) Store word (sw) Store halfword (sh) Store byte (sb) The MIPS architecture as simulated in QtSpim is little-endian. This means that the Least Significant Byte (LSB) is stored in the lowest memory address. The Most Significant Byte (MSB) is stored in the highest memory location. X: LSB X+1: MSB
4 Data Types These instructions load and store unaligned data: Load word left (lwl) Load word right (lwr) Store word left (swl) Store word right (swr) Unaligned load word (ulw) Unaligned load halfword (ulh) Unaligned load halfword unsigned (ulhu) Unaligned store word (usw) Unaligned store halfword (ush) The MIPS architecture as simulated in QtSpim is little-endian. This means that the Least Significant Byte (LSB) is stored in the lowest memory address. The Most Significant Byte (MSB) is stored in the highest memory location. X: LSB X+1: MSB
5 UP num2: in decimal 0x004C4B40 in Hexa num1: 42 in decimal 0x A in Hexa
6
7 The first part, near the bottom of the address space (starting at address $ (hexa), is the text segment, which holds the program s instructions. The second part, above the text segment, is the data segment, which is further divided into two parts. Static data (starting at address $ hex) Immediately above static data is dynamic data. This data, as its name implies, is allocated by the program as it executes. The program stack segment, resides at the top of the virtual address space (starting at address $7FFFFFFF hex)
8 # Print out "Hello World" # Copyright (c) 2013, James R. Larus. msg:.data.asciiz "Hello World".text.globl main main: li $v0, 4 # syscall 4 (print_str) la $a0, msg # argument: string syscall # print the string END: li $v0, 10 # exits program syscall The first part, near the bottom of the address space (starting at address $ (hexa), is the text segment, which holds the program s instructions. The second part, above the text segment, is the data segment, which is further divided into two parts. Static data (starting at address $ hex) Immediately above static data is dynamic data. This data, as its name implies, is allocated by the program as it executes. The program stack segment, resides at the top of the virtual address space (starting at address $7FFFFFFF hex)
9 REGISTRADORES
10 The MIPS has 32, 32-bit integer registers ($0 through $31) and The MIPS has 32, 32-bit floating point registers ($f0 through $f31). Some of the integer registers are used for special purposes. The FPU has sixteen floating-point registers. Each register can hold either a single-precision (32 bit) or double-precision (64 bit) value. In case of a double-precision value, $f0 holds the least-significant half, and $f1 holds the most-significant half. All references to these registers use an even register number (e.g., $f4).
11
12 MIPS Register File Register Naming Convention $0 : Constant Zero $V0 : Returned values from functions $A0 : Arguments passed to functions $T0 : Temporary registers (functions) $S0 : Saved registers (main program) $SP : Stack Pointer $RA : Return address The MIPS CPU contains 32 general-purpose registers that are numbered Register $0 always contains the hardwired value 0. Registers $at (1), $k0 (26), and $k1 (27) are reserved for the assembler and operating system and should not be used by user programs or compilers. Registers $a0 $a3 (4 7) are used to pass the first four arguments to routines (remaining arguments are passed on the stack). Registers $v0 and $v1 (2, 3)are used to return values from functions.
13 MIPS Register File Register Naming Convention $0 : Constant Zero $V0 : Returned values from functions $A0 : Arguments passed to functions $T0 : Temporary registers (functions) $S0 : Saved registers (main program) $SP : Stack Pointer $RA : Return address Instruções de Desvio: j => Jump Uncondicional jal => Jump and Link Jump com retorno ($RA) b => Branch Unconditional beq => Branch if equal zero bne => Branch if not equal bge => Branch if greater or equal Syscall => System Call (Software Interrupt) Procedure Call Convention: Registers $t0 $t9 (8 15, 24, 25) are caller-saved registers that are used to hold temporary quantities that need not be preserved across calls (see Section 2.7 in Chapter 2 Larus Appendix). Registers $s0 $s7 (16 23) are callee-saved registers that hold long-lived values that should be preserved across calls. Register $gp (28) is a global pointer that points to the middle of a 64K block of memory in the static data segment. Register $sp (29) is the stack pointer, which points to the last location on the stack. Register $fp (30) is the frame pointer. The jal instruction writes register $ra (31), the return address from a procedure call
14 $PC Program Counter $SP Stack Pointer $RA Return Address $STATUS Flags $GP Global Pointer $FP Frame Pointer $AT Assembler Temporary $K0-$K1 - Kernel $Zero Floating Point $FG0 to $FG31 => Single $FP0 to $FP30 => Double Floating Point Registers: FG0, FG1, FG2,... FG31 => 32 bits FP0, FP2, FP4,... FP30 => 64 bits
15 MONTADOR File.s SPIM: Assembler and Simulator MARS: MIPS Assembler and Runtime Simulator (Java)
16 SPIM - DATA DECLARATION (Data Segment) Comments The "#" character represents a comment line. Anything typed after the "#" is considered a comment. Blank lines are accepted.
17 .data dado1:.word 0x dado2:.word 0xF1F2F3F4 # 0x => Hexadecimal Values
18 Details => See: Larus Appendix A
19 SYSTEM CALLS I/O Functions
20 Register $V0 Register $A0 (CPU) SPIM SysCalls Details => See: Larus Appendix A
21 Register $V0 Register $A0 (CPU) SPIM SysCalls
22 MIPS Instruções e Código li = Load Immediate la = Load Address lw = Load Word (32 bits) syscall = System Call (Software Interrupt Call) # helloworld.s # # Print out "Hello World" # Copyright (c) 2013, James R. Larus. msg:.data.asciiz "Hello World".text.globl main main: li $v0, 4 # syscall 4 (print_str) la $a0, msg # argument: string syscall # print the string END: li $v0, 10 # exits program syscall
23 REFERÊNCIAS
24 1. Organização e Projeto de Computadores Patterson, D. & Hennessy J Apêndice A Larus Appendix A Assemblers, Linkers, and the SPIM Simulator 2. MIPS Assembly Language Programming Robert Britton May MIPS - Assembly Language Programming using QtSpim Ed Jorgensen - Version July MIPS - Assembly Language Programmer s Guide ASM-01-DOC - Silicon Graphics SPIM Simulator (Larus) QtSPIM 6. MARS Simulator (Java Missouri State University) 7. MIPS Resumo : Tutorial
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