Content. 1. General informations 2. direct addressing 3. indirect addressing 4. Examples including informations

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1 IV. Addressing Modi

2 Content 1. General informations 2. direct addressing 3. indirect addressing 4. Examples including informations

3 1. General Informations

4 Address range for data and program : the 65xx family of processors has an address range from $0000 to $FFFF The high-byte is called page 256 pages Particular meaning of some pages : zero-page : fast access (1 cycle less, special addressing mode, operand consists only of one byte) one-page : Stack : the stack pointer (register) points to the low address byte of the first empty cell on the top. The high address byte is set automatically to 01. FF-page : for instance, resetting- und interrupt-vectors are here declared, i.e., start addresses of the routines, which are to be performed in the case of the corresponding interrupt. page 0, 1 part of Random Access memory (RAM) ; R/W page FF part of Read only memory (ROM)

5 Remark (Storing addresses) : If writing both address bytes to the memory, it is usually done in the following way : low address byte low memory cell high address byte high memory cell Examples of applications : Call of subroutines (see chapt. I), i.e., Copy return address to the stack indirect addressing (see chapt. V) Interrupt vectors (see later) Moreover, the above convention is helpful when shifting the content of memory cells or when performing additions or subtractions.

6 2. direct addressing Direct addressing is also called effective addressing ; It is at most a simple address calculation required. (i) absolute : Address is specified by the Operanden (explicitly or symbolically). Generally the command is 3 Byte long (exception zero-page) Examples : adc Summand ; symbolically sta $4050 ; explicitely zero-page : Summand = $AB ; high-byte not neccessary adc Summand sta $50 ; zero-page addresse

7 (ii) immediate : (2 Byte long) Constant dadressing : operand is the value itself. Example : ldx #$0C ; hexadecimal value lda #12 ; decimale value adc #% ; binary value (iii) implicit (implied) : (1 Byte long) Explicit specification of address is not neccessary, because the command referes directly to one or two registers. Examples : inx ; increment the content of X-register by one tax ; content of Accumulator X-register rol ; roll bits of accumulator using C-Bit (see above) rol, asl etc. can be used both implizitly and absolutely.

8 (iv) relative : Assembler calculates displacement (offset Δ). command usually 2 Byte long Δ = aim address - program pointer Δ 127 When running the program, Δ will be added to the actual content of the program pointer using mod $100. If a Carry is created for Δ>0, then one gets an excess of the page. If no Carry is created for Δ<0, then one falls below the page. in both cases 1 more cycle is neccessary Advantage of relative addressing : Relocatable programming code, e.g. when code is shifted by a multi-tasking or -programming operation system or when using reusable program parts.

9 Example : (compare Branch-commands) Loop : ldx #10 42FE A2 0A 4300 dex 430C CA bne Loop 430D D0 EF Δ nop 430F rts Calculation of the jumping address : $ 43 0F + $ EF return jump, as MSB = Carry $ 43 FE Carry = 0 implies excess of page jumping addresse $ 42FE

10 (v) absolute indexed (always post indexed) : the effective address follows from the addition (mod $1000) of the base address (Operand) and the content of the index-registers X or Y. The command is usually 3 Byte long. Application especially with tables, often integreted in loops. Example : lda Tab, x Tab represents the base address. If x=0, the base address is refered. Instead of the X-register, with the same functional operation the Y-register can be used.

11 Example :.org $4000 ldx #0 ldy #0 loop: lda Tab_1, x sec sbc Tab_2, x bmi cont sta Diff, y iny cont: inx cpx #5 bne loop rts loopcanbeprogrammedonly by incrementing the index, as the value for x=0 must also be read. Trick for a decrementing version will be discussed later. Tab_1:.byte $FF, $16, $A5, $27, $B3 Tab_2:.byte $45, $3A, $84, $E2, $9C Diff:.byte $00

12 3. indirect addressing The address, to which a command refer, is stored in a special part of the memory (2 byte per adddress). This couple of memory cells is called : Pointer (vgl. C ++) or Vector ( used in context with interrupts ) In current processors 16-bit registers, which allow a fast access, are used as memory for the pointers. There are no 16-bit registers with the 65xx processors. Nevertheless, in order to realize the fastest possible access, the zero-page as memory area is used for the pointers.

13 Indirect addressing for the value (Wert) stored in the memory cell α = $5010 Low α = $10 High α = $50

14 Advantage of the indirect addressing : high flexibility Data blocks, to which should be refered, can be easily changed. A time-consuming search of READ-commands in the whole program is not neccessary, but a new initialisation of the pointer at a central place is sufficient. Pointer is programmable. The call of subroutines can be controlled by parameters (see later).

15 How to declare a pointert : Pointer = $80 ; zero-page address is defined for the pointer. lda #<Table ; loading low address-byte Sta Pointer lda #>Table ; loading high address-byte Sta Pointer+1 Table:.byte $02, $FF,.., $6A

16 Attention using zero-page addressing subsequent correction of program memory due to the use of zero-page

17 Indirect addressing modi : (i) absolute : only jump-command Remark (examples) : jmp (pointer) external events result in jumps indirectly addressed. RES ; reset jmp (RESVec) = jmp ($FFFC) NMI ; hardware Interrupt jmp (NMIVec) = jmp ($FFFA) IRQ ; hardware Interrupt jmp (IRQVec) = jmp ($FFFE)

18 (ii) implicit (implied) : Explicit specification of address is not neccessary, because the command refers directly to one or two registers. Examples : Stack-commands: pha, pla, php, plp Here the Stackpointer is addressed, in which the address of the Stack referred to (page 1) is registered. Software-break brk The interrupt vektor $FFFE must be defined. The only difference to a hardware interrupt is that the B-Bit is set in the processor s status register.

19 iii. pre-indexed indirect addressing : (indexed indirected) command is 2 byte long formal command : Application : sta (P-list,x) ; P-list is as page-0-address declared. a) Indirect absolute addressing for other commands than jmp b) Pointer- lists adc (Pointer,0) x must be incremented twice, in order to to proceed to the next pointer.

20 Schematic drawing for an indexed indirected addressing :

21 iv. Indirect post-indexed addressing : (indirected indexed) Schematic drawing for an indirected indexed addressing :

22 command is 2 byte long formal command : sta (Pointer),y ; Pointer is declared as page-0-address. This addressing modus combined both indirect Properties and the indexed addressing of tables As known from direct addressing). very powerful addressings modus

23 4. Examples with Informations

24 Used Abbreviations : IMP implicit Akku implivit Accumulator IM immediate R relative ABS absolute ABX absolute, x-indexed ABY absolute, y-indexed ZP absolute, zero page ZPX absolute, zero page, x-indexed IND indirect (only JMP-command) (IND,X) indirect, x-pre-indexed (IND),Y indirevt, y-post-indexed

25 Examples of Commands : Mnemo-Code Machine Code Addressing Number of bytes Cycles ADC #Operand $69 IM 2 2 ADC Operand $65 ZP 2 3 ADC Operand, x $75 ZPX 2 4 ADC Operand $6D ABS 3 4 ADC Operand, x $7D ABX 3 4* ADC Operand, y $79 ABY 3 4* ADC (Operand, x) $61 (IND, X) 2 6 ADC (Operand), y $71 (IND), Y 2 5* * if page is exeeded

26 Mnemo-Code Machinen Code Addressing Number of bytes Cycles ROR $6A AKKU 1 2 ROR Operand $66 ZP 2 5 ROR Operand, x $76 ZPX 2 6 ROR Operand $6E ABS 3 6 ROR Operand, x $7E ABX 3 7 Mnemo-Code Machinen Code Addressing Number of bytes Cycles BMI $30 R 1 2* * if page is exeeded and if condition true 1 additionel cycle

27 BIT Command : Virtual conjunctive operation of the operand with the Accumulator (virtual AND ), content of Accu is not changed Mnemo-Code Machinen Code Addressing Number of bytes Cycles BIT Operand $24 ZP 2 3 BIT Operand $2C ABS 3 4 Influence on Flags : N V B D I Z C x x x - LDA #% BIT Test Test:.Byte % Leads to : N = 0 V = 1 and because of the virtual result % Z = 1

28 V. Structured Programming

29 INHALT 1. Programmstruktur Diagramme 2. Optimieren von Schleifen 3. andere Strukturelemente

30 1. Diagrams of Program Structures

32 example :.org $4000 ldx #4 lda A sta result loop: asl A rol A+1 lda result clc adc A sta result lda result+1 adc A+1 sta result+1 dex bne Loop lda B beq end jsr division End : rts A:.byte $A7 $00 B:.byte $34 result:.word $0000

33 2. Optimization of Loops

34 Loops in higher Programming languages: three Typs : repeat.. until ; arbitrary loop parameter, end for a specific parameter condition while.. do ; loop, if specific parameter is given, end for any deviation for. to. step. do ; Incrementing loop parameter with a given step width, end, if final value is reached

35 Such loop constructions are not implemented in the Assembler, because microprocessors do not directly support loops. There are only few exeptions : repeating I/O-commands used with the Z80 processor repeat-commands for the 80x86 processors Reapeating commands used at the PDP-11 und VAX-11 Otherwise at best to be found on the level of the assembler-directives.

36 Loop-like behaviour can be realized in the assembler only by using branch commands For further discussions we will define 3 specific points on loops. 1. Entry point (E) 2. leaping point (L) here branch - commands are important structure elements.

37 3. Loop boundary, given in the program by : (1) begin of Loop (LB) (2) end of loop (LE) The inner body of a loop is shortened by LI. The boundaries are also called interfaces, because last command of the loop (the prefixed strukture block) is connected with the first command of the the suffixed struktur block (the loop). If the end of the loop does not coincide with the leaping point (LE L), then an unconditional jump to the begin of the loop (LB) will be performed. In this case the end of the loop is marked by U.

38 Using the special points three meaningful categories can be introduced : I. leaping and entry point coincide ( E = L ) repellent loop (while loop) II. III. Entrypoint is the first command following the leaping point. ( E = L + 1 ) loop is executed at least once (repeat until - loop) Entry point has no correlation to the leaping point. a) E = LB, E = U is here included, because U means an unconditional jump to LB. b) E = LI

39 presentation of the most important loop-variants

40 Summary of all possible variants Category Discription valuation entry point ( E ) leaping point ( L ) jump from LE to LB I Rejection II a LB = L see left U acceptable a' LE LB* U nonsense b LE = L ; wtih U see left T good c LI ; with U see left U bad a LB LE T good a' LE ; with U LE - 1 U nonsense b LB+1 ; with U LB U acceptable c LI E ; with U LI E - 1 U bad a LB LI A U acceptable a' LE ; with U LI A * U nonsense b LI E ; with U LE T good III c LI E ; with U LB U acceptable d LI E ; with U LI A before LI E U bad e LI E ; with U LI A after LI E U bad f LE ; with U LI A U bad These cases are presented in above viewgraph * Because of the direct inconditional jump from the entry point LE to LB is this case identical with case (a), i.e. it is E=LB instead of LE. Due to this two immediate following unneccessary jumps, these cases are nonsense

41 Version I a cycles Command_V E ; last command of the prefixed strukture Ldy # n ; loop initialization LA : beq SufSt ; end of loop / rejection, if Z-flag has been set Command_S 1 : : ; 1. command of the loop 2 (3) k dey ; possibly Z-flag is set LE : jmp LA ; unconditional jump to the loop begin 3 SufSt: command_n 1 ; only reachable from LA by a jump : : Cycles balance : N Ia = n (2+k+3) + 3

42 Version I b cycles command_v E Ldy # n ; last command of prefixed structure ; loop Initialization jmp LE ; jump into the loop 3 LA : Befehl_S 1 ; 1. command of the loop : : dey ; possibly Z-flag is set LE : bne SA ; end of loop / rejection, if Z-flag has been gesetzt SufSt: command_n 1 ; without jump reachalbe from SE k 3 (2) : : Cycles balance : N Ib = 3 + n (3+k) + 2

43 Version II a cycles command_v E ; last command of the prefix structure Ldy # n ; loop initialization LA : command_s 1 ; 1. command of the loop (no rejection!) : : k dey ; possibly Z-flag is set LE : bne SA ; end of loop, if Z-flag has been set 3 (2) SufSt: Bef_N 1 ; without jump reachable from SE : : no jumps! Cycles balance : N IIa = n (k+3) + 2

44 S U M M A R Y : Especially for the assembler, loops must not be considered independently of prefixed and sufixed structure block. Time-Aspect : Loops including rejection branch (n=0 possible) Ia E = LA N Ia = n (k+5) + 3 is favorable only in the case of rejection Ib E = LE N Ib = n (k+3) + 5 Even faster (n 1) IIa E = LA N IIa = n (k+3) + 2

45 Aspekt of Memory Space: Difference between Ia and Ib : jmp - command in prefixed structure or loop the same memory space loop IIa compared to typ Ia/Ib no jmp - command disadvantage : 3 byte less in memory no entrance rejection

46 One Comment to jumps and branches Is an unconditional jump only possible by jmp-command? In 650X and 680X processors this seems to be true. Other processors, even the 65C02, know the bra-command (unconditional branch) Difference between jump and branch? Jmp : only absolute addressing ; 3 Bytes bra : only relative addressing ; sogar nur 2 Bytes disadvantage: limited jump width of 127 resp How is it possible to simulate the bra command in the 650X? clv ; 1 cycle bvc ; 3 cycles Why 3?

47 V. Subroutinetechniques

48 Content 1. Transfer of Parameters 2. Co-Routine-technique 3. Frame-Technique 4. Algorithms for Multiplication

49 1. Transfer of Parameters : Parameters can be : Values Indices, loop parameters Content of registers (e.g. counter) Addresses of memory cells (e.g. pointer)

50 With the 650X processor family lists of parameters are not possible in the calling command of subroutines (in contrast to Macros). How can parameter be transferred to subroutines? 1. via registers 2. via RAM memory cells a) Absolute addresses (no re-entrancy [re-en]) b) Ramp (memory region in program code) (no re-en) c) Argumentpointer (re-en, if Arg-pointer is saved to the stack) d) Deskciptors (datatyp, length and pointer) laborious, but realized in old VAX. 3. via the Stack

51 2. Co-Routines

the programm counter, which then is incremented by 1, i.e., is set to $4013.

52 As Reminder : example : $4010 JSR Power $4013 commandl_cont ; $4012 as jumping-back address ρ is put to the stack $wxyz Power rts ; memory address $4012 is taken from the stack and written into the programm counter, which then is incremented by 1, i.e., is set to $4013. Subroutines are called by jumps, i.e., the starting address of the subroutine must be written into the program counter.

500D JSR ADD 501C JSR MULT 5010 PLA 501F Cont: PLA 5011 JSR Mult_Resulz_*_Y 5020 CLC 5014 RTS 5021 ADC result 5024 LDA #0 5026

56 Example for a Pair-Co-Routine : Content ot the stack 5000 SBR: LDX TabX 5003 JSR MULT 5006 JMP END 5015 ADD: LDA TabX, x 5018 PHA 5009 MULT : FORMULA : F = Y N (X N +Y N-1 (X N-1 + +Y 2 (X 2 +Y 1 (X 1 +0)) )) LDA TABY, x 5019 DEX 500C PHA 501A BEQ CONT 500D JSR ADD 501C JSR MULT 5010 PLA 501F Cont: PLA 5011 JSR Mult_Resulz_*_Y 5020 CLC 5014 RTS 5021 ADC result 5024 LDA # ADC result RTS 502A END: RTS 502B TabX:.byte N, X 1, X 2,.. X N 502B+N TabY:.byte N, Y 1, Y 2,.. Y N 502B+2N result:.word $0000

COSC 243. Instruction Sets And Addressing Modes. Lecture 7&8 Instruction Sets and Addressing Modes. COSC 243 (Computer Architecture)

COSC 243. Instruction Sets And Addressing Modes. Lecture 7&8 Instruction Sets and Addressing Modes. COSC 243 (Computer Architecture) COSC 243 Instruction Sets And Addressing Modes 1 Overview This Lecture Source Chapters 12 & 13 (10 th editition) Textbook uses x86 and ARM (we use 6502) Next 2 Lectures Assembly language programming 2