ENGG 1203 Tutorial. Computer Arithmetic (1) Computer Arithmetic (3) Computer Arithmetic (2) Convert the following decimal values to binary:
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1 ENGG 203 Tutorial Computer Arithmetic () Computer Systems Supplementary Notes Learning Objectives Compute via Computer Arithmetic Evaluate the performance of processing via Amdahl s law News Revision tutorial (TBD) Convert the following decimal values to binary: a) 205 b) 233 Perform the following operations in the 2 s complement system. Use eight bits (including the sign bit) for each number. a) add 9 to 6 b) add 4 to -7 c) add 9 to Computer Arithmetic (2) Computer Arithmetic (3) Convert the following decimal values to binary: a) 205 b) x 2 7 x 2 6 x 2 3 x 2 2 x x 2 x 2 6 x 2 4 x 2 2 x Perform the following operations in the 2 s complement system. Use eight bits (including the sign bit) for each number. a) add 9 to 6 b) add 4 to -7 c) add 9 to ('s complement) (2's complement) 3 4
2 Overflow Addition using 2 s Complement () Overflow: Add two positive numbers to get a negative number or two negative numbers to get a positive number For 2 s complement, ()(6) 7 OK ()(7) -8 Overflow (-)(-8) 7 Overflow (-6)(7) - OK 5 Perform the following computations. Indicate on your answer if an overflow has occurred (64 65) (7 - -7) 6 Addition using 2 s Complement (2) Limitation of Parallel Processing? (64) (65) (-27) Overflow (7) (7) (4) No Overflow (-00) ExTimenew ExTimeold overall ExTime ExTime old new Best you could ever hope to do: ( ) maximum ( ) ( - ) 7 8
3 Limitation of Parallel Processing? Major challenge is: % of program inherently sequential Suppose 80X speedup from 00 processors. What fraction of original program can be sequential? a. 0% b. 5% c. % d. <% Limitation of Parallel Processing? overall 80 ( 80 ( ) ( ) ( ) ) / % 9 0 Speed-up via Parallel Computation A uniprocessor computer can operate in either sequential mode or mode. In mode, computations can be performed nine times faster than in sequential mode. A certain benchmark program took time to run on this computer. Furthermore, suppose that 25% of was spent in mode whereas the remaining portion was in sequential mode. (a) What is the effective speedup of the above execution as compared with the condition when mode is not used at all? (b) What is the fraction of ized code of the benchmark program? (c) Suppose we double the speed ratio between mode and the sequential mode by hardware improvements. What is the new effective speedup? (d) Suppose the speedup you calculated in (c) is to be obtained by software improvement alone in terms of ization fraction, instead of by any hardware improvement. What is the new ization fraction required? 2
4 Ratio of Speed-up via N Processors 3 4 Ratio of Speed-up with K Parallelized Tasks Your company has just bought a new server based on a dual-core Intel Core i7 processor, and you have been asked to optimize your software applications for this processor. You will run two applications on this server, but the resource requirements are not equal. The first application needs 80% of the resources, and the other only 20% of the resources. (a) Given that 40% of the first application is izable, how much speedup would you achieve with that application if run in isolation? (b) Given that 99% of the second application is izable, how much speedup would this application observe if run in isolation? (c) Given that 40% of the first application is izable, how much overall system speedup would you observe if you ized it? (d) Given that 99% of the second application is izable, how much overall system speedup would you get? In the answers in Parts (c) and (d) above, we assume that each application completely owns the whole system (i.e., both processor cores) during the time it is running. That is, there is no overlapping of the two applications in time-sharing the two processor cores. However, in reality, this might not be the case there should be some overlapping of execution of the two applications in order not to waste the resources. The following is an alternative way to determine an answer for Part (c). 5 6
5 In the above timing diagram, we assume that in completely serial mode, application takes 4T units of time so that application 2 takes T units of time, due to the 80% and 20% requirements, respectively. Now, in mode for application, the total time required is 3.2T because the speedup is.25. Furthermore, the part requires 0.8T units of time while the serial part requires 2.4T units of time because, as we determined in Part (a), the time versus serial time ratio is to 3 (0.2 vs. 0.6). Most importantly, as can seen from the diagram, processor core P2 is idle after the first 0.8T units of time and so it can actually run application 2, as shown. Thus, the overall time is still 3.2T for running both applications in the system. The speed up is therefore 5T/3.2T (Appendix) A tutorial for IEEE Floating Point representation 9
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