Packet Switch Architectures Part 2
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1 Packet Switch Architectures Part Adopted from: Sigcomm 99 Tutorial, by Nick McKeown and Balaji Prabhakar, Stanford University Slides used with permission from authors All rights reserved by authors. Tutorial Outline Introduction: What is a Packet Switch? Packet Lookup and Classification: Where does a packet go next? Switching Fabrics: How does the packet get there? Output Scheduling: When should the packet leave? Copyright 999. All Rights Reserved
2 Switching Fabrics Output and Input Queueing Output Queueing Input Queueing Scheduling algorithms Combining input and output queues Other non-blocking fabrics Multicast traffic Copyright 999. All Rights Reserved Basic Architectural Components Datapath: per-packet processing. Forwarding Table Forwarding Decision Forwarding Table. Interconnect. Output Scheduling Forwarding Decision Forwarding Table Forwarding Decision Copyright 999. All Rights Reserved
3 Interconnects Two basic techniques Input Queueing Output Queueing Usually a non-blocking switch fabric (e.g. crossbar) Usually a fast bus Copyright 999. All Rights Reserved 5 Interconnects Output Queueing Individual Output Queues Centralized Shared Memory Memory b/w = N.R N Memory b/w = (N+).R N Copyright 999. All Rights Reserved 6
4 Output Queueing The ideal Copyright 999. All Rights Reserved 7 Output Queueing How fast can we make centralized shared memory? Shared Memory 5ns SRAM N 5ns per memory operation Two memory operations per packet Therefore, up to 60Gb/s In practice, closer to 80Gb/s 00 byte bus Copyright 999. All Rights Reserved 8
5 Switching Fabrics Output and Input Queueing Output Queueing Input Queueing Scheduling algorithms Other non-blocking fabrics Combining input and output queues Multicast traffic Copyright 999. All Rights Reserved 9 Interconnects Input Queueing with Crossbar Memory b/w = R Scheduler Data In configuration Data Out Copyright 999. All Rights Reserved 0 5
6 Input Queueing Head of Line Blocking Delay Load 58.6% 00% Copyright 999. All Rights Reserved Head of Line Blocking Copyright 999. All Rights Reserved 6
7 Copyright 999. All Rights Reserved Copyright 999. All Rights Reserved 7
8 Input Queueing Virtual output queues Copyright 999. All Rights Reserved 5 Input Queues Virtual Output Queues Delay Load 00% Copyright 999. All Rights Reserved 6 8
9 Input Queueing Memory b/w = R Scheduler Can be quite complex! Copyright 999. All Rights Reserved 7 Input Queueing Scheduling Copyright 999. All Rights Reserved 8 9
10 Wave Front Arbiter Scheduling Algorithm Requests Match Copyright 999. All Rights Reserved 9 Wave Front Arbiter Requests Match Copyright 999. All Rights Reserved 0 0
11 Other Non-Blocking Fabrics Clos Network Copyright 999. All Rights Reserved Other Non-Blocking Fabrics Clos Network Expansion factor required = -/N (but still blocking for multicast) Copyright 999. All Rights Reserved
12 Other Non-Blocking Fabrics Self-Routing Networks Copyright 999. All Rights Reserved Other Non-Blocking Fabrics Self-Routing Networks The Non-blocking Batcher Banyan Network Batcher Sorter Self-Routing Network Fabric can be used as scheduler. Batcher-Banyan network is blocking for multicast. Copyright 999. All Rights Reserved
13 Switching Fabrics Output and Input Queueing Output Queueing Input Queueing Scheduling algorithms Other non-blocking fabrics Combining input and output queues Multicast traffic Copyright 999. All Rights Reserved 5 Speedup Context input-queued switches output-queued switches the speedup problem Early approaches Algorithms Implementation considerations Copyright 999. All Rights Reserved 6
14 Speedup: Context M e m o r y M e m o r y A generic switch The placement of memory gives - Output-queued switches - Input-queued switches - Combined input- and output-queued switches Copyright 999. All Rights Reserved 7 Output-queued switches Best delay and throughput performance - Possible to erect bandwidth firewalls between sessions Main problem - Requires high fabric speedup (S = N) Unsuitable for high-speed switching Copyright 999. All Rights Reserved 8
15 Input-queued switches Big advantage - Speedup of one is sufficient Main problem - Can t guarantee delay due to input contention Overcoming input contention: use higher speedup Copyright 999. All Rights Reserved 9 A Comparison Memory speeds for x switch Output-queued Input-queued Line Rate Memory BW Access Time Per cell Memory BW Access Time 00 Mb/s. Gb/s 8 ns 00 Mb/s. µs Gb/s Gb/s.8 ns Gb/s ns.5 Gb/s 8.5 Gb/s 5. ns 5 Gb/s 8.8 ns 0 Gb/s 0 Gb/s.8ns 0 Gb/s. ns Copyright 999. All Rights Reserved 0 5
16 The Speedup Problem Find a compromise: < Speedup << N - to get the performance of an OQ switch - close to the cost of an IQ switch If speedup >, then output buffers are Needed Switch with Combined Input-Output Queueing (CIOQ) Copyright 999. All Rights Reserved Using Speedup Copyright 999. All Rights Reserved 6
17 Intuition Speedup = Bernoulli IID inputs Fabric throughput =.58 Bernoulli IID inputs Speedup = Fabric throughput =.6 Copyright 999. All Rights Reserved Intuition (continued) Bernoulli IID inputs Speedup = Fabric throughput =.7 Bernoulli IID inputs Speedup = Fabric throughput =. Copyright 999. All Rights Reserved 7
18 The Ideal Solution Inputs Speedup = N? Speedup << N Outputs Question: Can we find - a simple and good algorithms - that exactly mimics output-queueing - regardless of switch sizes and traffic patterns? Copyright 999. All Rights Reserved 5 What is exact mimicking? Apply same inputs to an OQ and a CIOQ switch - packet by packet Obtain same outputs - packet by packet Copyright 999. All Rights Reserved 6 8
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