Introduction to ATM Technology
|
|
- Madison Morton
- 5 years ago
- Views:
Transcription
1 Introduction to ATM Technology ATM Switch Design Switching network (N x N) Switching network (N x N) SP CP SP CP
2 Presentation Outline Generic Switch Architecture Specific examples Shared Buffer Switch Shared Medium Switch Space Division Switches Sunshine Switch Knockout Switch Conclusions Semester Advanced Telecommunications Slide 2
3 Objectives To demonstrate the factors influencing the design of high speed switching systems. To develop an understanding of the various advantages and disadvantages associated with modern ATM switch design. Semester Advanced Telecommunications Slide 3
4 Generic ATM Switch Architecture - 1 The basic components of an ATM switch are: Line interfaces () Call processor (CP) Signal processor (SP) A switching network Performs optical to electrical conversion and cell synchronisation CP and SP Perform functions concerned with ATM setup and release. The CP and SP can be connected in two different ways. (See next slide.) In front signal processing, signalling packets are transferred through a separate bus to the CP and SP. In rear signal processing, the signalling and control is handled in a unified manner with the user traffic. Hardware is thus simplified compared with front signal processing. Switching network Handles the packets after processing. Semester Advanced Telecommunications Slide 4
5 Generic ATM Switch Architecture - 2 Switching network (N x N) Switching network (N x N) SP CP SP CP Front signal processing Rear signal processing ATM Switch ATM Switch Semester Advanced Telecommunications Slide 5
6 Classification of ATM Switches Designers have developed a large number of different ATM switches. Broadly speaking, they can be classified according to work done by Tobagi in 1990 as: Shared Buffer Switch Shared Medium Switch Space Division Switch Each of the above types will be briefly reviewed in subsequent slides. Semester Advanced Telecommunications Slide 6
7 Shared Buffer Switch - 1 Main features are: Single buffer memory is shared by all input and output lines - as shown in the next slide. Packets arriving at the input lines are multiplexed into a single stream and sent to the shared memory according to their destination addresses. The output stream is created by retrieving packets in the output queues in a sequential manner. Output stream is then demultiplexed to distribute the packets to the individual output lines. High speed controllers and memories. Semester Advanced Telecommunications Slide 7
8 Shared Buffer Switch MUX Shared Buffer Memory DMUX 1 N N Memory Controller Basic structure of a shared buffer switch Semester Advanced Telecommunications Slide 8
9 Shared Buffer Switch - 3 Advantages: Efficient buffer utilisation Easy accommodation of point-to-multipoint services Priority control based buffer management Disadvantages: Switch size will be limited by speed of the controllers and memory. Difficulties in extending to large network switches. Semester Advanced Telecommunications Slide 9
10 Shared Medium Switch - 1 Main features: All packets arriving at the input lines are synchronously multiplexed onto a common high speed medium of bandwidth equal to N times the rate of a single input line. Each output line is connected to the bus via an interface that consists of an address filter (AF) and an output queue that operates as First-In-First-Out (FIFO). The Afs determine whether or not the packet observed in the bus is to be written to the FIFO queue. Advantage: Point to multipoint services easily accommodated. Disadvantage: Since independent queues are used at the output lines, we see that buffer utilisation is not efficient. Semester Advanced Telecommunications Slide 10
11 Shared Medium Switch - 2 S/P AF FIFO P/S Time division bus S/P AF FIFO P/S S/P AF FIFO P/S Basic structure of a shared medium switch Semester Advanced Telecommunications Slide 11
12 Space Division Switches - 1 These switches provide a path from the input line to the output line in a space division fashion in a similar manner to that performed by conventional circuit switched networks. Advantage: In this type of switch, we find that it is possible to set up several different paths simultaneously. Contrast this with the previous two approaches where paths are set up sequentially in a time division fashion. This difference means that these switches can operate at lower speeds than the others mentioned above. Disadvantage: It is conceivable that not all packets can be transmitted to their desired destination due to conflicts caused by resource limitations. (Analogously to their circuit switched counterparts!) The designs that have been developed set out to overcome this important limitation. Semester Advanced Telecommunications Slide 12
13 Space Division Switches - 2 Space Division Switches can be classified into at least four different categories depending upon how the buffers are arranged, viz: Input Buffer Switch Output Buffer Switch Input/Output Buffer Switch Internal Buffer Switch In addition, we can further subdivide these switches into two categories: Blocking Non-blocking As expected, non blocking switches are better but harder and more expensive to design. Semester Advanced Telecommunications Slide 13
14 Multistage Interconnection Network Multistage networks are commonplace in circuit switched networks. Their objective is to minimise internal congestion and provide internal path diversity. In space division ATM switches the same objective is valid. The Multistage Interconnection Network (MIN) structure consists of multiple stages of simple 2 x 2 switching elements that perform specified permutation function patterns. The names of the MIN structures differ according to the interconnection pattern between the stages. Examples of such MIN structures are known as: Banyan networks Baseline networks Shuffle-exchange networks Flip networks Note that although there are differences in the patterns for interconnection, they don t necessarily lead to differences in performance. Semester Advanced Telecommunications Slide 14
15 Example Space Division Switches - 1 Interconnection pattern for a Banyan Network Semester Advanced Telecommunications Slide 15
16 Example Space Division Switches - 2 Interconnection pattern for a Baseline Network Semester Advanced Telecommunications Slide 16
17 Example Space Division Switches - 3 Interconnection pattern for a Shuffle Exchange (OMEGA) Network Semester Advanced Telecommunications Slide 17
18 Example Space Division Switches - 4 Interconnection pattern for a Flip Network Semester Advanced Telecommunications Slide 18
19 Routing in a Space Division Switch ATM cell You try! ATM cell Routing in an 8x8 Baseline network Semester Advanced Telecommunications Slide 19
20 Batcher-Banyan Network - 1 The Batcher-Banyan network is an example of a nonblocking network that retains the capability of selfrouting whilst overcoming the internal blocking drawback of a simple Banyan network. This network can avoid internal blocking by sorting the incoming packets based on their destination addresses first, and then routing them through the Banyan network. This network requires N 2 log 1 N 2 ( 1+ log ) N network elements Semester Advanced Telecommunications Slide 20
21 Batcher-Banyan Network - 2 2x2 Sorter 4x4 Sorter 8x8 Sorter Batcher sorting network Banyan network Key: a b Min(a,b) Max(a,b) a b Max(a,b) Min(a,b) Semester Advanced Telecommunications Slide 21
22 Input Buffer Switch In these switches, a nonblocking switching network is used as the switching network and a dedicated buffer is allocated for each input port. The switching network can only transfer one packet to each output port in each time slot, so an arbitrator is required to avoid packet conflicts that can occur in the switching network. As a result of so called Head of Line blocking throughput can be limited under certain conditions. A method for overcoming HOL blocking is to use a ring reservation scheme - this is actually a token ring scheme. Semester Advanced Telecommunications Slide 22
23 Structure of Input Buffer Switch Token generator Controller Controller Non-blocking switching network Controller Controller Non-blocking switching network Controller Arbitrator Controller Input buffer switch with an arbitrator Ring reservation scheme Semester Advanced Telecommunications Slide 23
24 Output Buffer Switch If incoming packets are uniform with input load rate p and if each output port can have L packets simultaneously, then the loss probability for packets is given by [Hluchyj88]: If P Loss = 10-6, then the required value of L=8. This allows us to construct an ATM switch with L=8 with dedicated buffers on each output port. The following slide shows the basic structure of this switch. Specific examples of output buffer switches include Sunshine switch Knockout switch N 1 p p PLoss = ( k L) 1 p k= L+ 1 N N Semester Advanced Telecommunications Slide 24 k N k
25 Structure of Output Buffer Switch Interface module Interconnection Interconnection fabric fabric Interface module Semester Advanced Telecommunications Slide 25
26 Knockout Switch - 1 In this network, N inputs form N buses that are directly connected to each of the N interface modules. Advantages: Good modularity Broadcast and multicast capabilities The interface module: Packet filter Examines addresses of each packet on each bus and filters them, removing any addressed to itself. Concentrator Concentrates packets down to L output lines Shared buffer Secures FIFO buffers equivalent to a single queue of L inputs and one output for each interface module to store the concentrator output packets. Disadvantage: Difficult to implement large size knockout switches due to large fan outs with each bus. Semester Advanced Telecommunications Slide 26
27 Knockout Switch N Interface Module Interface Module Interface Module 1 2 N Semester Advanced Telecommunications Slide 27
28 Sunshine Switch - 1 A Batcher network and L Banyan networks are used as the interconnection fabric. All incoming packets are first sorted by the front-end Batcher network according to their destination addresses. They are then transferred to their output port via L parallel Banyan networks simultaneously. Disadvantage: If more than L packets are destined for the same output port then the number of packets exceeding this total are transferred to a delay circuit to rejoin the sorting operation at the next time slot. Semester Advanced Telecommunications Slide 28
29 Sunshine Switch - 2 T Delay Circuit T Banyan 1 OPC 1 IPC 1 IPC 2 Batcher sorting network N+T Trap network N+T Concentrator N+T Selector Banyan 2 OPC 2 IPC N Key: IPC - Input Port Controller Banyan L OPC N OPC - Output Port Controller Semester Advanced Telecommunications Slide 29
30 Point to Multipoint Services Copy network TNT TNT TNT Point to point switching network TNT = Trunk number translator To provide these services, it is necessary to take into account the architecture of the switch. Some switches can easily accommodate the requirement, while others require modification. The switches based on banyan networks require a packet replication capability as illustrated above. Semester Advanced Telecommunications Slide 30
31 Conclusions ATM switches will be required to handle many tens of thousands of high speed ports in future networks. Most of the architectures discussed in this presentation are not easily scaled up to cope with this size. New switches are under development. In the meantime, a popular method for designing a large scale system has been to interconnect many small switch modules so that the overall system can meet the switching requirements. Semester Advanced Telecommunications Slide 31
BROADBAND AND HIGH SPEED NETWORKS
BROADBAND AND HIGH SPEED NETWORKS ATM SWITCHING ATM is a connection-oriented transport concept An end-to-end connection (virtual channel) established prior to transfer of cells Signaling used for connection
More informationIV. PACKET SWITCH ARCHITECTURES
IV. PACKET SWITCH ARCHITECTURES (a) General Concept - as packet arrives at switch, destination (and possibly source) field in packet header is used as index into routing tables specifying next switch in
More informationA Proposal for a High Speed Multicast Switch Fabric Design
A Proposal for a High Speed Multicast Switch Fabric Design Cheng Li, R.Venkatesan and H.M.Heys Faculty of Engineering and Applied Science Memorial University of Newfoundland St. John s, NF, Canada AB X
More informationSwitching. An Engineering Approach to Computer Networking
Switching An Engineering Approach to Computer Networking What is it all about? How do we move traffic from one part of the network to another? Connect end-systems to switches, and switches to each other
More informationMulticast ATM Switches: Survey and Performance Evaluation. Ming-Huang Guo and Ruay-Shiung Chang
Multicast ATM Switches: Survey and Performance Evaluation Ming-Huang Guo and Ruay-Shiung Chang Department of Information Management ational Taiwan University of Science and Technology Taipei, Taiwan, ROC,
More informationA High Performance ATM Switch Architecture
A High Performance ATM Switch Architecture Hong Xu Chen A thesis submitted for the degree of Doctor of Philosophy at The Swinburne University of Technology Faculty of Information and Communication Technology
More informationCMPE 150/L : Introduction to Computer Networks. Chen Qian Computer Engineering UCSC Baskin Engineering Lecture 11
CMPE 150/L : Introduction to Computer Networks Chen Qian Computer Engineering UCSC Baskin Engineering Lecture 11 1 Midterm exam Midterm this Thursday Close book but one-side 8.5"x11" note is allowed (must
More informationCSE398: Network Systems Design
CSE398: Network Systems Design Instructor: Dr. Liang Cheng Department of Computer Science and Engineering P.C. Rossin College of Engineering & Applied Science Lehigh University March 14, 2005 Outline Classification
More informationBROADBAND AND HIGH SPEED NETWORKS
BROADBAND AND HIGH SPEED NETWORKS SWITCHING A switch is a mechanism that allows us to interconnect links to form a larger network. A switch is a multi-input, multi-output device, which transfers packets
More informationECE 697J Advanced Topics in Computer Networks
ECE 697J Advanced Topics in Computer Networks Switching Fabrics 10/02/03 Tilman Wolf 1 Router Data Path Last class: Single CPU is not fast enough for processing packets Multiple advanced processors in
More informationChapter - 7. Multiplexing and circuit switches
Chapter - 7 Multiplexing and circuit switches Multiplexing Multiplexing is used to combine multiple communication links into a single stream. The aim is to share an expensive resource. For example several
More informationCircuit Switching and Packet Switching
Chapter 10: Circuit Switching and Packet Switching CS420/520 Axel Krings Page 1 Switching Networks Long distance transmission is typically done over a network of switched nodes Nodes not concerned with
More informationGeneric Architecture. EECS 122: Introduction to Computer Networks Switch and Router Architectures. Shared Memory (1 st Generation) Today s Lecture
Generic Architecture EECS : Introduction to Computer Networks Switch and Router Architectures Computer Science Division Department of Electrical Engineering and Computer Sciences University of California,
More informationATM Switches. Switching Technology S ATM switches
ATM Switches Switching Technology S38.65 http://www.netlab.hut.fi/opetus/s3865 9 - ATM switches General of ATM switching Structure of an ATM switch Example switch implementations Knockout switch Abacus
More informationCSE 3214: Computer Network Protocols and Applications Network Layer
CSE 314: Computer Network Protocols and Applications Network Layer Dr. Peter Lian, Professor Department of Computer Science and Engineering York University Email: peterlian@cse.yorku.ca Office: 101C Lassonde
More informationEECS 122: Introduction to Computer Networks Switch and Router Architectures. Today s Lecture
EECS : Introduction to Computer Networks Switch and Router Architectures Computer Science Division Department of Electrical Engineering and Computer Sciences University of California, Berkeley Berkeley,
More informationThe Network Layer and Routers
The Network Layer and Routers Daniel Zappala CS 460 Computer Networking Brigham Young University 2/18 Network Layer deliver packets from sending host to receiving host must be on every host, router in
More informationRouter Architectures
Router Architectures Venkat Padmanabhan Microsoft Research 13 April 2001 Venkat Padmanabhan 1 Outline Router architecture overview 50 Gbps multi-gigabit router (Partridge et al.) Technology trends Venkat
More informationChapter 10. Circuits Switching and Packet Switching 10-1
Chapter 10 Circuits Switching and Packet Switching 10-1 Content Switched communication networks Circuit switching networks Circuit-switching concepts Packet-switching principles X.25 (mentioned but not
More informationWilliam Stallings Data and Computer Communications 7 th Edition. Chapter 10 Circuit Switching and Packet Switching
William Stallings Data and Computer Communications 7 th Edition Chapter 10 Circuit Switching and Packet Switching Switching Networks Long distance transmission is typically done over a network of switched
More informationSwitching Hardware. Spring 2015 CS 438 Staff, University of Illinois 1
Switching Hardware Spring 205 CS 438 Staff, University of Illinois Where are we? Understand Different ways to move through a network (forwarding) Read signs at each switch (datagram) Follow a known path
More informationSpace-division switch fabrics. Copyright 2003, Tim Moors
1 Space-division switch fabrics 2 Outline: Space-division switches Single-stage Crossbar, Knockout Staged switches: Multiple switching elements between input and output Networks of basic elements Clos
More informationCS4700/CS5700 Fundaments of Computer Networks
CS4700/CS5700 Fundaments of Computer Networks Lecture 4: Fundamental network design issues Slides used with permissions from Edward W. Knightly, T. S. Eugene Ng, Ion Stoica, Hui Zhang Alan Mislove amislove
More informationChapter 4 Network Layer
Chapter 4 Network Layer Computer Networking: A Top Down Approach Featuring the Internet, 3 rd edition. Jim Kurose, Keith Ross Addison-Wesley, July 2004. Network Layer 4-1 Chapter 4: Network Layer Chapter
More informationDesigning Efficient Benes and Banyan Based Input-Buffered ATM Switches
Designing Efficient Benes and Banyan Based Input-Buffered ATM Switches Rajendra V. Boppana Computer Science Division The Univ. of Texas at San Antonio San Antonio, TX 829- boppana@cs.utsa.edu C. S. Raghavendra
More informationPacket Switch Architectures Part 2
Packet Switch Architectures Part Adopted from: Sigcomm 99 Tutorial, by Nick McKeown and Balaji Prabhakar, Stanford University Slides used with permission from authors. 999-000. All rights reserved by authors.
More informationA Survey of ATM Switching Techniques
Page 1 of 23 A Survey of ATM Switching Techniques Sonia Fahmy < fahmy@cse.ohio-state.edu> Abstract -Asynchronous Transfer Mode (ATM) switching is not defined in the ATM standards, but a lot of research
More informationCommunication Networks
Communication Networks Chapter 3 Multiplexing Frequency Division Multiplexing (FDM) Useful bandwidth of medium exceeds required bandwidth of channel Each signal is modulated to a different carrier frequency
More informationLecture (05) Network interface Layer media & switching II
Lecture (05) Network interface Layer media & switching II By: ElShafee ١ Agenda Circuit switching technology (cont,..) Packet switching technique Telephone network ٢ Circuit switching technology (cont,..)
More informationBROADBAND PACKET SWITCHING TECHNOLOGIES
BROADBAND PACKET SWITCHING TECHNOLOGIES A Practical Guide to ATM Switches and IP Routers H. JONATHAN CHAO CHEUK H. LAM EMI OKI A Wiley-lnterscience Publication JOHN WILEY & SONS, INC. New York / Chichester
More informationATM Switch Architectures. Sanjeev Verma. A Report. The Department. Electrical and Computer Engineering. Concordia University. Montreal, Quebec, Canada
ATM Switch Architectures Sanjeev Verma A Report in The Department of Electrical and Computer Engineering Concordia University Montreal, Quebec, Canada August 1994 Contents 1 Introduction 5 1.1 General
More informationPERFORMANCE OF A THREE-STAGE BANYAN-BASED ARCHITECTURE WITH INPUT AND OUTPUT BUFFERS FOR LARGE FAST PACKET SWITCHES
I PERFORMANCE OF A THREE-STAGE BANYAN-BASED ARCHITECTURE WITH INPUT AND OUTPUT BUFFERS FOR LARGE FAST PACKET SWITCHES Fabio M. Chiussi and Fouad A. Tobagi Technical Report No. CSL-TR-93-573 June 1993 This
More informationChapter 4. Computer Networking: A Top Down Approach 5 th edition. Jim Kurose, Keith Ross Addison-Wesley, sl April 2009.
Chapter 4 Network Layer A note on the use of these ppt slides: We re making these slides freely available to all (faculty, students, readers). They re in PowerPoint form so you can add, modify, and delete
More informationCell Format. Housekeeping. Segmentation and Reassembly AAL 3/4
Housekeeping 1 st Project Handout ue Friday Oct 5 Quiz: Friday Sept 21 Material covered so far 1 st Test October 12 Cell Format User-Network Interface (UNI) 4 8 16 3 1 GFC VPI VCI Type CLP 8 HEC (CRC-8)
More informationTopic 4a Router Operation and Scheduling. Ch4: Network Layer: The Data Plane. Computer Networking: A Top Down Approach
Topic 4a Router Operation and Scheduling Ch4: Network Layer: The Data Plane Computer Networking: A Top Down Approach 7 th edition Jim Kurose, Keith Ross Pearson/Addison Wesley April 2016 4-1 Chapter 4:
More informationRouters: Forwarding EECS 122: Lecture 13
Routers: Forwarding EECS 122: Lecture 13 epartment of Electrical Engineering and Computer Sciences University of California Berkeley Router Architecture Overview Two key router functions: run routing algorithms/protocol
More informationINTRODUCTORY COMPUTER
INTRODUCTORY COMPUTER NETWORKS TYPES OF NETWORKS Faramarz Hendessi Introductory Computer Networks Lecture 4 Fall 2010 Isfahan University of technology Dr. Faramarz Hendessi 2 Types of Networks Circuit
More informationModule 1. Introduction. Version 2, CSE IIT, Kharagpur
Module 1 Introduction Version 2, CSE IIT, Kharagpur Introduction In this module we shall highlight some of the basic aspects of computer networks in two lessons. In lesson 1.1 we shall start with the historical
More informationHW3 and Quiz. P14, P24, P26, P27, P28, P31, P37, P43, P46, P55, due at 3:00pm with both soft and hard copies, 11/11/2013 (Monday) TCP), 20 mins
HW3 and Quiz v HW3 (Chapter 3): R1, R2, R5, R6, R7, R8, R15, P14, P24, P26, P27, P28, P31, P37, P43, P46, P55, due at 3:00pm with both soft and hard copies, 11/11/2013 (Monday) v Quiz: 10/30/2013, Wednesday,
More informationCHAPTER 3 ATM SWITCHING PRINCIPLES AND DESIGN ISSUES
22 CHAPTER 3 ATM SWITCHING PRINCIPLES AND DESIGN ISSUES With the phenomenal growth in the speeds of optical transmission systems, there is severe pressure on switch designers to develop switches that match
More informationRouters: Forwarding EECS 122: Lecture 13
Input Port Functions Routers: Forwarding EECS 22: Lecture 3 epartment of Electrical Engineering and Computer Sciences University of California Berkeley Physical layer: bit-level reception ata link layer:
More informationInternet Architecture and Protocol
Internet Architecture and Protocol Set# 04 Wide Area Networks Delivered By: Engr Tahir Niazi Wide Area Network Basics Cover large geographical area Network of Networks WANs used to be characterized with
More informationCell Switching (ATM) Commonly transmitted over SONET other physical layers possible. Variable vs Fixed-Length Packets
Cell Switching (ATM) Connection-oriented packet-switched network Used in both WAN and LAN settings Signaling (connection setup) Protocol: Q2931 Specified by ATM forum Packets are called cells 5-byte header
More informationLecture (04 & 05) Packet switching & Frame Relay techniques Dr. Ahmed ElShafee
Agenda Lecture (04 & 05) Packet switching & Frame Relay techniques Dr. Ahmed ElShafee Packet switching technique Packet switching protocol layers (X.25) Frame Relay ١ Dr. Ahmed ElShafee, ACU Fall 2011,
More informationLecture (04 & 05) Packet switching & Frame Relay techniques
Lecture (04 & 05) Packet switching & Frame Relay techniques Dr. Ahmed ElShafee ١ Dr. Ahmed ElShafee, ACU Fall 2011, Networks I Agenda Packet switching technique Packet switching protocol layers (X.25)
More informationDESIGN OF MULTICAST SWITCHES FOR SANS
DESIGN OF MULTICAST SWITCHES FOR SANS APPROVED BY SUPERVISING COMMITTEE: Dr. Rajendra V. Boppana, Supervising Professor Dr. Turgay Korkmaz Dr. Weining Zhang Accepted: Dean of Graduate Studies DESIGN OF
More informationOutline: Connecting Many Computers
Outline: Connecting Many Computers Last lecture: sending data between two computers This lecture: link-level network protocols (from last lecture) sending data among many computers 1 Review: A simple point-to-point
More informationCS 552 Computer Networks
CS 55 Computer Networks IP forwarding Fall 00 Rich Martin (Slides from D. Culler and N. McKeown) Position Paper Goals: Practice writing to convince others Research an interesting topic related to networking.
More information4. Networks. in parallel computers. Advances in Computer Architecture
4. Networks in parallel computers Advances in Computer Architecture System architectures for parallel computers Control organization Single Instruction stream Multiple Data stream (SIMD) All processors
More informationKnockout Switches. HIGH PERFORMANCE SWITCHES AND ROUTERS Wiley H. JONATHAN CHAO and BIN LIU Instructor: Mansour Rousta Zadeh
HIGH PERFORMANCE SWITCHES AND ROUTERS Wiley H. JONATHAN CHAO and BIN LIU Instructor: Mansour Rousta Zadeh Outlines Introduction Single Stage Knockout-Basic Architecture Knockout Concentration Principle
More informationCONGESTION CONTROL BY USING A BUFFERED OMEGA NETWORK
IADIS International Conference on Applied Computing CONGESTION CONTROL BY USING A BUFFERED OMEGA NETWORK Ahmad.H. ALqerem Dept. of Comp. Science ZPU Zarka Private University Zarka Jordan ABSTRACT Omega
More informationIntroduction. The fundamental purpose of data communications is to exchange information between user's computers, terminals and applications programs.
Introduction The fundamental purpose of data communications is to exchange information between user's computers, terminals and applications programs. Simplified Communications System Block Diagram Intro-1
More informationHWP2 Application level query routing HWP1 Each peer knows about every other beacon B1 B3
HWP2 Application level query routing HWP1 Each peer knows about every other beacon B2 B1 B3 B4 B5 B6 11-Feb-02 Computer Networks 1 HWP2 Query routing searchget(searchkey, hopcount) Rget(host, port, key)
More informationCMSC 332 Computer Networks Network Layer
CMSC 332 Computer Networks Network Layer Professor Szajda CMSC 332: Computer Networks Where in the Stack... CMSC 332: Computer Network 2 Where in the Stack... Application CMSC 332: Computer Network 2 Where
More informationNetwork layer (addendum) Slides adapted from material by Nick McKeown and Kevin Lai
Network layer (addendum) Slides adapted from material by Nick McKeown and Kevin Lai Routers.. A router consists - A set of input interfaces at which packets arrive - A set of output interfaces from which
More informationModule 10 Frame Relay and ATM
Module 10 Frame Relay and ATM Lesson 34 ATM: Concepts And Header 10.2.1 INTRODUCTION IP has a varying packet size which causes no problem while multiplexing but makes switching difficult. ATM uses a fixed
More informationComputer Networks. Instructor: Niklas Carlsson
Computer Networks Instructor: Niklas Carlsson Email: niklas.carlsson@liu.se Notes derived from Computer Networking: A Top Down Approach, by Jim Kurose and Keith Ross, Addison-Wesley. The slides are adapted
More informationDesign and Implementation of a Fault Tolerant ATM Switch *
JOURNAL OF INFORMATION SCIENCE FAULT AND TOLERANT ENGINEERING ATM, SWITCH - (999) Design and Implementation of a Fault Tolerant ATM Switch * Department of Computer and Information Science National Chiao
More informationCOPYRIGHTED MATERIAL INTRODUCTION AND OVERVIEW
1 INTRODUCTION AND OVERVIEW The past few decades have seen the merging of computer and communication technologies Wide-area and local-area computer networks have been deployed to interconnect computers
More informationSwitching CHAPTER 8. Figure 8.1
CHAPTER 8 Switching A network is a set of connected devices. Whenever we have multiple devices, we have the problem of how to connect them to make one-to-one communication possible. One solution is to
More informationInternetworking Part 1
CMPE 344 Computer Networks Spring 2012 Internetworking Part 1 Reading: Peterson and Davie, 3.1 22/03/2012 1 Not all networks are directly connected Limit to how many hosts can be attached Point-to-point:
More informationStructure and Performance Evaluation of a Replicated Banyan Network Based ATM Switch
Structure and Performance Evaluation of a Replicated Banyan Network Based ATM Switch Moustafa A. Youssef, Mohamed N. El-Derini, and Hussien H. Aly Department of Computer Science and Automatic Control,
More informationBridging and Switching Basics
CHAPTER 4 Bridging and Switching Basics This chapter introduces the technologies employed in devices loosely referred to as bridges and switches. Topics summarized here include general link-layer device
More informationLocal Area Networks (LANs): Packets, Frames and Technologies Gail Hopkins. Part 3: Packet Switching and. Network Technologies.
Part 3: Packet Switching and Gail Hopkins Local Area Networks (LANs): Packets, Frames and Technologies Gail Hopkins Introduction Circuit Switching vs. Packet Switching LANs and shared media Star, bus and
More informationPacket Switching. Hongwei Zhang Nature seems to reach her ends by long circuitous routes.
Problem: not all networks are directly connected Limitations of directly connected networks: limit on the number of hosts supportable limit on the geographic span of the network Packet Switching Hongwei
More informationOverview of Networks
CMPT765/408 08-1 Overview of Networks Qianping Gu 1 Overview of Networks This note is mainly based on Chapters 1-2 of High Performance of Communication Networks by J. Walrand and P. Pravin, 2nd ed, and
More informationCOMPUTER NETWORK Model Test Paper
Model Test Paper Question no. 1 is compulsory. Attempt all parts. Q1. Each question carries equal marks. (5*5 marks) A) Difference between Transmission Control Protocol (TCP) and User Datagram Protocol.
More informationLS Example 5 3 C 5 A 1 D
Lecture 10 LS Example 5 2 B 3 C 5 1 A 1 D 2 3 1 1 E 2 F G Itrn M B Path C Path D Path E Path F Path G Path 1 {A} 2 A-B 5 A-C 1 A-D Inf. Inf. 1 A-G 2 {A,D} 2 A-B 4 A-D-C 1 A-D 2 A-D-E Inf. 1 A-G 3 {A,D,G}
More informationWide area networks: packet switching and congestion
Wide area networks: packet switching and congestion Packet switching ATM and Frame Relay Congestion Circuit and Packet Switching Circuit switching designed for voice Resources dedicated to a particular
More informationThis chapter provides the background knowledge about Multistage. multistage interconnection networks are explained. The need, objectives, research
CHAPTER 1 Introduction This chapter provides the background knowledge about Multistage Interconnection Networks. Metrics used for measuring the performance of various multistage interconnection networks
More informationWave Division Multiplexing. Circuit Switching (1) Switching Networks. Nodes. Last Lecture Multiplexing (2) Source: chapter8
Circuit Switching (1) Last Lecture Multiplexing (2) Source: chapter8 This Lecture Circuit switching (1) Source: chapter9 Next Lecture Circuit switching (2) Source: chapter 9 Reference books A. Tanenbaum,
More informationFIRM: A Class of Distributed Scheduling Algorithms for High-speed ATM Switches with Multiple Input Queues
FIRM: A Class of Distributed Scheduling Algorithms for High-speed ATM Switches with Multiple Input Queues D.N. Serpanos and P.I. Antoniadis Department of Computer Science University of Crete Knossos Avenue
More informationTOC: Switching & Forwarding
TOC: Switching & Forwarding Why? Switching Techniques Switch Characteristics Switch Examples Switch Architectures Summary TOC Switching Why? Direct vs. Switched Networks: n links Single link Direct Network
More informationTOC: Switching & Forwarding
TOC: Switching & Forwarding Why? Switching Techniques Switch Characteristics Switch Examples Switch Architectures Summary Why? Direct vs. Switched Networks: Single link Switches Direct Network Limitations:
More informationIntroduction to Communications Part One: Physical Layer Switching
Introduction to Communications Part One: Physical Layer Switching Kuang Chiu Huang TCM NCKU Spring/2008 Goals of This Lecture Through the lecture and in-class discussion, students are enabled to compare
More informationChapter 4 Network Layer: The Data Plane
Chapter 4 Network Layer: The Data Plane A note on the use of these Powerpoint slides: We re making these slides freely available to all (faculty, students, readers). They re in PowerPoint form so you see
More informationLecture (03) Circuit switching
Agenda Lecture (03) Circuit switching Switched communication network Circuit switching technology Dr. Ahmed ElShafee ١ Dr. Ahmed ElShafee, ACU Fall 2011, Networks I ٢ Dr. Ahmed ElShafee, ACU Fall 2011,
More informationEE 122: Router Design
Routers EE 22: Router Design Kevin Lai September 25, 2002.. A router consists - A set of input interfaces at which packets arrive - A set of output interfaces from which packets depart - Some form of interconnect
More informationNETWORK TOPOLOGIES. Application Notes. Keywords Topology, P2P, Bus, Ring, Star, Mesh, Tree, PON, Ethernet. Author John Peter & Timo Perttunen
Application Notes NETWORK TOPOLOGIES Author John Peter & Timo Perttunen Issued June 2014 Abstract Network topology is the way various components of a network (like nodes, links, peripherals, etc) are arranged.
More informationCS455: Introduction to Distributed Systems [Spring 2018] Dept. Of Computer Science, Colorado State University
CS 455: INTRODUCTION TO DISTRIBUTED SYSTEMS [NETWORKING] Shrideep Pallickara Computer Science Colorado State University Frequently asked questions from the previous class survey Why not spawn processes
More informationIslamic University of Gaza Faculty of Engineering Department of Computer Engineering ECOM 4021: Networks Discussion. Chapter 1.
Islamic University of Gaza Faculty of Engineering Department of Computer Engineering ECOM 4021: Networks Discussion Chapter 1 Foundation Eng. Haneen El-Masry February, 2014 A Computer Network A computer
More informationDISTRIBUTED EMBEDDED ARCHITECTURES
DISTRIBUTED EMBEDDED ARCHITECTURES A distributed embedded system can be organized in many different ways, but its basic units are the Processing Elements (PE) and the network as illustrated in Figure.
More informationCSCI Computer Networks
CSCI-1680 - Computer Networks Link Layer III: LAN & Switching Chen Avin Based partly on lecture notes by David Mazières, Phil Levis, John Jannotti, Peterson & Davie, Rodrigo Fonseca Today: Link Layer (cont.)
More informationSample Routers and Switches. High Capacity Router Cisco CRS-1 up to 46 Tb/s thruput. Routers in a Network. Router Design
outer Design outers in a Network Overview of Generic outer Architecture Input-d Switches (outers) IP Look-up Algorithms Packet Classification Algorithms Sample outers and Switches Cisco 46 outer up to
More informationKey Network-Layer Functions
Network Layer: Routing & Forwarding Instructor: Anirban Mahanti Office: ICT 745 Email: mahanti@cpsc.ucalgary.ca Class Location: ICT 121 Lectures: MWF 12:00 12:50 hours Notes derived from Computer Networking:
More informationUNIT-II OVERVIEW OF PHYSICAL LAYER SWITCHING & MULTIPLEXING
1 UNIT-II OVERVIEW OF PHYSICAL LAYER SWITCHING & MULTIPLEXING Syllabus: Physical layer and overview of PL Switching: Multiplexing: frequency division multiplexing, wave length division multiplexing, synchronous
More informationRouter Construction. Workstation-Based. Switching Hardware Design Goals throughput (depends on traffic model) scalability (a function of n) Outline
Router Construction Outline Switched Fabrics IP Routers Tag Switching Spring 2002 CS 461 1 Workstation-Based Aggregate bandwidth 1/2 of the I/O bus bandwidth capacity shared among all hosts connected to
More informationDE62 TELECOMMUNICATION SWITCHING SYSTEMS JUN 2015
Q.2 a. With neat diagrams explain the configuration of a step-by-step switching system. (8) b. List the basic functions of a switching system. (8) The switching office performs the following basic functions
More information2. LAN Topologies Gilbert Ndjatou Page 1
2. LAN Topologies Two basic categories of network topologies exist, physical topologies and logical topologies. The physical topology of a network is the cabling layout used to link devices. This refers
More informationUNIT- 2 Physical Layer and Overview of PL Switching
UNIT- 2 Physical Layer and Overview of PL Switching 2.1 MULTIPLEXING Multiplexing is the set of techniques that allows the simultaneous transmission of multiple signals across a single data link. Figure
More informationCrossbar - example. Crossbar. Crossbar. Combination: Time-space switching. Simple space-division switch Crosspoints can be turned on or off
Crossbar Crossbar - example Simple space-division switch Crosspoints can be turned on or off i n p u t s sessions: (,) (,) (,) (,) outputs Crossbar Advantages: simple to implement simple control flexible
More informationDynamic Scheduling Algorithm for input-queued crossbar switches
Dynamic Scheduling Algorithm for input-queued crossbar switches Mihir V. Shah, Mehul C. Patel, Dinesh J. Sharma, Ajay I. Trivedi Abstract Crossbars are main components of communication switches used to
More informationAdvanced Parallel Architecture. Annalisa Massini /2017
Advanced Parallel Architecture Annalisa Massini - 2016/2017 References Advanced Computer Architecture and Parallel Processing H. El-Rewini, M. Abd-El-Barr, John Wiley and Sons, 2005 Parallel computing
More informationCSCI-1680 Link Layer Wrap-Up Rodrigo Fonseca
CSCI-1680 Link Layer Wrap-Up Rodrigo Fonseca Based partly on lecture notes by David Mazières, Phil Levis, John Jannotti Administrivia Homework I out later today, due next Thursday Today: Link Layer (cont.)
More informationAnalysis of Crosspoint Cost and Buffer Cost of Omega Network Using MLMIN
RESEARCH ARTICLE OPEN ACCESS Analysis of Crosspoint Cost and Buffer Cost of Omega Network Using MLMIN Smilly Soni Pursuing M.Tech(CSE RIMT, Mandi Gobindgarh Abhilash Sharma Assistant Prof. (CSE RIMT, Mandi
More informationCSCI-1680 Link Layer Wrap-Up Rodrigo Fonseca
CSCI-1680 Link Layer Wrap-Up Rodrigo Fonseca Based partly on lecture notes by David Mazières, Phil Levis, John Janno< Administrivia Homework I out later today, due next Thursday, Sep 25th Today: Link Layer
More informationWireless Networks. Communication Networks
Wireless Networks Communication Networks Types of Communication Networks Traditional Traditional local area network (LAN) Traditional wide area network (WAN) Higher-speed High-speed local area network
More informationSwitch Fabrics. Switching Technology S P. Raatikainen Switching Technology / 2006.
Switch Fabrics Switching Technology S38.3165 http://www.netlab.hut.fi/opetus/s383165 L4-1 Switch fabrics Basic concepts Time and space switching Two stage switches Three stage switches Cost criteria Multi-stage
More informationCS610- Computer Network Solved Subjective From Midterm Papers
Solved Subjective From Midterm Papers May 08,2012 MC100401285 Moaaz.pk@gmail.com Mc100401285@gmail.com PSMD01 CS610- Computer Network Midterm Examination - Fall 2011 1. Where are destination and source
More informationPacket Switching Queuing Architecture: A Study
Packet Switching Queuing Architecture: A Study Shikhar Bahl 1, Rishabh Rai 2, Peeyush Chandra 3, Akash Garg 4 M.Tech, Department of ECE, Ajay Kumar Garg Engineering College, Ghaziabad, U.P., India 1,2,3
More information