Cell Format. Housekeeping. Segmentation and Reassembly AAL 3/4
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1 Housekeeping 1 st Project Handout ue Friday Oct 5 Quiz: Friday Sept 21 Material covered so far 1 st Test October 12 Cell Format User-Network Interface (UNI) GFC VPI VCI Type CLP 8 HEC (CRC-8) host-to-switch format GFC: Generic Flow Control (still being defined) VCI: Virtual Circuit Identifier VPI: Virtual Path Identifier Type: management, congestion control, AAL5 (later) CLP Cell Loss Priority HEC: Header Error Check (CRC-8) 384 (48 bytes) Payload Network-Network Interface (NNI) switch-to-switch format GFC becomes part of VPI field Fall /11 CptS/EE Fall /11 CptS/EE Segmentation and Reassembly ATM Adaptation Layer (AAL) AAL 1 and 2 designed for applications that need guaranteed rate (eg, voice, video) AAL 3/4 designed for packet data AAL 5 is an alternative standard for packet data AAL 3/4 Convergence Sublayer Protocol ata Unit (CS-PU) < 64 KB CPI Btag BASize User data Pad 0 Etag Len AAL AAL CPI: commerce part indicator (version field) Btag/Etag:beginning and ending tag BAsize: hint on amount of buffer space to allocate Length: size of whole PU ATM ATM Fall /11 CptS/EE Fall /11 CptS/EE 555 4
2 Cell Format AAL (44 bytes) 6 10 ATM header Type SEQ MI Payload Length CRC-10 CS-PU Format < 64 KB 0 47 bytes Type BOM: beginning of message COM: continuation of message EOM end of message SEQ: sequence of number MI: message id Length: number of bytes of PU in this cell ata Pad Reserved CRC-32 pad so trailer always falls at end of ATM cell Length: size of PU (data only) CRC-32 (detects missing or misordered cells) Cell Format end-of-pu bit in Type field of ATM header Len Fall /11 CptS/EE Fall /11 CptS/EE Workstation-Based Switch Construction Aggregate bandwidth 1/2 of the I/O bus bandwidth capacity shared among all hosts connected to switch example: 800Mbps bus can sup 8 T3 s Outline Switch Fabrics IP Routers Extensible (Active) Routers Packets-per-second must be able to switch small packets 100,000 packets-persecond is achievable eg, 64-byte packets implies 512Mbps Main memory I/O bus Interface 1 Interface 2 Interface 3 Fall /11 CptS/EE Fall /11 CptS/EE 555 8
3 Fall /11 CptS/EE Fall /11 CptS/EE Switching Hardware esign Goals throughput (depends on traffic model) Scaling (how does the number of components grow as a function of n the number of s) Ports circuit management (eg, map VCIs, route datagrams) buffering (input and/or output) Fabric as simple as possible because that s where the most circuits are sometimes do buffering (internal) Fabric Buffering Wherever contention is possible input (contend for fabric) internal (contend for output ) output (contend for link) Head-of-Line Blocking input buffering Switch Port 1 Port 2 Fall /11 CptS/EE Fall /11 CptS/EE Crossbar Switches Example crossbar Concentrator select l of n packets Complexity: n 2 Knockout Switch s s
4 Fall /11 CptS/EE Fall /11 CptS/EE Buffer Knockout Switch (cont) (a) Self-Routing Fabrics Banyan Network constructed from simple 2 x 2 switching elements self-routing header attached to each packet elements arranged to route based on this header no collisions if input packets sorted into ascending order complexity: n log 2 n (b) (c) 110 Fall /11 CptS/EE Fall /11 CptS/EE Self-Routing Fabrics (cont) Batcher Network switching elements sort two numbers some elements sort into ascending (clear) some elements sort into descending (shaded) elements arranged to implement merge sort complexity: n log 2 2 n Common esign: Batcher-Banyan Switch High-Speed IP Router Switch (possibly ATM) Line Cards + Forwarding Engines link interface router lookup (input) common IP path (input) packet queue (output) Network Processor routing protocol(s) exceptional cases
5 High-Speed Router Alternative esign Routing software w/ router OS Routing Buffer memory Crossbar Switch Fall /11 CptS/EE Fall /11 CptS/EE
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