Proceedings. 14 th IEEE International Workshop on. Rapid Systems Prototyping RSP 2003
|
|
- Patrick Woods
- 5 years ago
- Views:
Transcription
1 Proceedings 14 th IEEE International Workshop on Rapid Systems Prototyping RSP 2003
2 Proceedings 14 th IEEE International Workshop on Rapid Systems Prototyping San Diego, California, USA June 9 11, 2003 Sponsored by IEEE Computer Society Technical Committee on Design Automation IEEE Computer Society Technical Committee on Simulation Los Alamitos, California Washington Brussels Tokyo
3 Copyright 2003 by The Institute of Electrical and Electronics Engineers, Inc. All rights reserved Copyright and Reprint Permissions: Abstracting is permitted with credit to the source. Libraries may photocopy beyond the limits of US copyright law, for private use of patrons, those articles in this volume that carry a code at the bottom of the first page, provided that the per-copy fee indicated in the code is paid through the Copyright Clearance Center, 222 Rosewood Drive, Danvers, MA Other copying, reprint, or republication requests should be addressed to: IEEE Copyrights Manager, IEEE Service Center, 445 Hoes Lane, P.O. Box 133, Piscataway, NJ The papers in this book comprise the proceedings of the meeting mentioned on the cover and title page. They reflect the authors opinions and, in the interests of timely dissemination, are published as presented and without change. Their inclusion in this publication does not necessarily constitute endorsement by the editors, the IEEE Computer Society, or the Institute of Electrical and Electronics Engineers, Inc. IEEE Computer Society Order Number PR01943 ISBN ISSN Number Additional copies may be ordered from: IEEE Computer Society IEEE Service Center IEEE Computer Society Customer Service Center 445 Hoes Lane Asia/Pacific Office Los Vaqueros Circle P.O. Box 1331 Watanabe Bldg., P.O. Box 3014 Piscataway, NJ Minami-Aoyama Los Alamitos, CA Tel: Minato-ku, Tokyo Tel: Fax: JAPAN Fax: Tel: cs.books@computer.org customer-service@ieee.org Fax: tokyo.ofc@computer.org Individual paper REPRINTS may be ordered at: reprints@computer.org Editorial production by Bob Werner Cover art production by Joe Daigle/Studio Productions Printed in the United States of America by The Printing House
4 Table of Contents 14 th IEEE International Workshop on Rapid Systems Prototyping RSP 2003 Message from the General Chairs...ix Introduction: An Editorial Note... x Acknowledgements...xi Conference Committees...xii Session 1: Design Environments I A Universal Low Cost Run-Time and Programming Environment for Reconfigurable Computing...2 A. Dollas, D. Efstathiou, and T. Kyriakides A Component-Based Methodology for Embedded System Prototyping...9 P. Tessier, S. Gérard, C. Mraidha, F. Terrier, and J. Geib i-cad: A Rapid Prototyping CAD Tool for Intranet Design...16 S. Habib and A. Parker Session 2: Embedded Systems A New Specification Methodology for Embedded Systems Based on the -Calculus Process Algebra...26 S. Förster, M. Fischer, A. Windisch, B. Balser, and D. Monjau Embedded Application Prototyping on a Communication-Restricted Reconfigurable Platform...33 A. Sasongko, A. Baghdadi, F. Rousseau, and A. Jerraya Efficient Analysis of Mixed-Signal ASICs for Smart Sensors...40 N. Kerö and T. Sauter Verification of Timing Properties in Rapid System Prototyping...47 D. Drusinky and M. Shing Session 3: Signal Processing and ASIC Design An Efficient Methodology and Semi-Automated Flow for Design and Validation of Complex Digital Signal Processing ASICS Macro-Cells...56 L. Tambour, N. Zergainoh, P. Urard, H. Michel, and A. Jerraya Simulation and Analysis of Embedded DSP Systems Using Petri Nets...64 A. Deb, J. Öberg, and A. Jantsch A New Approach of a Self-Timed Bit-Serial Synchronous Pipeline Architecture...71 A. Rettberg, M. Zanella, C. Bobda, and T. Lehmann Prototype-Based Tests for Hybrid Reactive Systems...78 G. Hahn, J. Philipps, A. Pretschner, and T. Stauner
5 Session 4: Applications Synthesis of LOTOS Specification of the IEEE-1394 Firewire Protocol...86 V. Carchiolo, M. Malgeri, and G. Mangioni Marked Regulatory Graphs: A Formal Framework to Simulate Biological Regulatory Networks with Simple Automata...93 V. Bassano and G. Bernot Really Rapid Prototyping of Large-Scale Business Information Systems G. Milosavljevi and B. Periši Session 5: Run-time Environments and Middleware Evaluation of Middleware Architectures in Achieving System Interoperability P. Young, N. Chaki, V. Berzins, and Luqi A Versatile Framework for FPGA Field Updates: An Application of Partial Self-Reconfiguation R. Fong, S. Harper, and P. Athanas Contributions to Middleware Architectures to Prototype Distribution Infrastructures J. Hugues, L. Pautet, and F. Kordon Session 6: Communications I Design and Prototyping a Fast Hadamard Transformer for WCDMA S. Bahl Hardware Evaluation of Low Power Communication Mechanisms for Transport-Triggered Architectures T. Pionteck, A. García, L. Kabulepa, and M. Glesner Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment C. Chang, K. Kuusilinna, B. Richards, A. Chen, N. Chan, R. Brodersen, and B. Nikoli Session 7: Modeling for Design I An Instruction Throughput Model of Superscalar Processors T. Taha and S. Wills Cache Configuration Exploration on Prototyping Platforms C. Zhang and F. Vahid
6 Session 8: Communications II Emulation of Analog Components for the Rapid Prototyping of Wireless Baseband Systems R. Ludewig, A. Garcia, T. Murgan, J. Hidalgo, and M. Glesner Rapid Scheduling of Efficient VLSI Architectures for Next-Generation HSDPA Wireless System Using Precision C Synthesizer Y. Guo, G. Xu, D. McCain, and J. Cavallaro Rapid Prototyping of Real-Time Communication A Case Study: Interacting Robots S. Ihmor, N. Bastos Jr., R. Klein, M. Visarius, and W. Hardt Session 9: Design Environments II xdsl Systems Prototyping Using a Flexible Emulation Environment N. Papandreou, M. Varsamou, and T. Antonakopoulos Rapid Prototyping and Incremental Evolution Using SLAM Á. Herranz and J. Moreno-Navarro Session 10: Modeling for Design II Comparative Rapid Prototyping, A Case Study Luqi, M. Shing, J. Puett, V. Berzins, Z. Guan, Y. Qiao, L. Zhang, N. Chaki, X. Liang, W. Ray, M. Brown, and D. Floodeen Synthesizing Approach for Perspective-Based Architecture Design X. Liang, J. Puett, and Luqi Rapid Exploration of Pipelined Processors through Automatic Generation of Synthesizable RTL Models P. Mishra, A. Kejariwal, and N. Dutt Exploring the Probabilistic Design Space of Multimedia Systems S. Hua, G. Qu, and S. Bhattacharyya Author Index
Proceedings. Second IEEE International Workshop on Source Code Analysis and Manipulation
Proceedings Second IEEE International Workshop on Source Code Analysis and Manipulation Proceedings Second IEEE International Workshop on Source Code Analysis and Manipulation 1 October 2002 Montreal,
More informationIEEE International Workshop on Analysis and Modeling of Faces and Gestures AMFG 2003
IEEE International Workshop on Analysis and Modeling of Faces and Gestures AMFG 2003 17 October 2003 Nice, France Los Alamitos, California Washington Brussels Tokyo Copyright 2003 by The Institute of Electrical
More informationSixth IEEE International Symposium on High Assurance Systems Engineering
Sixth IEEE International Symposium on High Assurance Systems Engineering Special Topic: Impact of Networking 22-24 October 2001 Boca Raton, Florida, USA Sponsored by the IEEE Computer Society Technical
More informationCOMPUTER PROCEEDINGS OF SOCIETY. THE 2nd INTERNATIONAL CONFERENCE ON WEB INFORMATION SYSTEMS ENGINEERING Volume 1 (Main Program)
PROCEEDINGS OF THE 2nd INTERNATIONAL CONFERENCE ON WEB INFORMATION SYSTEMS ENGINEERING Volume 1 (Main Program) 3-6 December 2001, Kyoto, Japan Organized by WISE Society Kyoto University, Japan EDITORS
More informationProceedings Fourth IEEE International Workshop on Advanced Issues of E-Commerce and Web-Based Information Systems (WECWIS 2002)
Proceedings Fourth IEEE International Workshop on Advanced Issues of E-Commerce and Web-Based Information Systems (WECWIS 2002) Proceedings Fourth IEEE International Workshop on Advanced Issues of E-Commerce
More informationFuture Trends of Distributed Computing Systems
Proceedings The Eighth IEEE Workshop on Future Trends of Distributed Computing Systems FTDCS 2001 31 October 2 November 2001 Bologna, Italy Sponsored by IEEE Computer Society Los Alamitos, California Washington
More informationSoftware Reliability Engineering
Proceedings lzth International Symposium on Software Reliability Engineering ISSRE 2001 Proceedings lzfh International Symposium on Software Reliability Engineering ISSRE 2001 27-30 November Hong Kong,
More informationFuture Trends of Distributed Computing Systems
Proceedings The Ninth IEEE Workshop on Future Trends of Distributed Computing Systems FTDCS 2003 28-30 May 2003 San Juan, Puerto Rico Sponsored by IEEE Computer Society Los Alamitos, California Washington
More informationProceedings. Ninth International Conference on. Network Protocols ICNP 2001
Proceedings Ninth International Conference on Network Protocols ICNP 2001 Proceedings Ninth International Conference on Network Protocols ICNP 2001 11-14 November 2001 Riverside, California, USA Sponsored
More informationProceedings. Sixth IEEE International Symposium on Object-Oriented Real-Time Distributed Computing
Proceedings Sixth IEEE International Symposium on Object-Oriented Real-Time Distributed Computing ISORC 2003 Proceedings Sixth IEEE International Symposium on Object-Oriented Real-Time Distributed Computing
More informationProceedings Pacific Rim International Symposium on Dependable Computing PRDC 2002
Proceedings 2002 Pacific Rim International Symposium on Dependable Computing PRDC 2002 i [blank page] ii Proceedings 2002 Pacific Rim International Symposium on Dependable Computing PRDC 2002 16-18 December
More informationth International Conference on Telecommunications (ICT 2017)
2017 24th International Conference on Telecommunications (ICT 2017) Limassol, Cyprus 3-5 May 2017 IEEE Catalog Number: ISBN: CFP17530-POD 978-1-5386-0644-5 Copyright 2017 by the Institute of Electrical
More information2017 International Conference on Communication Technologies (ComTech 2017)
2017 International Conference on Communication Technologies (ComTech 2017) Rawalpindi, Pakistan 19 21 April 2017 IEEE Catalog Number: ISBN: CFP17CMR-POD 978-1-5090-5985-0 Copyright 2017 by the Institute
More informationProceedings December 2001 New Orleans, Louisiana. Sponsored by. Applied Computer Security Associates. Los Alamitos, California
Proceedings 17th Annual Computer Security Applications Conference 10 14 December 2001 New Orleans, Louisiana Sponsored by Applied Computer Security Associates Los Alamitos, California Washington Brussels
More information2015 Twelfth International Conference on Wireless and Optical Communications Networks (WOCN 2015)
2015 Twelfth International Conference on Wireless and Optical Communications Networks (WOCN 2015) Bangalore, India 9-11 September 2015 IEEE Catalog Number: ISBN: CFP15604-POD 978-1-4673-9278-5 Copyright
More informationDESIGN AND ANALYSIS OF DISTRIBUTED EMBEDDED SYSTEMS
DESIGN AND ANALYSIS OF DISTRIBUTED EMBEDDED SYSTEMS IFIP 17 th World Computer Congress TC10 Stream on Distributed and Parallel Embedded Systems (DIPES2002) August 25-29, 2002, Montreal, Quebec, Canada
More informationWIRELESS SENSOR NETWORKS A Networking Perspective Edited by Jun Zheng Abbas Jamalipour A JOHN WILEY & SONS, INC., PUBLICATION WIRELESS SENSOR NETWORKS IEEE Press 445 Hoes Lane Piscataway, NJ 08854 IEEE
More informationHardware Software Codesign of Embedded Systems
Hardware Software Codesign of Embedded Systems Rabi Mahapatra Texas A&M University Today s topics Course Organization Introduction to HS-CODES Codesign Motivation Some Issues on Codesign of Embedded System
More informationEvolution of CAD Tools & Verilog HDL Definition
Evolution of CAD Tools & Verilog HDL Definition K.Sivasankaran Assistant Professor (Senior) VLSI Division School of Electronics Engineering VIT University Outline Evolution of CAD Different CAD Tools for
More informationProceedings Pacific Rim International Symposium on Dependable Computing PRDC 2001
Proceedings 2001 Pacific Rim International Symposium on Dependable Computing PRDC 2001 ~~ ~~~~~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ Proceedings 2001 Pacific Rim International Symposium on Dependable Computing 17-1 9 December
More informationA Complete Data Scheduler for Multi-Context Reconfigurable Architectures
A Complete Data Scheduler for Multi-Context Reconfigurable Architectures M. Sanchez-Elez, M. Fernandez, R. Maestre, R. Hermida, N. Bagherzadeh, F. J. Kurdahi Departamento de Arquitectura de Computadores
More informationHIGH-LEVEL SYNTHESIS FOR REAL-TIME DIGITAL SIGNAL PROCESSING
HIGH-LEVEL SYNTHESIS FOR REAL-TIME DIGITAL SIGNAL PROCESSING THE KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE VLSI, COMPUTER ARCHITECfURE AND DIGITAL SIGNAL PROCESSING Latest Titles
More informationEEM870 Embedded System and Experiment Lecture 4: SoC Design Flow and Tools
EEM870 Embedded System and Experiment Lecture 4: SoC Design Flow and Tools Wen-Yen Lin, Ph.D. Department of Electrical Engineering Chang Gung University Email: wylin@mail.cgu.edu.tw March 2013 Agenda Introduction
More informationMulti-Core Programming
Multi-Core Programming Increasing Performance through Software Multi-threading Shameem Akhter Jason Roberts Intel PRESS Copyright 2006 Intel Corporation. All rights reserved. ISBN 0-9764832-4-6 No part
More informationReprint. Transmission Systems Prototyping based on Stateflow/Simulink Models
Reprint Transmission Systems Prototyping based on Stateflow/Simulink Models N. Papandreou, M. Varsamou, and Th. Antonakopoulos The 15th IEEE International Workshop on Rapid System Prototyping - RSP 2004
More informationReal-Time Optimization by Extremum-Seeking Control
Real-Time Optimization by Extremum-Seeking Control Real-Time Optimization by Extremum-Seeking Control KARTIK B. ARIYUR MIROSLAV KRSTIĆ A JOHN WILEY & SONS, INC., PUBLICATION Copyright 2003 by John Wiley
More informationA NEW APPROACH FOR BROADBAND BACKUP LINK TO INTERNET IN CAMPUS NETWORK ENVIRONMENT
A NEW APPROACH FOR BROADBAND BACKUP LINK TO INTERNET IN CAMPUS NETWORK ENVIRONMENT Mohd Nazri Ismail Faculty of MIIT, University of Kuala Lumpur (UniKL), MALAYSIA, mnazrii@miit.unikl.edu.my Abstract Most
More informationARCHITECTURE AND DESIGN OF DISTRIBUTED EMBEDDED SYSTEMS
ARCHITECTURE AND DESIGN OF DISTRIBUTED EMBEDDED SYSTEMS IFIP - The International Federation for Information Processing IFIP was founded in 1960 under the auspices of UNESCO, following the First World Computer
More informationCopyright 1995 by the American Mathematical Society. All rights reserved. Printed in the United States of America.
Journal of the American Mathematical Society This journal is devoted to research articles of the highest quality in all areas of pure and applied mathematics. Subscription information. The Journal of the
More informationFPGA-Based Rapid Prototyping of Digital Signal Processing Systems
FPGA-Based Rapid Prototyping of Digital Signal Processing Systems Kevin Banovic, Mohammed A. S. Khalid, and Esam Abdel-Raheem Presented By Kevin Banovic July 29, 2005 To be presented at the 48 th Midwest
More informationProceedings of The Second International Conference on Web Information Systems Engineering
Proceedings of The Second International Conference on Web Information Systems Engineering Volume 1 (Main Program) 3-6 December 2001 Kyoto, Japan Editors Tamer Ozsu Hans-Jorg Schek Katsumi Tanaka Yanchun
More informationHardware, Software and Mechanical Cosimulation for Automotive Applications
, and Mechanical Cosimulation for Automotive Applications P. Le Marrec, C. A. Valderrama, F. Hessel, A. A. Jerraya System Level Synthesis Group, TIMA Laboratory, INPG, Grenoble M. Attia, O. Cayrol PSA
More information(ASE 2001) Proceedings. Conference on. 16th Annual International CGIPUTER. Los Alamitos, California Washington Brussels Tokyo November 2001
Proceedings 16th Annual International Conference on n Automated Software Engineering (ASE 2001) 26-29 November 2001 Loew s Coronado Bay Resort Coronado Island San Diego, California Sponsored by IEEE Computer
More informationHardware Software Codesign of Embedded System
Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra - Texas A&M - Fall 00 1 Today s topics Course Organization Introduction to HS-CODES Codesign Motivation Some Issues on
More informationJoe Birtola CMR Summit Technologies. High Frequency PCB Material Characterization and Simulation. Ryan Satrom Multitest
BRING IT TO THE BOARD (PCB) The device under test (DUT) board is sometimes overlooked as a critical element in test-and burn-in strategies. This session brings PCBs into the limelight. The first presentation
More informationVPN Connection. VPN Gateway. 17 December 2002
VPN Connection to ZyXEL ZyWALL VPN Gateway 17 December 2002 This document explains how to configure a virtual private network connection over an open network from a remote host running SSH Sentinel to
More informationMapping real-life applications on run-time reconfigurable NoC-based MPSoC on FPGA. Singh, A.K.; Kumar, A.; Srikanthan, Th.; Ha, Y.
Mapping real-life applications on run-time reconfigurable NoC-based MPSoC on FPGA. Singh, A.K.; Kumar, A.; Srikanthan, Th.; Ha, Y. Published in: Proceedings of the 2010 International Conference on Field-programmable
More informationReconfigurable Computing. Introduction
Reconfigurable Computing Tony Givargis and Nikil Dutt Introduction! Reconfigurable computing, a new paradigm for system design Post fabrication software personalization for hardware computation Traditionally
More informationINTERNATIONAL STANDARD
INTERNATIONAL STANDARD IEC 60488-2 First edition 2004-05 IEEE 488.2 Standard digital interface for programmable instrumentation Part 2: Codes, formats, protocols and common commands IEEE 2004 Copyright
More informationHW/SW Co-design. Design of Embedded Systems Jaap Hofstede Version 3, September 1999
HW/SW Co-design Design of Embedded Systems Jaap Hofstede Version 3, September 1999 Embedded system Embedded Systems is a computer system (combination of hardware and software) is part of a larger system
More informationCOSO Enterprise Risk Management
COSO Enterprise Risk Management COSO Enterprise Risk Management Establishing Effective Governance, Risk, and Compliance Processes Second Edition ROBERT R. MOELLER John Wiley & Sons, Inc. Copyright # 2007,
More informationA Versatile Instrument for Analyzing and Testing the Interfaces of Peripheral Devices
Reprint A Versatile Instrument for Analyzing and Testing the Interfaces of Peripheral Devices P. Savvopoulos, M. Varsamou and Th. Antonakopoulos The 3rd International Conference on Systems, Signals & Devices
More informationPhilip Andrew Simpson. FPGA Design. Best Practices for Team-based Reuse. Second Edition
FPGA Design Philip Andrew Simpson FPGA Design Best Practices for Team-based Reuse Second Edition Philip Andrew Simpson San Jose, CA, USA ISBN 978-3-319-17923-0 DOI 10.1007/978-3-319-17924-7 ISBN 978-3-319-17924-7
More informationInterfacing a High Speed Crypto Accelerator to an Embedded CPU
Interfacing a High Speed Crypto Accelerator to an Embedded CPU Alireza Hodjat ahodjat @ee.ucla.edu Electrical Engineering Department University of California, Los Angeles Ingrid Verbauwhede ingrid @ee.ucla.edu
More informationA Consistent Design Methodology for Configurable HW/SW-Interfaces in Embedded Systems Embedded Systems Design
A Consistent Design Methodology for Configurable HW/SW-Interfaces in Embedded Systems Embedded Systems Design Stefan llimor, Markus Visarius, Wolfram Hardt {ihmor I visi I hardt}@upb.de University of Paderborn,
More informationProducer Series. Rimage s best
Producer Series Rimage s best The Producer Series offers the most powerful, highest-capacity disc publishing systems available. These machines are backed by Rimage s decades of experience in designing,
More informationCOMPONENT-ORIENTED PROGRAMMING
COMPONENT-ORIENTED PROGRAMMING COMPONENT-ORIENTED PROGRAMMING ANDY JU AN WANG KAI QIAN Southern Polytechnic State University Marietta, Georgia A JOHN WILEY & SONS, INC., PUBLICATION Copyright 2005 by John
More informationAn FPGA Project for use in a Digital Logic Course
Session 3226 An FPGA Project for use in a Digital Logic Course Daniel C. Gray, Thomas D. Wagner United States Military Academy Abstract The Digital Computer Logic Course offered at the United States Military
More informationDatabase Machines. Fourth International Workshop Grand Bahama Island, March D.J. DeWitt and H. Boral
Database Machines Database Machines Fourth International Workshop Grand Bahama Island, March 1985 Edited by D.J. DeWitt and H. Boral With 142 Illustrations and 35 Tables Springer-Verlag New York Berlin
More informationMicroprocessor Theory
Microprocessor Theory and Applications with 68000/68020 and Pentium M. RAFIQUZZAMAN, Ph.D. Professor California State Polytechnic University Pomona, California and President Rafi Systems, Inc. WILEY A
More informationdesign cycle involving simulation, synthesis
HDLPlanner : Design Development Environment for HDL-based FPGA Designs Abstract Rapid prototyping of designs using FPGAs requires HDL-based design entry which leverages upon highly parameterized components
More informationSession: Configurable Systems. Tailored SoC building using reconfigurable IP blocks
IP 08 Session: Configurable Systems Tailored SoC building using reconfigurable IP blocks Lodewijk T. Smit, Gerard K. Rauwerda, Jochem H. Rutgers, Maciej Portalski and Reinier Kuipers Recore Systems www.recoresystems.com
More informationEITF35: Introduction to Structured VLSI Design
EITF35: Introduction to Structured VLSI Design Part 1.1.2: Introduction (Digital VLSI Systems) Liang Liu liang.liu@eit.lth.se 1 Outline Why Digital? History & Roadmap Device Technology & Platforms System
More informationUML for SOC Design GRANT MARTIN WOLFGANG MÜLLER. Edited by. Tensilica Inc., Santa Clara, CA, USA. and. University of Paderborn, Germany
UML FOR SOC DESIGN UML for SOC Design Edited by GRANT MARTIN Tensilica Inc., Santa Clara, CA, USA and WOLFGANG MÜLLER University of Paderborn, Germany A C.I.P. Catalogue record for this book is available
More informationAlgorithms and Parallel Computing
Algorithms and Parallel Computing Algorithms and Parallel Computing Fayez Gebali University of Victoria, Victoria, BC A John Wiley & Sons, Inc., Publication Copyright 2011 by John Wiley & Sons, Inc. All
More informationFaculty of King Abdullah II School for Information Technology Department of Computer Science Study Plan Master's In Computer Science (Thesis Track)
Faculty of King Abdullah II School for Information Technology Department of Computer Science Study Plan Master's In Computer Science (Thesis Track) Plan Number Serial # Degree First: General Rules Conditions:.
More informationCOE 561 Digital System Design & Synthesis Introduction
1 COE 561 Digital System Design & Synthesis Introduction Dr. Aiman H. El-Maleh Computer Engineering Department King Fahd University of Petroleum & Minerals Outline Course Topics Microelectronics Design
More informationVPN Connection. 8 October 2002
VPN Connection to Cisco IOS Router 8 October 2002 This document explains how to configure a virtual private network connection over an open network from a remote host running SSH Sentinel to a private
More informationController Synthesis for Hardware Accelerator Design
ler Synthesis for Hardware Accelerator Design Jiang, Hongtu; Öwall, Viktor 2002 Link to publication Citation for published version (APA): Jiang, H., & Öwall, V. (2002). ler Synthesis for Hardware Accelerator
More informationLong Term Trends for Embedded System Design
Long Term Trends for Embedded System Design Ahmed Amine JERRAYA Laboratoire TIMA, 46 Avenue Félix Viallet, 38031 Grenoble CEDEX, France Email: Ahmed.Jerraya@imag.fr Abstract. An embedded system is an application
More informationAdvanced Simulation Technologies
Advanced Simulation Technologies PHY Layer Communication Design with SystemVue Agilent EEsof EDA Ingo Nickeleit, Application Engineer ingo_nickeleit@agilent.com November 2009 http://www.agilent.com/find/eesof
More informationEXHIBITOR PROSPECTUS
52 DAC nd EXHIBITOR PROSPECTUS Moscone Center, San Francisco, CA Exhibition: June 8-10, 2015 Conference: June 7-11, 2015 sponsored by: DAC.com in technical cooperation with: The Design Automation Conference
More informationBibliography. Measuring Software Reuse, Jeffrey S. Poulin, Addison-Wesley, Practical Software Reuse, Donald J. Reifer, Wiley, 1997.
Bibliography Books on software reuse: 1. 2. Measuring Software Reuse, Jeffrey S. Poulin, Addison-Wesley, 1997. Practical Software Reuse, Donald J. Reifer, Wiley, 1997. Formal specification and verification:
More informationArnold N. Alderman Founder & President of Anagenesis, Inc. a technical marketing company
Arnold N. Alderman Founder & President of Anagenesis, Inc. a technical marketing company Mr. Alderman is a well known industry expert in the marketing of high technology products and is author of many
More informationProgrammable Logic Training Courses
Programmable Logic Training Courses Course Information and Schedule March 1996 through December 1996 (Latest schedule is also available on web at http://www.xilinx.com) Who Should Attend a Training Class?
More informationDepCoS-RELCOMEX Los Alamitos, California. Washington Tokyo
DepCoS-RELCOMEX 2006 Los Alamitos, California Washington Tokyo Copyright 2006 by The Institute of Electrical and Electronics Engineers, Inc. All rights reserved. Copyright and Reprint Permissions: Abstracting
More informationBurn-in & Test Socket Workshop
Burn-in & Test Socket Workshop IEEE March 4-7, 2001 Hilton Mesa Pavilion Hotel Mesa, Arizona IEEE COMPUTER SOCIETY Sponsored By The IEEE Computer Society Test Technology Technical Council COPYRIGHT NOTICE
More informationLEGITIMATE APPLICATIONS OF PEER-TO-PEER NETWORKS DINESH C. VERMA IBM T. J. Watson Research Center A JOHN WILEY & SONS, INC., PUBLICATION
LEGITIMATE APPLICATIONS OF PEER-TO-PEER NETWORKS DINESH C. VERMA IBM T. J. Watson Research Center A JOHN WILEY & SONS, INC., PUBLICATION LEGITIMATE APPLICATIONS OF PEER-TO-PEER NETWORKS LEGITIMATE APPLICATIONS
More informationPrinted in U.S.A., Copyright Penton Media, Inc. All rights reserved. Machine Design (ISSN ) is published semimonthly by Penton Media,
Printed in U.S.A., Copyright 2000. Penton Media, Inc. All rights reserved. Machine Design (ISSN 0024-9114) is published semimonthly by Penton Media, Inc., 1100 Superior Ave., Cleveland, OH 44114-2543.
More informationIEEE P Letter Ballot
IEEE P802.11 Letter Ballot Date submitted: April 5, 1995 hirty day letter ballot, 50 % returns required to make ballot valid. Ballot closes May 5, 1995. If less than 50 % ballots have been recieved, the
More informationINTERNATIONAL STANDARD
INTERNATIONAL STANDARD IEC 61523-3 First edition 2004-09 IEEE 1497 Delay and power calculation standards Part 3: Standard Delay Format (SDF) for the electronic design process IEEE 2004 Copyright - all
More informationVideo Processing Technologies and Challenges for Mil/Aero Applications
Video Processing Technologies and Challenges for Mil/Aero Applications January 2014 Version 1.3 16230 Monterey St. STE 204, Morgan Hill, CA 95037, USA - Tel: (408) 706-5975 - alan.simmonds@ces-cal.com
More informationA Methodology for Energy Efficient FPGA Designs Using Malleable Algorithms
A Methodology for Energy Efficient FPGA Designs Using Malleable Algorithms Jingzhao Ou and Viktor K. Prasanna Department of Electrical Engineering, University of Southern California Los Angeles, California,
More informationThis document is a preview generated by EVS
INTERNATIONAL STANDARD ISO/IEEE 11073-10406 First edition 2012-12-01 Health informatics Personal health device communication Part 10406: Device specialization Basic electrocardiograph (ECG) (1- to 3-lead
More informationHistorical Reliability Data for IEEE 3006 Standards: Power Systems Reliability
IEEE 3006 STANDARDS: POWER SYSTEMS RELIABILITY http://www.booksfiles.org/33780-ieee-3006-5-2014.html Historical Reliability Data for IEEE 3006 Standards: Power Systems Reliability IEEE 3000 Standards
More informationOptimization of Run-time Reconfigurable Embedded Systems
Optimization of Run-time Reconfigurable Embedded Systems Michael Eisenring and Marco Platzner Swiss Federal Institute of Technology (ETH) Zurich, Switzerland {eisenring platzner}@tik.ee.ethz.ch Abstract.
More informationAn Efficient AXI Read and Write Channel for Memory Interface in System-on-Chip
An Efficient AXI Read and Write Channel for Memory Interface in System-on-Chip Abhinav Tiwari M. Tech. Scholar, Embedded System and VLSI Design Acropolis Institute of Technology and Research, Indore (India)
More informationRapid Prototyping with APICES
Rapid Prototyping with APICES Ansgar Bredenfeld GMD Institute for System Design Technology D-53754 Sankt Augustin, Germany bredenfeld@gmd.de http://set.gmd.de/apices APICES is a tool for very rapid development
More informationHASHING IN COMPUTER SCIENCE FIFTY YEARS OF SLICING AND DICING
HASHING IN COMPUTER SCIENCE FIFTY YEARS OF SLICING AND DICING Alan G. Konheim JOHN WILEY & SONS, INC., PUBLICATION HASHING IN COMPUTER SCIENCE HASHING IN COMPUTER SCIENCE FIFTY YEARS OF SLICING AND DICING
More informationAn Overview of the Ptolemy Project. Organizational
An Overview of the Ptolemy Project Edward A. Lee Professor and Principal Investigator UC Berkeley Dept. of EECS Copyright 1997, The Regents of the University of California All rights reserved. Organizational
More informationVol No. 162 May
Vol. 40 200 No. 62 May 39 39 7 Joint Research 40 200 FILGAP Journal of The Heat Transfer Society of Japan Vol.40, No.62, May, 200 CONTENTS Preface to Special Issue of Student Committee
More informationPart 2: Principles for a System-Level Design Methodology
Part 2: Principles for a System-Level Design Methodology Separation of Concerns: Function versus Architecture Platform-based Design 1 Design Effort vs. System Design Value Function Level of Abstraction
More informationAn SoC Design Methodology Using FPGAs and Embedded Microprocessors
45.3 An SoC Design Methodology Using s and Embedded Microprocessors Nobuyuki Ohba ooba@jp.ibm.com Kohji Takano chano@jp.ibm.com IBM Research, Tokyo Research Laboratory, IBM Japan Ltd. 1623-14 Shimotsuruma,
More information45 th Design Automation Conference
45 th Design Automation Conference EVENT AUDIT DATES OF EVENT: Conference: June 8 13, 2008 Exhibits: June 8 10, 2008 LOCATION: Anaheim Convention Center, Anaheim, CA EVENT PRODUCER/MANAGER: Company Name:
More informationDynamic Scheduling and Synchronization Synthesis of Concurrent Digital Systems under System-Level Constraints
Dynamic Scheduling and Synchronization Synthesis of Concurrent Digital Systems under System-Level Constraints Claudionor N. Coelho Jr. Giovanni De Micheli Center for Integrated Systems Center for Integrated
More informationIEEE P /Dx.x Draft Standard for Radio over Ethernet Encapsulations and Mappings
IEEE P0. /Dx.x Draft Standard for Radio over Ethernet Encapsulations and Mappings Sponsor Standards Development Board of the IEEE Communications Society 0 0 Approved IEEE-SA Standards Board
More informationINTERNATIONAL STANDARD
INTERNATIONAL STANDARD IEC 60488-2 First edition 2004-05 IEEE 488.2 Standard digital interface for programmable instrumentation Part 2: Codes, formats, protocols and common commands Reference number IEC
More informationHardware/Software Co-design
Hardware/Software Co-design Zebo Peng, Department of Computer and Information Science (IDA) Linköping University Course page: http://www.ida.liu.se/~petel/codesign/ 1 of 52 Lecture 1/2: Outline : an Introduction
More informationModel-Based Design for Altera FPGAs Using HDL Code Generation The MathWorks, Inc. 1
Model-Based Design for Altera FPGAs Using HDL Code Generation Z 2011 The MathWorks, Inc. 1 Separate Views of DSP Implementation System Designer FPGA Designer Algorithm Design System Test Bench RTL Design
More informationHardware, Software and Mechanical Cosimulation for Automotive Applications
Hardware, Software and Mechanical Cosimulation for Automotive Applications P. Le Marrec, C.A. Valderrama, F. Hessel, A.A. Jerraya TIMA Laboratory 46 Avenue Felix Viallet 38031 Grenoble France fphilippe.lemarrec,
More informationArchitecture choices. Functional specifications. expensive loop (in time and cost) Hardware and Software partitioning. Hardware synthesis
Introduction of co-simulation in the design cycle of the real- control for electrical systems R.RUELLAND, J.C.HAPIOT, G.GATEAU Laboratoire d'electrotechnique et d'electronique Industrielle Unité Mixte
More informationDesign, Analysis and Processing of Efficient RISC Processor
Design, Analysis and Processing of Efficient RISC Processor Ramareddy 1, M.N.Pradeep 2 1M-Tech., VLSI D& Embedded Systems, Dept of E&CE, Dayananda Sagar College of Engineering, Bangalore. Karnataka, India
More informationTHE ARCHITECTURE OF COMPUTER HARDWARE, SYSTEM SOFTWARE, AND NETWORKING
FOURTH EDITION THE ARCHITECTURE OF COMPUTER HARDWARE, SYSTEM SOFTWARE, AND NETWORKING AN INFORMATION TECHNOLOGY APPROACH Irv Englander Bentley University John Wiley & Sons, Inc. Vice President & Executive
More informationAgile Database Techniques Effective Strategies for the Agile Software Developer. Scott W. Ambler
Agile Database Techniques Effective Strategies for the Agile Software Developer Scott W. Ambler Agile Database Techniques Effective Strategies for the Agile Software Developer Agile Database Techniques
More informationSystem Level Design with IBM PowerPC Models
September 2005 System Level Design with IBM PowerPC Models A view of system level design SLE-m3 The System-Level Challenges Verification escapes cost design success There is a 45% chance of committing
More informationProfessional ASP.NET 2.0 Databases. Thiru Thangarathinam
Professional ASP.NET 2.0 Databases Thiru Thangarathinam Professional ASP.NET 2.0 Databases Professional ASP.NET 2.0 Databases Thiru Thangarathinam Professional ASP.NET 2.0 Databases Published by Wiley
More informationPark Sung Chul. AE MentorGraphics Korea
PGA Design rom Concept to Silicon Park Sung Chul AE MentorGraphics Korea The Challenge of Complex Chip Design ASIC Complex Chip Design ASIC or FPGA? N FPGA Design FPGA Embedded Core? Y FPSoC Design Considerations
More informationMulti-Gigahertz Parallel FFTs for FPGA and ASIC Implementation
Multi-Gigahertz Parallel FFTs for FPGA and ASIC Implementation Doug Johnson, Applications Consultant Chris Eddington, Technical Marketing Synopsys 2013 1 Synopsys, Inc. 700 E. Middlefield Road Mountain
More informationBy choosing to view this document, you agree to all provisions of the copyright laws protecting it. (Go to next page to view the paper.
Copyright 2004 Institute of Electrical and Electronics Engineers, Inc. Reprinted, with permission, from Semicon Europa EMTC in Munich on April 20, 2004, "Practical Design Methodologies that Enable Concurrent
More informationCodesign Framework. Parts of this lecture are borrowed from lectures of Johan Lilius of TUCS and ASV/LL of UC Berkeley available in their web.
Codesign Framework Parts of this lecture are borrowed from lectures of Johan Lilius of TUCS and ASV/LL of UC Berkeley available in their web. Embedded Processor Types General Purpose Expensive, requires
More information