4-Channel Low Capacitance ESD Protection Diode Array

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1 4-Channel Low Capacitance ESD Protection Diode Array General Description The GG524PG is a 4-channel ultra low capacitance rail clamp ESD protection diode array. Each channel consists of a pair of ESD diodes that steer positive or negative ESD current to either the positive or negative rail. A Zener diode is integrated in to the array between the positive and negative supply rails. In a typical application, the negative rail pin (assigned as ) is connected with system ground. The Positive ESD current is steered to the ground through an ESD diode and Zener diode and the positive ESD voltage is clamped to the Zener voltage. The GG524PG is ideal to protect high speed data lines. DFN--2.5X.X.6-.5 Features 4 channels of ESD protection; Provides ESD protection to IEC6-4-2 level 4 ±5kV air discharge ±8kV contact discharge Channel I/O to capacitance:.6pf(max) Channel I/O to I/O capacitance:.45pf(max) Low clamping voltage 5V low operating voltage Improved Zener structure Optimized package for easy high speed data lines PCB layout RoHS compliant Applications HDMI/DVI ports; Display Port interface; M / M / G Ethernet; USB 2. interface; VGA interface; Set-top box; Flat panel Monitors / TVs; PC / Note book. Pin Configuration IN IN IN3 4 7 IN4 5 6 DFN--2.5x.x.6-.5 (Top view) Golden Gate Integrated Circuits, Inc. Page of 7 REV:

2 Absolute Maximum Ratings Characteristics Symbol Rating Unit Peak Pulse Power(8/2μs) P PP 5 W Peak Pulse Current(8/2μs) I PP 5 A ESD per IEC 6-4-2(Air) V ESD ±5 kv ESD per IEC 6-4-2(Contact) V ESD2 ±8 kv Operating Temperature Range Topr -55 ~ +25 C Storage Temperature Range Tstg -55 ~ +5 C Lead Soldering Temperature T L 26(sec) C Electrical Characteristics (Tamb=25 C) Characteristics Symbol Test Conditions Min. Typ. Max. Unit Reverse Working V RWM V I F V F I F =ma V Reverse Breakdown Reverse Leakage Current Positive Clamping Negative Clamping Junction Capacitance Between Channel Junction Capacitance Between I/O And V BR I R V C V C2 C J C J2 I t =ma; V V RWM =5V, T=25 C; --.3 μa I PP =A, t P =8/2μs; Positive pulse; V I PP =A, t P =8/2μS; Negative pulse; V V R =V, f=mhz; Between I/O pins pf V R =V, f=mhz; pf Golden Gate Integrated Circuits, Inc. Page 2 of 7 REV:

3 Typical Characteristics Peak Pulse Power - Ppp(kW) Percent of Ipp Non-Repetitive Peak Pulse Power vs. Pulse Time Pulse Duration - tp(μs) Pulse Waveform e -t td=ipp/ Time (μs) Waveform Parameters: tr=8μs td=2μs % of Rated Power or Ipp Clamping voltage -Vc(V) Power Derating Curve Ambient Temperature - TA( C) I/O clamping voltage vs. peak pulse current I/O- forward clamping voltage VC I/O- reverse clamping voltage VC2.5 Peak pulse current-ipp(a) tr=8μs td=2μs CJ(VR)/CJ(VR=) Normalized Capacitance vs. Reverse Reverse - VR(V) F=MHz Tek ESD Clamping for +8KV pulse per IEC6-4-2 R Ready M Pos:.s CH 2.V CH2 5.V M 5.ns CH 3.8V CH Couple DC Bandwidth limit Off 6MHz V/Grid Rough tuning Probe X Reverse Off Golden Gate Integrated Circuits, Inc. Page 3 of 7 REV:

4 Insertion Loss (db) e+8 Insertion Loss S2(I/O to ) Frequency (Hz) 3GHz: -.92dB 4.3GHz: -3dB Analog Cross Talk (db) Analog Cross Talk -8 e+9 e+8 e+9 Frequency (Hz) Typical Applications. HDMI Port Application GG524PG SU524PG Data 2+ Data 2- Data + Data - Data + GG524PG SU524PG HDMI Connector Data - Clk+ Clk- Golden Gate Integrated Circuits, Inc. Page 4 of 7 REV:

5 2. Display Port Application SU524PG GG524PG DIFF_TXP_DP DP DIFF_TXN_DP 3 DN DIFF_TXP_DP 4 DP DIFF_TXN_DP 6 DN SU524PG GG524PG DIFF_TX2P_DP 7 D2P DIFF_TX2N_DP 9 D2N Display Port Connector DIFF_TX3P_DP D3P DIFF_TX3N_DP 2 D3N SU524PG GG524PG DIFF_AUXP_DP 5 AUXP DIFF_AUXN_DP 7 AUXN V5 HP_DET_98_5V 8 HP_DET R 6W 5mA C mf 2 PWR Ordering Information Part No. Package Marking Material Packing GG524PGTR DFN--2.5x.x Halogen free Tape&Reel Golden Gate Integrated Circuits, Inc. Page 5 of 7 REV:

6 Package Outline DFN--2.5X.X.6-.5() UNIT: mm 2.5±..2±.5 N6.5TYP N Top view.±..4~.6 N5.4±. Bottom view N.3~.46.6±.5 ~.5 Side view.5ref DFN--2.5X.X.6-.5(2) UNIT: mm 2.5±..2±.5 N6.5TYP N.±. N5.4±. N Top View Bottom View.4~.5 ~.5.3~.43 Side View.5REF Golden Gate Integrated Circuits, Inc. Page 6 of 7 REV:

7 CAUTION ELECTROSTATIC SENSITIVE DEVICE DO NOT OPEN OR HANDLE EXPECT AT A STATIC-FREE WORKSTATION MOS Devices Operation Notes: Electrostatic charges may exist in many things. Please take the following preventive measures to prevent effectively the MOS electric circuit as a result of the damage which is caused by discharge: The operator must put on wrist strap which should be earthed to against electrostatic. Equipment cases should be grounded. All tools used during assembly, including soldering tools and solder baths, must be grounded. MOS devices should be packed in antistatic/conductive containers for transportation. Disclaimer: The information furnished in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Golden Gate Integrated Circuits (GGIC) for its use. GGIC reserves the right to change circuitry and specifications at any time without notification to the customer. Golden Gate Integrated Circuits reserves the right to make changes to the information herein for the improvement of the design and performance without further notice! Customers should obtain the latest relevant information before placing orders and should verify that such information is complete and current. All semiconductor products malfunction or fail with some probability under special conditions. When using Golden Gate Integrated Circuits products in system design or complete machine manufacturing, it is the responsibility of the buyer to comply with the safety standards strictly and take essential measures to avoid situations in which a malfunction or failure of such Golden Gate Integrated Circuits products could cause loss of body injury or damage to property. Golden Gate Integrated Circuits (GGIC) Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of GGIC Products for use in life support appliances, devices or systems is a Purchaser's own risk and Purchaser agrees to fully indemnify GGIC for any damages resulting from such use or sale. Golden Gate Integrated Circuits, Inc. Page 7 of 7 REV:

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