SQFlash Industrial SD Card SQFlash Technical Manual

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1 SQFlash Technical Manual REV 0.2 Page 1 of 15 Jul. 9, 2010

2 CONTENTS 1. Overview Standard Features Additional Features Pin Assignment and Block Diagram Power Consumption Electrical Specifications DC Characters Threshold level for High Voltage Range Bus Signal Levels General Bus Signal Line Levels AC Characters SD Interface Timing (Default) SD Interface Timing (High-speed Mode) Flash Interface AC Characteristic Flash Memory Timing Dimensions Appendix: Part Number Table REV 0.2 Page 2 of 15 Jul. 9, 2010

3 Revision History Rev. Date History /6/ st draft /7/9 1. Add Part Number list Advantech reserves the right to make changes without further notice to any products or data herein to improve reliability, function, or design. Information furnished by Advantech is believed to be accurate and reliable. However, Advantech does not assure any liability arising out of the application or use of this information, nor the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others. Copyright Advantech Co., Ltd. All rights reserved. REV 0.2 Page 3 of 15 Jul. 9, 2010

4 1. Overview The (ISD) of the SQFlash is fully compliant to the specification released by SD Card Association. The Command List supports [Part 1 Physical Layer Specification Ver2.0 Final] definitions. Card Capacity of Non-secure Area, Secure Area Supports [Part 3 Security Specification Ver2.0 Final] Specifications. The SQF-ISD is based on 9-pin interface, designed to operate at a maximum operating frequency of 50MHz. It can alternate communication protocol between the SD mode and SPI mode. It performs data error detection and correction with very low power consumption. More importantly, the ISD of the SQFlash offers a wide range of storage capacities. The SQF-ISD is specifically made for any rigorous environments where devices need to be operated at extended temperature, and strong data integrity and reliability are demanded. Such environments include both industrial and automotive applications. The SQF-ISD is the best choice for exceptional reliability, excellent performance and wide compatibility. REV 0.2 Page 4 of 15 Jul. 9, 2010

5 2. Standard Features Support SD system specification version 2.0. Card Capacity of Non-secure Area, Secure Area Supports [Part 3 Security Specification Ver2.0 Final] Specifications Support SD SPI mode Designed for read-only and read/write cards. Default mode: Variable clock rate 0-25MHz, up to 12.5MB/sec interface speed (using 4 parallel data lines) High-Speed mode: Variable clock rate 0-50MHz, up to 25MB/sec interface speed (using 4 parallel data lines) The Command List supports [Part 1 Physical Layer Specification Ver2.0 Final] definitions Copyrights Protection Mechanism - Complies with highest security of SDMI standard Password Protection of cards (option) Write Protect feature using mechanical switch Built-in write protection features (permanent and temporary) High transmission speed +4KV/-4KV ESD protection in contact pads Dimensions: 32mm (L) x 24mm (W) x 2.1mm (H) REV 0.2 Page 5 of 15 Jul. 9, 2010

6 3. Additional Features SDC Capacities SLC type:1gb,2gb SDHC Capacities SLC type:4gb,8gb SQFlash Flash type Only use SLC (single level cell) NAND flash of average 10 times lifecycle and much faster against MLC (multiple level cell) Temperature Ranges Industrial Temperature -25 to 85 for operating -40 to 85 for storage Mechanical Specification Shock:1,500G, Peak / 0.5ms Vibration:5G, Peak / 10~2000Hz Humidity Operating Humidity:5% ~ 93% Non-Operating Humidity:5% ~ 93% NAND flash Data Retention 10 years REV 0.2 Page 6 of 15 Jul. 9, 2010

7 4. Pin Assignment and Block Diagram pin SD memory Card Pad Assignment SD Mode SPI Mode Name Type (1) Description Name Type Description 1 CD/DAT3 (2) (3) Card Detect/ I/O/PP Data Line[bit3] CS I (3) Chip Select (net true) 2 CMD PP Command/Response DI I Data In 3 V SS1 S Supply voltage ground VSS S Supply voltage ground 4 V DD S Supply voltage VDD S Supply voltage 5 CLK I Clock SCLK I Clock 6 V SS2 S Supply voltage ground VSS2 S Supply voltage ground 7 DAT0 I/O/PP Data Line[bit0] DO O/PP Data Out 8 DAT1 I/O/PP Data Line[bit1] RSV 9 DAT2 I/O/PP Data Line[bit2] RSV (1) S: power supply, I:input; O:output using push-pull drivers; PP:I/O using push-pull drivers (2) The extended DAT lines (DAT1-DAT3) are input on power up. They start to operate as DAT lines after SET_BUS_WIDTH command. The Host shall keep its own DAT1-DAT3 lines in input mode, as well, while they are not used. It is defined so, in order to keep compatibility to MultiMedia Cards. (3) At power up this line has a 50KOhm pull up enabled in the card. This resistor serves two functions Card detection and Mode Selection. For Mode Selection, the host can drive the line high or let it be pulled high to select SD mode. If the host wants to select SPI mode it should drive the line low. For Card detection, the host detects that the line is pulled high. This pull-up should be disconnected by the user, during regular data transfer, with SET_CLR_CARD_DETECT (ACMD42) command. Name Width Description CID 128bit Card identification number; card individual number for identification. Mandatory RCA 16bit Relative card address; local system address of a card, dynamically suggested by the card and approved by the host during initialization. Mandatory DSR 16bit Driver Stage Register; to configure the card s output drivers. Optional CSD 128bit Card Specific Data; information about the card operation conditions. Mandatory SDR 64bit SD Configuration Register; information about the SD Memory Card s Special Features capabilities. Mandatory OCR 32bit Operation condition registers. Mandatory REV 0.2 Page 7 of 15 Jul. 9, 2010

8 5. Power Consumption Table list as below is the power consumption of ISD card with different type of flash memory. Max Power up Max Stand by Max Read Max Write Flash mode Current (ua) Current (ua) Current (ma) Current (ma) Single (1) V 3.6V flash (1x8bit) (1) Data transfer mode is single channel. 6. Electrical Specifications Absolute Maximum Rating Item Symbol Parameter MIN MAX Unit 1 V DD -V SS DC Power Supply V 2 V IN Input Voltage V SS -0.3 V DD +0.3 V 3 Ta Operating Temperature Tst Storage Temperature Parameter Symbol Min MAX Unit Operation Temperature Ta V DD Voltage V DD V REV 0.2 Page 8 of 15 Jul. 9, 2010

9 7. DC Characters 7.1 Threshold level for High Voltage Range Parameter Symbol Min Max Unit Remarks Supply voltage V DD V Output High Voltage VOH 0.75*VDD V IOH=-100uA V DD Min. Output Low Voltage VOL 0.125*VDD V IOL = 100uA V DD min Input High Voltage VIH 0.625*VDD VDD+0.3 V Input Low Voltage VIL VSS *VDD V Power up time 250 ms From 0v to V DD min. 7.2 Bus Signal Levels 7.3 General Parameter Symbol Min Max Unit Remarks Peak voltage on all lines -0.3 V DD +0.3 V All Inputs Input Leakage Current ua All Outputs Output Leakage Current ua 7.4 Bus Signal Line Levels Parameter symbol Min Max Unit Remark Pull-up resistance R CMD R DAT kω to prevent bus floating Total bus capacitance for each signal line Capacitance of the card for each signal pin Maximum signal line inductance Pull-up resistance inside card (pin1) C L 40 pf CCARD RDAT3 10 pf 1 card CHOST+CBUS shall not exceed 30 pf 16 nh f pp <20 MHz kω May be used for card detection REV 0.2 Page 9 of 15 Jul. 9, 2010

10 8. AC Characters 8.1 SD Interface Timing (Default) Parameter Symbol Min Max Unit Remark Clock CLK (All values are referred to min(v IH ) and max(v IL ) Clock frequency Data Transfer Mode f PP 0 25 MHz Clock frequency Identification Mode f OD 0 (1) / khz Clock low time t WL 10 ns Clock high time t WH 10 ns Clock rise time t TLH 10 ns Clock fall time t THL 10 ns Inputs CMD, DAT (referenced to CLK) Input set-up time t ISU 5 ns Input hold time t IH 5 ns Outputs CMD, DAT (referenced to CLK) Output Delay time during Data C t Transfer Mode ODLY 0 14 ns L 40 pf Output Delay time during C todly 0 50 ns L 40 pf Identification Mode (1) 0Hz means to stop the clock. The given minimum frequency range is for cases were continues clock is required. REV 0.2 Page 10 of 15 Jul. 9, 2010

11 8.2 SD Interface Timing (High-speed Mode) Parameter Symbol Min Max Unit Remark Clock CLK (All values are referred to min(v IH ) and max(v IL ) Clock frequency Data Transfer Mode f PP C 0 50 MHz card 10 pf Clock low time t WL 7 ns Clock high time t WH 7 ns Clock rise time t TLH 3 ns Clock fall time t THL 3 ns Inputs CMD, DAT (referenced to CLK) Input set-up time t ISU 6 ns Input hold time t IH 2 ns Outputs CMD, DAT (referenced to CLK) Output Delay time during Data C t Transfer Mode ODLY 14 ns L 40 pf Output Hold time T OH ns C L 15 pf Total System capacitance of each CL 15 pf C line¹ L 40 pf (1) In order to satisfy severe timing, host shall drive only one card. 8.3 Flash Interface AC Characteristic Parameter Symbol Min Max Unit REV 0.2 Page 11 of 15 Jul. 9, 2010

12 CLE Set-up Time t CLS 0 - ns CLE Hold Time t CLH 5 - ns /CE Setup Time t CS 8 - ns /CE Hold Time t CH 5 - ns WE Pulse Width t WP 12 - ns ALE Setup Time t ALS 0 - ns ALE Hold Time t ALH 5 - ns Data Setup Time t DS 10 - ns Data Hold Time t DH 5 - ns Write Cycle Time t WC 25 - ns WE High Hold Time t WH 10 - ns Read Cycle Time t RC 25 - ns /RE Pulse Width t RP 12 - ns /RE High Hold Time t REH 10 - ns Ready to /RE Low t RR 20 - ns 8.4 Flash Memory Timing a. Command Latch Cycle b. Address Latch Cycle c. Input Data Latch Cycle REV 0.2 Page 12 of 15 Jul. 9, 2010

13 d. Sequential Out Cycle after Read (CLE=L, /WE=H, ALE=L) REV 0.2 Page 13 of 15 Jul. 9, 2010

14 9. Dimensions Dimensions of A SD Card (Bottom View, DIN) REV 0.2 Page 14 of 15 Jul. 9, 2010

15 Appendix: Part Number Table Product SQFlash SD Card SLC 1G, 1CH (-40~85 C) SQFlash SD Card SLC 2G, 2CH (-40~85 C) SQFlash SD Card SLC 4G, 2CH (-40~85 C) SQFlash SD Card SLC 8G, 2CH (-40~85 C) Advantech PN SQF-ISDS1-1G-ETE SQF-ISDS2-2G-ETE SQF-ISDS2-4G-ETE SQF-ISDS2-8G-ETE REV 0.2 Page 15 of 15 Jul. 9, 2010

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