COMPUTER SYSTEMS ORGANIZATION

Transcription

1 2 COMPUTER SYSTEMS ORGANIZATION

2 Central processing unit (CPU) Control unit Arithmetic logical unit (ALU) Registers I/O devices Main memory Disk Printer Bus Figure 2-. The organization of a simple computer with one CPU and two I/O devices.

3 A + B A Registers B A B ALU input register ALU input bus ALU A + B ALU output register Figure 2-2. The data path of a typical von Neumann machine.

4 public class Interp { static int PC; static int AC; static int instr; static int instrtype; static int dataloc; static int data; static boolean runbit = true; // program counter holds address of next instr // the accumulator, a register for doing arithmetic // a holding register for the current instruction // the instruction type (opcode) // the address of the data, or if none // holds the current operand // a bit that can be turned off to halt the machine public static void interpret(int memory[ ], int startingaddress) { // This procedure interprets programs for a simple machine with instructions having // one memory operand. The machine has a register AC (accumulator), used for // arithmetic. The ADD instruction adds am integer in memory to the AC, for example // The interpreter keeps running until the run bit is turned off by the HALT instruction. // The state of a process running on this machine consists of the memory, the // program counter, the run bit, and the AC. The input parameters consist of // of the memory image and the starting address. } PC = startingaddress; while (runbit) { instr = memory[pc]; // fetch next instruction into instr PC = PC + ; // increment program counter instrtype = getinstrtype(instr); // determine instruction type dataloc = finddata(instr, instrtype); // locate data ( if none) if (dataloc >= ) // if dataloc is, there is no operand data = memory[dataloc]; // fetch the data execute(instrtype, data); //execute instruction } } private static int getinstrtype(int addr) {... } private static int finddata(int instr, int type) {... } private static void execute(int type, int data){... } Figure 2-3. An interpreter for a simple computer (written in Java).

5 S S2 S3 S4 S5 Instruction fetch unit Instruction decode unit Operand fetch unit Instruction execution unit Write back unit (a) S: S2: S3: S4: S5: Time (b) Figure 2-4. (a) A five-stage pipeline. (b) The state of each stage as a function of time. Nine clock cycles are illustrated.

6 S S2 S3 S4 S5 Instruction fetch unit Instruction decode unit Instruction decode unit Operand fetch unit Operand fetch unit Instruction execution unit Instruction execution unit Write back unit Write back unit Figure 2-5. (a) Dual five-stage pipelines with a common instruction fetch unit.

7 S4 ALU S ALU S2 S3 S5 Instruction fetch unit Instruction decode unit Operand fetch unit LOAD Write back unit STORE Floating point Figure 2-6. A superscalar processor with five functional units.

8 Control unit Broadcasts instructions Processor 8 8 Processor/memory grid Memory Figure 2-7. An array processor of the ILLIAC IV type.

9 Local memories Shared memory Shared memory CPU CPU CPU CPU CPU CPU CPU CPU Bus Bus (a) (b) Figure 2-8. (a) A single-bus multiprocessor. (b) A multicomputer with local memories.

10 Address Address Cell Address bits (b) 5 6 bits (c) 8 bits (a) Figure 2-9. Three ways of organizing a 96-bit memory.

11 Computer Bits/cell Burroughs B7 IBM PC 8 DEC PDP-8 2 IBM 3 6 DEC PDP-5 8 XDS Electrologica X8 27 XDS Sigma 9 32 Honeywell CDC CDC Cyber 6 Figure 2-. Number of bits per cell for some historically interesting commercial computers.

12 Address Big endian Little endian Address bit word Byte 32-bit word Byte (a) (b) Figure 2-. (a) Big endian memory. (b) Little endian memory.

13 Big endian Little endian Transfer from big endian to little endian Transfer and swap J I M M I J M I J J I M 4 S M I T T I M S 4 T I M S S M I T 4 8 H H 8 H H (a) (b) (c) (d) Figure 2-2. (a) A personnel record for a big endian machine. (b) The same record for a little endian machine. (c) The result of transferring the record from a big endian to a little endian. (d) The result of byte-swapping (c).

14 Word size Check bits Total size Percent overhead Figure 2-3. Number of check bits for a code that can correct a single error.

15 A A A B C B C Parity bits B Error C (a) (b) (c) Figure 2-4. (a) Encoding of. (b) Even parity added. (c) Error in AC.

16 Memory word Parity bits Figure 2-5. Construction of the Hamming code for the memory word by adding 5 check bits to the 6 data bits.

17 CPU Main memory Cache Figure 2-6. The cache is logically between the CPU and main memory. Physically, there are several possible places it could be located. Bus

18 4-MB memory chip Connector Figure 2-7. A single inline memory module (SIMM) holding 32 MB. Two of the chips control the SIMM.

19 Registers Cache Main memory Magnetic disk Tape Optical disk Figure 2-8. A five-level memory hierarchy.

20 Intersector gap Preamble Track width is 5 microns sector 496 data bits Direction of arm motion Width of bit is. to.2 microns E CC Preamble Read/write head Disk arm Direction of disk rotation 496 data bits E C C Figure 2-9. A portion of a disk track. Two sectors are illustrated.

21 Surface 7 Read/write head ( per surface) Surface 6 Surface 5 Surface 4 Surface 3 Surface 2 Surface Direction of arm motion Surface Figure 2-2. A disk with four platters.

22 Parameters LD 5.25 HD 5.25 LD 3.5 HD 3.5 Size (inches) Capacity (bytes) 36K.2M 72K.44M Tracks Sectors/track Heads Rotations/min Data rate (kbps) Type Flexible Flexible Rigid Rigid Figure 2-2. Characteristics of the four kinds of floppy disks.

23 Name Data bits Bus MHz MB/sec SCSI SCSI Fast SCSI-2 8 Fast & wide SCSI Ultra SCSI Figure Some of the possible SCSI parameters.

24 Strip Strip Strip 2 Strip 3 (a) Strip 4 Strip 5 Strip 6 Strip 7 RAID level Strip 8 Strip 9 Strip Strip (b) Strip Strip 4 Strip Strip 5 Strip 2 Strip 6 Strip 3 Strip 7 Strip Strip 4 Strip Strip 5 Strip 2 Strip 6 Strip 3 Strip 7 RAID level Strip 8 Strip 9 Strip Strip Strip 8 Strip 9 Strip Strip Bit Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 (c) RAID level 2 Bit Bit 2 Bit 3 Bit 4 Parity (d) RAID level 3 Strip Strip Strip 2 Strip 3 P-3 (e) Strip 4 Strip 5 Strip 6 Strip 7 P4-7 RAID level 4 Strip 8 Strip 9 Strip Strip P8- Strip Strip Strip 2 Strip 3 P-3 Strip 4 Strip 5 Strip 6 P4-7 Strip 7 (f) Strip 8 Strip 9 P8- Strip Strip RAID level 5 Strip 2 P6-2 Strip 3 Strip 4 Strip 5 P6-9 Strip 2 Strip 7 Strip 8 Strip 9 Figure RAID levels through 5. Backup and parity drives are shown shaded.

25 Spiral groove Pit Land 2K block of user data Figure Recording structure of a Compact Disc or CD-ROM.

26 Symbols of 4 bits each Preamble Bytes 6 42 Symbols make frame 98 Frames make sector Data ECC Frames of 588 bits, each containing 24 data bytes Mode sector (2352 bytes) Figure Logical data layout on a CD-ROM.

27 Printed label.2 mm Protective lacquer Reflective gold layer Dye layer Dark spot in the dye layer burned by laser when writing Polycarbonate Direction of motion Lens Substrate Photodetector Prism Infrared laser diode Figure Cross section of a CD-R disk and laser (not to scale). A silver CD-ROM has a similar structure, except without the dye layer and with a pitted aluminum layer instead of a gold layer.

28 ,,,,.6 mm Single-sided disk.6 mm Single-sided disk Polycarbonate substrate Adhesive layer Polycarbonate substrate 2 Semireflective layer Aluminum reflector Aluminum reflector Semireflective layer Figure A double-sided, dual layer DVD disk.

29 SCSI controller Sound card Modem Edge connector Card cage Figure Physical structure of a personal computer.

30 Monitor Keyboard Floppy disk drive Hard disk drive CPU Memory Video controller Keyboard controller Floppy disk controller Hard disk controller Bus Figure Logical structure of a simple personal computer.

31 SCSI scanner SCSI bus SCSI disk CPU cache SCSI controller PCI bridge Memory bus Video controller Main memory Network controller PCI bus Sound card Printer controller ISA bridge Modem Figure 2-3. A typical modern PC with a PCI bus and an ISA bus. The modem and sound card are ISA devices; the SCSI controller is a PCI device. ISA bus

32 Electron gun Grid Screen Spot on screen Horizontal scan Vacuum Vertical deflection plate (a) Vertical retrace Horizontal retrace (b) Figure 2-3. (a) Cross section of a CRT. (b) CRT scanning pattern.

33 Rear glass plate Rear electrode Liquid crystal ACƒÁÃACƒÁÃACƒÁÃACƒÁÃACƒÁÃACƒÁÃACƒÁÃACƒÁà Light source Rear polaroid Front glass plate Front electrode Dark Front polaroid Bright y z Notebook computer (a) (b) Figure (a) The construction of an LCD screen. (b) The grooves on the rear and front plates are perpendicular to one another.

34 CPU Character Main memory Attribute Video board A2B2C2 Video RAM Analog video signal Monitor ABC Bus Figure Terminal output on a personal computer.

35 CPU Serial I/O card Memory UART RS-232-C connector Telephone line (analog) Terminal ABC ABC Modem Modem Some signals: Protective ground () Transmit (2) Receive (3) Request to send (4) Clear to send (5) Data set ready (6) Common return (7) Carrier detect (8) Data terminal ready (2) Keyboard Figure Connection of an RS-232-C terminal to a computer. The numbers in parentheses in the list of signals are the pin numbers.

36 Pointer controlled by mouse Window Menu Cut Paste Copy Mouse buttons Mouse Rubber ball Figure A mouse being used to point to menu items.

37 (a) (b) Figure (a) The letter A on a 5 7 matrix. (b) The letter A printed with 24 overlapping needles.

38 Laser Rotating octagonal mirror Drum sprayed and charged Light beam strikes drum Drum Toner Scraper Discharger Heated rollers Blank paper Stacked output Figure Operation of a laser printer.

39 (a) (b) (c) (d) (e) (f) Figure Halftone dots for various gray scale ranges. (a) 6. (b) 4 2. (c) (d) (e) 5. (f) 6 67.

40 V2 Time (a) Voltage V High amplitude Low amplitude (b) High frequency Low frequency (c) (d) Phase change Figure Transmission of the binary number over a telephone line bit by bit. (a) Twolevel signal. (b) Amplitude modulation. (c) Frequency modulation. (d) Phase modulation.

41 ISDN terminal Digital bit pipe ISDN telephone ISDN terminal ISDN alarm T U To ISDN carrier's NT exchange internal network Customer's equipment Carrier's equipment Figure 2-4. ISDN for home use.

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