FlexRIO. FPGAs Bringing Custom Functionality to Instruments. Ravichandran Raghavan Technical Marketing Engineer. ni.com

Transcription

1 FlexRIO FPGAs Bringing Custom Functionality to Instruments Ravichandran Raghavan Technical Marketing Engineer

2 Electrical Test Today Acquire, Transfer, Post-Process Paradigm Fixed- Functionality Triggers and Records Open-Loop, Stimulus- Response Data Test Vector and Waveform Synthesis and Analysis Tools 2

3 FPGA-Based Test Methods Real-Time, Continuous Measurements Custom Triggering and Acquisition Closed-Loop and Dynamic Test Protocol Emulation 3

4 What is an FPGA? Field-Programmable Gate Array Gate Array Interconnect is done once with a specified function FPGA Field-programmable gates and interconnects Gate Array FPGA 4

5 FPGA Reconfigurable Components Interconnect Logic Elements are basic building blocks of an FPGA and can be programmed to carry out different function as required by the design. IOB IOB IOB Logic Element Logic Element Logic Element Logic Element Interconnect Logic Element Interconnect Logic Element Logic Element Logic Element Logic Element IOB IOB IOB Interconnects wire different logic cells together to form more complex design blocks. Interconnect Input/Output Blocks connect internal FPGA architecture to the external design via interfacing pins. Note: Precise architecture of an FPGA varies from manufacturer to manufacturer. 5

6 FPGA Component Overview CLB I/O CMT BUFG BUFIO Block RAM Memory Controller MGT PCIe Endpoint Microprocessor DSP48 6

7 FPGA Component Intro General Purpose Resources Configurable Logic Block (CLB) Routing Specialized Resources Block Memory (BRAM) DSP Clocking Input / Output Block (IOB) Note: Most applications do not require detailed knowledge of these components. 7

8 FPGA Technology Programmable Interconnects Logic Blocks Field-Programmable Gate Array I/O Blocks 8

9 FPGA Logic Implementation Implementing Logic on an FPGA: F = {(A+B)CD} E E LabVIEW FPGA Code F A B C D 9

10 Why are FPGAs useful? High Reliability Designs implemented in hardware High Performance Computational abilities open new possibilities for measurement and data processing speed True Parallelism Enables parallel tasks and pipelining, reducing test times Low Latency Run algorithms at deterministic rates down to 5 ns Reconfigurable Create DUT / application-specific personalities 10

11 FPGA-Based Test Benefits Real-Time, Continuous Measurements Custom Triggering and Acquisition Higher test throughput Reduced cost More complete test coverage Higher measurement confidence Closed-Loop and Dynamic Test Protocol Emulation 11

12 FPGA-Based Test Benefits Real-Time, Continuous Measurements Custom Multi-site test Triggering Reduce and / eliminate custom hardware Acquisition User-customizable Implement tests previously too complex / costly Closed-Loop and Dynamic Test Protocol Emulation 12

13 FPGA-Based Test Benefits Real-Time, Continuous Measurements Custom Triggering and Acquisition DUT / protocol-aware test Reduce need to design for test Reduce / eliminate custom hardware Protocol Emulation Closed-Loop and Dynamic Test 13

14 FPGA-Based Test Benefits Real-Time, Continuous Measurements Custom Triggering and Acquisition Reduce need to design for Closed-Loop test Test in real-world operating and conditions Dynamic Implement tests previously too complex Test / costly Protocol Emulation 14

15 Core IP and Interfaces DRAM Example 200 MHz, DDR2, x32 data width Layout (mentioned as part of PCB design): 1 month Pinout verification and closing timing in FPGA: 2-4 weeks Signal integrity: 2 weeks Bit error rate/margin testing: 2 weeks Total: 3 months If things don t go well, multiply by 2x or more If really bad, may need new PCB rev (go back to start) Similar steps for Bus Interface, Converters, and Control Interfaces 15

16 The NI Value With modular FPGA hardware and the PXI platform, NI takes away the burden of many of the most difficult parts of a custom design You can shorten your development timelines and efficiently develop flexible, scalable, and customizable systems Where can this extra development time go? 16

17 The Traditional Development Approach Algorithm Development Hardware/HDL Expert Domain/Algorithm Expert Prototype Algorithm Simulations 17

18 The Traditional Development Approach Domain/Algorithm Expert Floating Point Algorithm Development Algorithm Simulation Write Design Specification Hardware/HDL Expert VHDL, Verilog, Fixed-Point Translate Design Spec to Hardware Device Specific Implementation Fixed-Point, Overflows, etc. Write HDL Write Testbench Run Simulation (Send Results to Domain Expert) Synthesis to FPGA or ASIC 18

19 The LabVIEW Development Approach Domain/Algorithm Expert 1. Algorithm Development 2. Algorithm Test (LabVIEW) 3. Map Algorithm to Hardware (LabVIEW FPGA palette) 4. Create Cycle Accurate Hardware Model (LabVIEW) 5. Simulate Using LabVIEW TestBench (LabVIEW FPGA) 6. Compile 19

20 Value of Graphical Programming for FPGAs How we think: How we program: Source: Wikipedia Enable a domain expert to program FPGAs 20

21 National Instruments FlexRIO LabVIEW FPGA-Enabled Instrumentation 21

22 NI FlexRIO System Architecture PXI/PXIe NI FlexRIO Adapter Module Interchangeable I/O Analog or digital NI FlexRIO Adapter Module Development Kit (MDK) NI FlexRIO FPGA Module Virtex-5 FPGA 132 digital I/O lines Up to 512 MB of DRAM PXI Platform Synchronization Clocking/triggers Power/cooling Data streaming 22

23 NI FlexRIO FPGA Modules for PXI VirtexVirtex-5 FPGA Direct access to FPGA I/O 132 single-ended lines or 66 differential pairs 400 Mbps single-ended 1 Gbps differential 128 MB onboard DRAM LX30, LX50, LX85, LX110 2x 64 MB banks 800 MB/s per bank Adapter module required for IO 23

24 NI FlexRIO FPGA Modules for PXI Express Onboard DRAM 2x 256 MB banks 1.6 GB/s per bank Enhanced Synchronization Share PXI 10 MHz reference clock or DSTAR_A with adapter module Peer-to-peer streaming 24

25 NI FlexRIO Peer-to-Peer Architecture >800 MB/s oneone-way >700 MB/s both ways ~10 us latency Up to 16 streams per FPGA 25

26 P2P Streaming Instruments PXIe-5122 Digitizer Dual-channel 14-bit, 100 MS/s 100 MHz bandwidth 400 MB/s streaming PXIe-5665 VSA 20Hz to 14GHz 50 MHz Bandwidth 62.5 MS/s IQ Rate 300 MB/s streaming PXIe-5622 IF Digitizer 16-bit, 150 MS/s MHz bandwidth 60 MHz bandwidth DDC 300 MB/s streaming 26

27 P2P Streaming Instruments PXIe-5450/51 Arb Dual-channel 16-bit, 400 MS/s 145 MHz bandwidth 800 MB/s streaming from PXI Express FlexRIO 27 PXIe-5663 VSG 85 MHz to 6.6 GHz 16-bit, 400 MS/s >100 MHz bandwidth 800 MB/s streaming from PXI Express FlexRIO

28 FPGA #1 (Writer) P2P Software Host VI FPGA #2 (Reader) 28

29 Instrument Customization Real-Time, Continuous Measurements Frequency Domain Spectral Measurements Averaging Inline Filtering Event Classification Custom Triggering and Acquisition Frequency-Domain Trigger Boolean Combinatorial Trigger Time-Domain Window Hardware Test Sequencer DUT Control Dynamic RF Modulation Dynamic Digital Protocol Closed-Loop and Dynamic Test DUT Interface Protocol Emulation 29

30 FPGA Test Applications Real-Time, Continuous Measurements FFT Coprocessing Custom Triggering and Acquisition Real-Time Spectrum Analyzer Frequency-Domain Trigger RFID, HDMI Tester Channel Emulator Software-Defined Radio, Digital and Analog Bit-Error Rate Closed-Loop and Dynamic Test Protocol-Aware Tester Protocol Emulation 30