A New Optimal State Assignment Technique for Partial Scan Designs

Transcription

1 A New Optimal State Assignment Technique for Partial Scan Designs Sungju Park, Saeyang Yang and Sangwook Cho The state assignment for a finite state machine greatly affects the delay, area, and testabilities of the sequential circuits. In order to reduce the length and number of feedback cycles, a new state assignment technique based on m-block partition is introduced in this paper. After the completion of proposed state assignment and logic synthesis, partial scan design is performed to choose minimal number of scan flipflops. Experiment shows drastic improvement in testabilities while preserving low area and delay overhead. Introduction: The difficulty of sequential test generation can be alleviated at the expense of full or partial scan designs. Various partial scan design techniques have been suggested [1-6]. In [1], a set of FFs is chosen guided by different testability measures in order to avoid the hard to observe and control FFs. Targeting for the faults escaped from functional level test generator, they enumerate all the FFs needed for each fault which is also escaped from the sequential test generator. Quite a few graph theoretical approaches have been introduced. Initiated by the observation of the effects of feedback cycles in sequential test generator[2], different algorithms have been suggested to remove sets of cycles in different graph models. Minimal feedback vertex sets have been selected using various heuristics[2,3]. Instead of analyzing only the gate level circuit information, a number of state encoding techniques have been developed for partial scan designs[4,5]. In [4], implicit techniques for FSM traversal is used to identify non-controllable state registers. State bi-partitioning technique is introduced to minimize the dependencies among state variables and thus to reduce the feedback cycles[5]. Hard to reach states are converted to easily reachable states by scanning certain flip-flops[6]. In this paper we introduce m-block state partitioning technique, which is more general and efficient than bi-partitioning technique in [5], to maximize the testabilities and minimize the area and delay overhead State Encoding for Finite State Machine : Motivation : A few state encoding algorithms have been announced to enhance circuit area, delay, and testabilities. One hot encoding technique matches each state with a unique flip-flop, hence N flip-flops are required for each N state machine. Although most number of flip-flops is demanded among various encoding techniques, it is very efficient in reducing next state and primary output logics. Jedi technique, which introduces efficient heuristic bestowing different weights on symbol pairs and in general requires least area overhead with logn flip-flops, is widely adopted for multi-level implementation. It is known that the above state encoding algorithms give a great impact on testabilities as well as the circuit area and speed.

2 (a) a : b : c : d : e : 1 f : g : h : a : b : 1 1 c : d : e : 1 f : g : h : Figure 1: State Transition Table and Assignments We will apply the conventional random state encoding algorithm and check the dependencies among state variables. The state table shown in figure 1.a can be synthesized to the figure 2 and figure 3 circuits by taking the figure 1.b state assignments and. It is noted that three flip-flops Y1(y1), Y2(y2), Y3(y3) (Y: next state, y: current state) in figure 2 have complete dependencies among themselves with two simple cycles. On the other hand, if the circuit is implemented as figure 3 using the state assignment, the dependencies among three state variables Y1(y1), Y2(y2), Y3(y3) are unidirectional, and it is more efficient for partial scan design than the previous state assignment. Since no simple cycle exist in figure 3 circuit, we may not need any scan flip-flop for testing. It can be further notified that the bit changes between states in state assignment is 6 bits less than the assignment. Figure 2: Circuit structure and Scan Graph by State Assignment α Therefore we can conclude that the assignment is better than both in area and testability senses. Figure 3: Circuit structure and Scan Graph by State Assignment β

3 Optimal State Assignment for Partial Scan Design : A few terms are defined as followings for detailed description of optimal state assignment. Definition 1] A partition consists of blocks such that there is no common state symbol among the subsets and the union of all subsets constitutes the state set S of a FSM. Definition 2] Partition pair (p1,p2) is an ordered pair of partitions p1 and p2 in which any state in a block of the partition p1 is transited to the same block of the partition p2. Definition 3] Closed partition: A partition P on the set of states of a sequential machine is said to be closed if, for every two states s1 and s2 which are in the same block of P and any input I, the next states for s1 and s2 are in common block of P. Definition 4] (0): every block in the product contains only a single state. Definition 5] m-partition: the smallest partition containing all the successors of the blocks of predecessor partition. Definition 6] M-partition: the largest partition the successors whose blocks are contained in the blocks of m-partition. Definition 7] Mm pairs: an ordered pair of partitions such that, if states s1 and s2 are in the same block of M-partition, then for every input I, the next states for s1 and s2 are in the same block of m-partition. (a) (b) Figure 4: State Assignment and Circuit Structure Let us consider two partitions p' = (a, d : b : c,e : f) and p" = (a, e : b, d, c, f) from the figure 4.a state transition diagram. The p' and p" are 4-block and 2-block partitions respectively, and an ordered pair (p',p") is a partitioning pair. The relation between partition and state assignment can be explained through the figure 4.a. From the state assignment, each state variable generate a 2-block partition, that is, y1 variable produces p1 = (a, b, d : c, e, f) partition, y2 produces p2 = (a, c, d, e : b, f), and y3 produces p3 = (a, e : b, d, c, f). Furthermore more than one variables can generate m-block partitions such as y1 and y2 produce p12=(a, d : b : c, e : f) 4-block partition. Hence state assignment and block partitioning can be considered as a similar problem, and possibly the dependencies among memory elements of a sequential circuit may be estimated from the block partition. In figure 4.b, it can be seen that next state variable Y3 depends on the current state variables y1 and y2, and two memory element pairs of (FF3, FF2) and (FF3, FF1) do not include any feedback loop between flip-flops within each pair. By assigning state codes through the block partitioning, not only the great reduction in area is achievable but also the plagued test

4 generation problem for sequential circuits can be drastically simplified. In this paper, we adopt generalized m-block partitioning method in assigning state codes and develop an efficient heuristics to minimize the dependencies among state variables. Although 2-block partition can consider dependencies among single state variables only, our approach takes into account the dependencies among set of state variables with m-block partition, thus the complex feedback cycles are greatly simplified. In other word, by considering m-block partition our approach can identify the dependencies among set of state variables more globally, and thereby find an optimal state assignment for partial scan. In [4], non-controllability of flip-flops is evaluated by a systematic analysis of the state transitions and the encoding of the underlying FSM. In contrast to the method in [4], which is for selecting an optimal set of flip-flops for partial scan at gate-level, our method considers m-block partition to find an optimal state encoding, which could keep the number of non-controllable flip-flops minimal during the state assignment. The state assignment algorithm proposed in this paper for the minimal mutual dependencies among memory elements can be summarized as the figure 5. Step 1. k= log n state variables for n state encoding Step 2. While ( states > 2) { Find M and m from the state table IF (M, m = ( (partition pairs & Closed partition) ){ Find Mm pairs Select (0) among Mm pairs Select yr(1 r<k) state variables from the M partition Assign state value to each state variable Select yk-r state variables from the m partition Assign state value to each state variable } } Step 3. Repeat Step 2 until the partitions are partition pair relations Figure 5: State Assignment Algorithm Experimental Results : For the experiments, synthesis tool SIS from U.C. Berkeley, partial scan design tool PSCAN from Hanyang Univ., and automatic test pattern generating tool HITEC from U.C. Illinois are extensively used. The stuck-at fault coverages for the sequential circuits synthesized by applying each state assignment and our method are compared in table 1. Especially Mm pairs gives the highest fault coverage than any other algorithm for tbk benchmark. For keyb circuit, although our method results in 0.74% lower coverage than the one-hot, but 5.78% and 1.84% improvements than the Jedi and random respectively. As expected the m-block partition gives better fault coverages than 2-block partition, and in general m-block shows the best performance among others. The area overhead by Mm pairs is less or similar than Jedi, and the delay is less than Jedi but not as good as one-hot as expected. Conclusions : In this paper m-block partitioning technique for the state assignment is proposed for minimal partial scan design. Dependencies among state variables are drastically reduced by taking closed

5 Table 1: Comparison of fault coverages upon different state assignments : (%) Circuit Ns/Nb Jedi Random Mm 2-block One-hot pairs Mark1 16/ Bbsse 16/ s832 25/ Keyb 19/ Tbk 32/ s / partition and zero product pairs. Partial scan design, which is known to be highly affected by the complexity of feedback cycles, does require less number of flip-flops with the m-block partitioning techniques. Because all the circuits are not completely m-block partitioned, other heuristics need to be investigated to augment the 2-block partitions. References [1] K. T. Cheng and V. D. Agrawal, A Partial Scan Method for Sequential Circuits with Feedback, IEEE Trans. on Computers, Vol. 39, No. 4, pp , April [2] D. H. Lee and S. M. Reddy, On Determining Scan Flip-Flops in Partial Scan Designs, Proc. IEEE Int'l. Conf. on Computer-Aided Design, pp , Nov [3] S. Park and S. B. Akers, A Graph Theoretic Partial Scan Design By K-Cycle Elimination, Proc. IEEE Int'l. Test Conf,, pp , Sept [4] P. Kalla and M. J. Ciesielski., A Comprehensive Approach to the Partial Scan Problem using Implicit State Enumeration, Proc. Int'l. Test Conf., pp , Nov [5] K. T. Cheng, and V. D. Agrawal, Design of Sequential Machines for Efficient Test Generation, in Proc. of ICCAD, pp , [6] S.Sharma and M. S. Hsiao, Partial Scan Using Multi-Hop State Reachability Analysis, in Proc. IEEE VLSI Test Symposium, pp , 1999 [7] Z. Kohavi, Switching and Finite Automata Theory, McGraw-Hill, 1978.

6 Authors affiliations : S. Park ( Dept. of Computer Science and Engineering Hanyang University, Ansan Kyunggi-Do, Korea ) parksj@mslab.hanyang.ac.kr S. Yang ( Dept. of Computer Engineering, Pusan University, JangjunDong, kumjunggu, Pusan, Korea ) syyang@hyowon.cc.pusan.ac.kr S. Cho ( Dept. of Computer Science & Engineering, Hanyang University, Ansan, Kyunggi-Do, Korea ) swcho@mlsb.hanyang.ac.kr Figure Captions : Figure 1: State Transition Table and Assignments Figure 2: Circuit structure and Scan Graph by State Assignment Figure 3: Circuit structure and Scan Graph by State Assignment Figure 4: State Assignment and Circuit Structure Figure 5: State Assignment Algorithm Table Captions : Table 1: Comparison of fault coverages upon different state assignments : (%)

7 Figure 1 (a) a : a : b : b : 1 1 c : c : d : d : e : 1 e : 1 f : f : g : g : h : h : 1 0 1

8 Figure 2

9 Figure 3

10 Figure 4 (a) (b)

11 Figure 5 Step 1. k= log n state variables for n state encoding Step 2. While ( states > 2) { Find M and m from the state table IF (M, m = ( (partition pairs & Closed partition) ){ Find Mm pairs Select (0) among Mm pairs Select yr(1 r<k) state variables from the M partition Assign state value to each state variable Select yk-r state variables from the m partition Assign state value to each state variable } } Step 3. Repeat Step 2 until the partitions are partition pair relations

12 Table 1 Circuit Ns/Nb Jedi Random Mm pairs : (%) 2-block One-hot Mark1 16/ Bbsse 16/ s832 25/ Keyb 19/ Tbk 32/ s /