The CS5600 micro-computer

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1 The CS5600 micro-computer The CS5600 is a fictional computer that will be used for examples in class. The architecture of the system is shown in Figure 1, below. 8 general-purpose registers R0-R7 R7 FFFF F000 I/O R0 16 bits wide Program counter Stack pointer Zero flag PC SP Z Program memory Figure 1 CS5600 System Architecture It has 64K bytes of memory, with an address width of 16 bits, and bit registers plus a condition flag. Instructions are either a single 16-bit word (2 bytes) for simple instructions, or 4 bytes for instructions which require an additional 16-bit value. It has the following 9 categories of instructions: Load, store move data between registers and memory Add, subtract perform basic arithmetic Push, pop manipulate the stack Call, return subroutine invocation Execution starts here on reset FF 0000 Address Space Map Jump goto another address, either unconditionally or conditionally Interrupt vectors 2. Detailed instruction definitions Load/Store instructions: These operate on 16-bit words and 8-bit bytes, and have the following addressing modes: absolute the address used is given as a parameter to the instruction

2 indirect the address is contained in another register indexed the address is calculated by adding a constant value to another register immediate no address is used, and the value is supplied as part of the instruction. LDW_ABS R dst, *addr load word absolute Opcode = LDW_ABS R dst Address Retrieves 16 bits starting at addr and puts the value into R dst. LDB_ABS R dst, *addr load byte absolute Opcode = LDB_ABS R dst Address Retrieves 8 bits starting at addr and puts the value into R dst. The top 8 bits of R dst are set to 0. STW_ABS R src, *addr store word absolute STB_ABS R src, *addr store byte absolute Opcode = STW(B)_ABS R src Addr STW: Takes 16 bit value from R src and stores it into memory starting at addr. STB: Stores 8 bit value found in the low 8 bits of R src into memory at addr. LDW_IND R dst, *(R addr ) load word indirect LDB_IND R dst, *(R addr ) load byte indirect Opcode = LDW(B)_IND R dst R addr LDW_IND: Fetches a 16-bit word from memory, starting at the address found in register R addr and stores it in R dst. LDB_IND: Fetches an 8-bit byte from the memory address found in register R addr and stores it in R dst. The top 8 bits of R dst are set to zero.

3 STW_IND R src, *(R addr ) store word indirect STB_IND R src, *(R addr ) store byte indirect Opcode = STW(B)_IND R src R addr Takes a 16-bit word (8-bit byte) from R src and stores it into memory starting at the address found in R addr. LDW_IDX R dst, *(R addr +offset) load word indexed LDB_IDX R dst, *(R addr +offset) load byte indexed Opcode = LDW(B)_IDX R dst R addr offset Loads a word (byte) into R dst from the address found by adding offset to the value in R addr. STW_IDX R src, *(R addr +offset) store word indexed STB_IDX R src, *(R addr +offset) store byte indexed Opcode = STW(B)_IDX R src R addr offset Stores a word (byte) from R src into the address found by adding offset to the value in R addr. LDW_IMM R dst, value load immediate value Load value into R dst. Opcode = LDW_IMM value R dst

4 Arithmetic Instructions These instructions perform arithmetic operations on values in registers. ADD R src, R dst add register to register Opcode = ADD R src R dst Adds the 16-bit value in R src to the value in R dst and places the result in R dst. ADD_IMM value, R dst add immediate value to register Opcode = ADD_IMM value Adds value to the value in R dst and places the result in R dst. SUB R src, R dst subtract register from register R dst Opcode = SUB R src R dst Subtracts the 16-bit value in R src from the value in R dst and places the result in R dst. If the result is zero, sets the Z flag to 1; otherwise sets Z to 0. SUB_IMM value, R dst subtract immediate value from register Opcode = SUB_IMM value Adds value to the value in R dst and places the result in R dst. If the result is zero, sets the Z flag to 1; otherwise sets Z to 0. MOV R src,r dst move (copy) register to register Copies the contents of R src to R dst. R dst Opcode = MOV R src R dst

5 Stack and Subroutine instructions These instructions are used for manipulating the stack and calling / returning from subroutines. PUSH R src push contents of register to stack Opcode = PUSH Subtracts 2 from SP, and then stores the contents of R src to the address in SP. POP R dst pop top of stack into register Opcode = POP Fetches the contents of the memory location indicated by the address in SP, and saves it in R dst. ADD_IMM #value, SP add immediate to stack pointer Opcode = ADD_IMM Value Adds value to SP, thus discarding value/2 elements from the top of the stack. CALL #addr call subroutine Opcode = CALL Addr Pushes return address (the address of the next instruction after CALL) onto the stack, and jumps to addr. I.e.: SP = SP-2, *SP = PC+4, PC = addr. RET return from subroutine Opcode = RET Pops a return address off the stack and jumps to that address. R src R dst SP

6 Branch instructions These are unconditional and conditional GOTO instructions, used for e.g. loops and 'if' statements. JMP #addr jump unconditionally to address Opcode = JMP Addr Loads the program counter (PC) with addr, causing execution to skip to that address. JMP_Z #addr jump if zero flag set JMP_NZ #addr jump if zero flag clear Opcode = JMP_Z / JMP_NZ Addr If the Z flag is set (not set), jumps to address addr, causing execution to skip to that address. Otherwise does nothing.

7 3. Memory-mapped I/O As shown in Figure 1, addresses from 0000 to EFFF (hexadecimal) are used for normal memory, but the 4KB range from F000 to FFFF is devoted to I/O. What this means is that when the CPU reads or writes an address in this range, the operation will be directed to one of several input/output devices: the frame buffer (for display), keyboard controller, disk controller, or serial terminal controller. The memory map for this region may be seen in Figure 2. Note that there are large undefined sections in this map; the result of reading or writing these addresses is not defined, but is unlikely to be good. FFFF F82F F820 F815 F810 F801 F800 F77F cmd/status (in) F823 data (in) F822 cmd/status (out) F821 data (out) F820 4 serial terminal controllers F82F F82E F82D F82C F816 cmd/status F814 buffer ptr F812 # blocks F810 block # disk controller 80 columns F000 F001 F002 F04F keycode F801 status F800 keyboard controller F050 F09F F rows F730 F77F Frame buffer (F000 F77F) Text-mode frame buffer 80x24 characters Figure 2 Memory-mapped I/O devices The frame buffer is a contiguous array of 80x24 = 1920 bytes of memory. Each address is mapped to a location on the screen; the byte stored at that address will be displayed in the corresponding screen location. (the VGA screen used by the PC BIOS and e.g. Linux running in console mode works almost identically to this)

8 Keyboard controller (F800, F801) When a key is pressed, the key value is stored in the keycode register (F801) and the status register (F800) is set to 1. After software reads the keycode, it writes a 0 to the status register so that it can detect the next keypress. Disk controller (F810 F816) The disk controller has three 16-bit registers for the disk block to read or write (F810), the number of 512-byte blocks to read or write (F812), and the starting address of the memory region to read from or write to (F814). In addition there is a command/status register a command (read = 0x80, write = 0xC0) is written to the register by software, and a status value (0 = failure, 1 = success) is written to the register by hardware when the command is complete. Serial terminal controllers (F820-F82F) In order to allow multiple users to access the computer at once, there are four serial ports connected to external terminals. Incoming data from a terminal is received in the same way as for the keyboard controller the data byte is placed in the data(in) register by the hardware, and status(in) set to 1; the status flag is then set to 0 by software. To send a byte to the terminal, it is written to the data(out) register, and the cmd/status(out) register is set to 1; after the data has been transmitted, the hardware will set the cmd/status(out) register to 0. Note that there are 4 sets of terminal control registers, one for each external terminal.

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