Xilinx Corporate Overview

Transcription

1 Xilinx Corporate Overview

2 Safe Harbor Disclaimer During the course of this presentation, we may provide projections or other forward-looking statements regarding future events and/or future financial performance. We wish to caution you that such statements are just predictions and that actual events or results may differ materially. We undertake no obligation to update such projections and forward-looking statements. We refer you to the documents the Company files from time to time with the Securities and Exchange Commission. Specifically, the Company s last filed Forms 10-K and 10-Q. These documents contain and identify important risk factors that could cause the actual results to differ materially from those contained in our projections and other forwardlooking statements. Page 2

3 Xilinx At-A-Glance Inventor of the FPGA (Field Programmable Gate Array) Pioneer of the Fabless Semiconductor Model Founded: 1984 Public: 1990 NASDAQ: XLNX Corporate Headquarters in San Jose, CA Approximately 3,000 Employees Worldwide More than 20,000 Customers Worldwide Page 3

4 What is a PLD? A Programmable Logic Device (PLD) is a circuit which can be configured by the user to perform a logic function Xilinx designs, develops and markets two main types of programmable logic devices: Field Programmable Gate Arrays (FPGAs) Complex Programmable Logic Devices (CPLDs) Page 4

5 Where Xilinx Fits Key components of an electronics system Processor Memory Logic µp Logic PLD or Memory ASIC Xilinx is the Leading Supplier of Programmable Logic Devices Page 5

6 Why Programmable Logic? Xilinx provides standard parts Faster time to market and volume production Modifications made quickly through Xilinx software Low inventory risk for customers Field Programmability No up front NRE (Non Recurring Engineering) Page 6

7 Worldwide Semiconductor Market Total Semiconductors $198.9B Integrated Circuits $166.1B Discrete, Sensors & Optoelectronic $32.8B Memory $35.3B Micro $43.1B Logic $56.8B Analog $30.9B Standard Logic & Display Drivers $7.0B PLD $3.1B ASIC $10.3B ASSP $36.4B Page 7 Source: isuppli, June 2009

8 PLD Market Segment Share 29% 25% 22% 20% 18% 17% 15% 15% 14% Market Share (%) 34% 38% 32% 44% 30% 31% 32% 33% 34% 34% 51% 51% 50% 50% 48% 49% 35% 51% 0 CY00 CY01 CY02 CY03 CY04 CY05 CY06 CY07 CY08 Xilinx Altera Others Page 8 Source: isuppli

9 End Market Applications Communications Routers Switches Wireless Base Stations Industrial & Other Factory Automation Medical Imaging Test & Measurement Aerospace & Defense Consumer & Auto Plasma Displays Set Top Boxes GPS Navigation Systems Studio Broadcast (AVB) Data Processing Servers Computer Peripherals Storage Area Networks Page 9

10 Broad Customer Base Motorola Page 10

11 The Growing ASIC/ASSP Application Gap Market Size ASIC / ASSP Class Applications Underserved Applications Traditional FPGA Class Applications Application Market Segments + 100s More Page 11

12 Case Study: Automotive Infotainment Customer Needs Deploy scalable solution that supports multiple models Provide high level connectivity and entertainment in the automobile Meet challenging low power requirements Xilinx Value Proposition Use single FPGA platform to replace multiple similar function ASSPs Provide low power, scalable programmable environment Flexibility to address changing standards and requirements without redesign FPGAs Provide Customizable Standard Product To Replace Multiple Similar Function ASSPs Source: Xilinx Page 12

13 Case Study: CT Scan Customer Needs Ability to differentiate = Market Leadership Platform based approach Low to High-end NRE costs and TTM needs preclude ASICs Xilinx Value Proposition Field Upgradeability and remote bug fixes Modular Design: 1 Design = Multiple Platforms FPGAs Provide Flexible, High Performance DSP and Connectivity on the Same Platform Source: Xilinx Page 13

14 Xilinx Supply Chain UMC Distribution Samsung End End Markets Toshiba Direct Page 14

15 Xilinx Historical Revenue $2,000 $1,843 $1,841 $1,825 $1,750 $1,659 $1,573 $1,726 $1,500 $1,398 $ Millions $1,250 $1,000 $1,021 $1,016 $1,156 $ $500 $250 $ Fiscal year ended March 31

16 Historical Gross Margin & Free Cash Flow Xilinx Has a Strong and Stable Business Model High Gross Margins (typically ~60%) and Strong Free Cash Flow 70% 60% % of Total Revenue 50% 40% 30% 20% 10% 0% FY97 FY98 FY99 FY00 FY01 FY02 FY03 FY04 FY05 FY06 FY07 FY08 FY09 Page 16 Gross Margin Free Cash Flow

17 Xilinx Corporate Model Corporate Target Gross Margin 63% - 65% R&D 17% SG&A 17% Operating Margin 30% ROE >30% Page 17

18 Thank you