Alex Wong. Product Marketing Manager, Asia Pacific Multimedia Application Division
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1 Alex Wong Product Marketing Manager, Asia Pacific Multimedia Application Division Updated Aug 2012 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, ColdFire+, C-Ware, the Energy Efficient Solutions logo, Kinetis, mobilegt, PowerQUICC, Processor Expert, QorIQ, Qorivva, StarCore, Symphony and VortiQa are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, BeeStack, CoreNet, Flexis, MagniV, MXC, Platform in a Package, QorIQ Qonverge, QUICC Engine, Ready Play, SafeAssure, the SafeAssure logo, SMAROS, TurboLink, Vybrid and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners Freescale Semiconductor, Inc..
2 Learn about EPD system solutions for ereader and Smart Devices based on i.mx 6 platforms Understand the basics of EPD Technology 2
3 i.mx6 Overview i.mx6 ereader System Solutions EPD Technology Overview EPD Software Components in Android and Linux BSP 3
4 Two Core Product Groups Automotive, Industrial & Multi-Market Solutions Microcontrollers Sensors Analog Four Primary Markets Automotive Industrial Networking Consumer Networking and Multimedia Solutions Communications Processors Applications Processors RF Power >50 Year Legacy >5,500 Engineers >6,000 Patent Families >18,000 Customers 4
5 Saves development costs and improves time to market. Scalability with multiple cores is key to implement this strategy. Quad Core High-End (6Quad) IPTV High Performance Tablet Auto Infotainment Smart Device Design Dual Core High-End (6Dual) Low-End (6DualLite) Smart Monitor Business Tablet Media Tablet IP Phone Tablets for Kids Mainstream Infotainment Color ereaders Single Core High-End (6Solo) Low-End (6SoloLite) Smart Energy ereaders Entry Auto Infotainment 5
6 Dragonball 1 st FSL Apps Processor i.mx1 1st FSL ARM9 Apps Processor i.mx2 Series 90nm LP HW Video Accel Analog Integration i.mx3 Series ARM11 GPU Integration i.mx5 Series 65nm LP/GP ARM Cortex-A8 >1GHz i.mx 6 Series 40nm LP ARM Cortex-A9 Multi-core family 50+ Products >150M Units Clear market leader for ereader apps processors (IDC) No. 1 in Apps Processors (IDC 12/2011) No. 2 in Auto Infotainment (Strategy Analytics) 6
7 Display centric devices are the fastest growing segment of the market Freescale Target Markets Industrial Medical Smartphones, Smartbooks & Tablets ereaders Power & Performance Leadership 1 st Quad A9 + 64b memory, 1 st Cortex CPU + integrated EPD Multi-core CPU, multi-core graphics, multi-stream video, console class 3D, rich interfaces i.mx 6Quad: <400mW SOC for 1080p, H.264 HP, XGA screen Smooth Scalability Quad, Dual and Single core CPU offerings Best in class flexibility/integration: Consumer, Auto, Industrial IO s + qualifications + BGA/POP offerings GbE, PCIe, SATA, MIPI, USB, HDMI, LVDS, EPD, etc Full PMIC integration (lower complexity & BOM) LP-DDR2 / DDR3 (cost versus power options) Automotive Connected Displays Over 150 million processors shipped Top 3 AP silicon vendor Single SW investment, multiple devices in market Pin compatibility Trusted Technology Up to 15 year life cycle support Auto & Industrial grade quality design practices Fully featured, market targeted reference designs Android, Microsoft, QNX, Linux, Ubuntu optimizations 7
8 Automotive ereaders Infotainment Telematics Instrument Clusters Vision/Camera Systems Monochrome ereader Color ereaders Smart Devices Media Tablets IPTV/Streaming Media Smart Monitors Media Phones Printers Appliances Scanners 8 Medical Patient Monitoring Medical tablets Industrial tablets Smart Energy Factory Automation HMI Aerospace & Defense Digital Signage
9 4x CPU; 6x GPU performance gains 2x CPU; 3x GPU performance gains Good, Better, Best Differentiation Premium i.mx i.mx i.mx 6Quad Content Creation, Technology Driver Balanced i.mx 6Dual i.mx i.mx Performance/ Multimedia Capability i.mx51 Entry i.mx53 i.mx50 i.mx 6DL i.mx35 i.mx31 i.mx28 i.mx25 i.mx nm i.mx 6Solo i.mx 6SL 28nm i.mx i.mx Product Qual Proposal Planning Execution Samples Production Production ARM9 ARM11 9 Cortex-A8 Cortex-A9 Next Gen
10 Scalable series of five ARM Cortex A9-based SoC families i.mx 6 i.mx 6 i.mx 6 i.mx 6 i.mx 6 i.mx 6SoloLite 1x 1GHz x32 400MHz DDR3 No HW video accel. 2D graphics (2 GPUs) LCD, EPD i.mx 6Solo 1x 1GHz x32 400MHz DDR3 Other: same as 6DualLite i.mx 6DualLite 2x 1GHz x64 400MHz DDR3 HD1080p video 2D+3D (2 GPUs), 35Mtri/s LCD, EPD i.mx 6Dual 2x 1/1.2GHz Other: same as 6Quad i.mx 6Quad 4x 1/1.2GHz x64 533MHz DDR3 Dual HD1080p video 2D+3D (3 GPUs), 200 Mtri/s LCD Pin-to-pin Compatible Software Compatible 10
11 Red indicates change from column to the left i.mx 6SoloLite Single ARM Cortex - A9 at 1.0GHz 256KB L2 cache, Neon, VFPvd16, Trustzone 2D graphics 32-bit DDR3 and LPDDR2 at 400MHz Integrated EPD controller i.mx 6Solo Single ARM Cortex-A9 at 1.0GHz 512KB L2 cache, Neon, VFPvd16, Trustzone 3D graphics with 1 shader 2D graphics 32-bit DDR3 and LPDDR2 at 400MHz Integrated EPD controller i.mx 6DualLite Dual ARM Cortex-A9 at 1.0GHz 512KB L2 cache, Neon, VFPvd16, Trustzone 3D graphics with 1 shader 2D graphics 64-bit DDR3 and 2- channel 32-bit LPDDR2 at 400MHz Integrated EPD controller i.mx 6Dual Dual ARM Cortex-A9 at 1/1.2GHz 1 MB L2 cache, Neon, VFPvd16, Trustzone 3D graphics with 4 shaders Two 2D graphics engines 64-bit DDR3 and 2- channel 32-bit LPDDR2 at 533MHz Integrated SATA-II i.mx 6Quad Quad ARM Cortex-A9 at 1.2GHz 1 MB L2 cache, Neon, VFPvd16, Trustzone 3D graphics with 4 shaders Two 2D graphics engines 64-bit DDR3 and 2- channel 32-bit LPDDR2 at 533MHz Integrated SATA-II i.mx 6 Series Highlights ARM Cortex-A9 based solutions ranging up to 1.2GHz HD 1080p encode and decode (except 6SL) 3D video playback in High definition (except 6SL) Low power 1080p playback at 350mW Integrated IO s that include HDMI v1.4, MIPI and LVDS display ports, MIPI camera, Gigabit Ethernet, multiple USB 2.0 and PCI-Express SW support: Google Android, Windows Embedded CE, Ubuntu, Linux, Skype Features vary by product family 11
12 Core i.mx 6SoloLite i.mx 6Solo i.mx 6DualLite i.mx 6Dual i.mx 6Quad 1x (1 GHz Cortex-A9) 256KB L2, 32K+32K I/D L1 cache 1x (1GHz Cortex-A9) 512KB L2, 32K+32K I/D L1 cache 2x (1GHz Cortex-A9) 512KB L2, 32K+32K I/D L1 cache Red indicates change from column to the left 2x (1/1.2 GHz Cortex-A9) 1MB L2, 32K+32K I/D L1 cache 4x (1/1.2 GHz Cortex-A9) 1MB L2, 32K+32K I/D L1 cache DMIPS 2500 DMIPS 2500 DMIPS 5000 DMIPS 5000 DMIPS DMIPS Process Tech 40nm, LP 40nm, LP 40nm, LP 40nm, LP 40nm, LP DDR Memory x32 LP-DDR2, DDR3, LV-DDR3, Page interleaving x32 LP-DDR2, DDR3, LV-DDR3, Page interleaving 2ch x32 / 1ch x64, LP-DDR2, DDR3, LV-DDR3, Page and channel interleaving 2ch x32 / 1ch x64, LP-DDR2, DDR3, LV-DDR3, Page and channel interleaving 2ch x32 / 1ch x64, LP-DDR2, DDR3, LV- DDR3, Page and channel interleaving Max DDR Speed 400MHz (800MT/s) 400MHz (800MT/s) 400MHz (800MT/s) 533MHz, (1066MT/s) 533MHz, (1066MT/s) NAND - Video Codecs Video Decode Video Encode SW Only SLC/MLC, 40-bit ECC, ONFI2.2, DDR i.mx53 + VP6 / WebM VP8, H.264 MVC SLC/MLC, 40-bit ECC, ONFI2.2, DDR i.mx53 + VP6 / WebM VP8, H.264 MVC SW Only 1080p30 + D1 1080p30 + D1 SW Only 1080p30 H.264 BP Dual 720p encode 1080p30 H.264 BP Dual 720p encode SLC/MLC, 40-bit ECC, ONFI2.2, DDR i.mx53 + VP6 / WebM VP8, H.264 MVC 1080p60 or 1080p30 + D1 Dual 1080p decode 1080p30 H.264 BP Dual 720p encode SLC/MLC, 40-bit ECC, ONFI2.2, DDR i.mx53 + VP6 / WebM VP8, H.264 MVC 1080p60 or 1080p30 + D1 Dual 1080p decode 1080p30 H.264 BP Dual 720p encode 12
13 Display Display Interfaces Camera Interface GPU 3D GPU 2D (OpenVG 1.1) i.mx 6SoloLite i.mx 6Solo i.mx 6DualLite i.mx 6Dual i.mx 6Quad WXGA (1366 x 768) Types: EPDC, Parallel, Two simultaneous outputs 16-bit parallel n/a 300Mpxl/s, OpenVG Mpxl/s, BLIT Dual WXGA (1366 x 768) Types: 2x Parallel, LVDS, MIPI-DSI, HDMI, EPDC Two simultaneous outputs Types: 2x20-bit parallel, MIPI-CSI2 (2 lanes) Two input 266Mpxl/s OpenGL/ES 2.0 Emulated on GPU 3D 600Mpxl/s, BLIT Dual WXGA (1366 x 768) Types: 2x Parallel, LVDS, MIPI-DSI, HDMI, EPDC Two simultaneous outputs Types: 2x20-bit parallel, MIPI-CSI2 (2 lanes) Two input 266Mpxl/s OpenGL/ES 2.0 Emulated on GPU 3D 600Mpxl/s, BLIT WUXGA (1920x1200) + HD1080 Types: 2x parallel, 2x LVDS, MIPI-DSI, HDMI Four simultaneous outputs Types: 2x 20-bit parallel, MIPI-CSI2 (4 lanes) Three simultaneous inputs 1000 Mpxl/s OpenGL/ES 2.0 OpenCL/EP 300Mpxl/s, OpenVG Mpxl/s, BLIT WUXGA (1920x1200) + HD1080 Types: 2x parallel, 2x LVDS, MIPI-DSI, HDMI Four simultaneous outputs Types: 2x 20-bit parallel, MIPI-CSI2 (4 lanes) Three simultaneous inputs 1000 Mpxl/s OpenGL/ES 2.0 OpenCL/EP 300Mpxl/s, OpenVG Mpxl/s, BLIT Hard Drive I/F n/a n/a n/a S-ATA II 3Gbps S-ATA II 3Gbps Audio Acceleration Audio Interfaces n/a ASRC ASRC ASRC ASRC 3x I2S, SPDIF Tx/Rx 3x I2S, SPDIF Tx/Rx, ESAI 3x I2S, SPDIF Tx/Rx, ESAI Red indicates change from column to the left 3x I2S, SPDIF Tx/Rx, ESAI 3x I2S, SPDIF Tx/Rx, ESAI 13
14 Expansion Ports i.mx 6SoloLite i.mx 6Solo i.mx 6DualLite i.mx 6Dual i.mx 6Quad 3x SD/MMC 4.4, 1x SDXC 4x SPI, 5x UART, 3x I2C 3x SD/MMC 4.4, 1x SDXC 4x SPI, 5x UART, 4x I2C MIPI-HSI PCIe 2.0 (1 lane) 3x SD/MMC 4.4, 1x SDXC 4x SPI, 5x UART, 4x I2C MIPI-HSI PCIe 2.0 (1 lane) Red indicates change from column to the left 3x SD/MMC 4.4, 1x SDXC 5x SPI, 5x UART, 3x I2C MIPI-HSI PCIe 2.0 (1 lane) 3x SD/MMC 4.4, 1x SDXC 5x SPI, 5x UART, 3x I2C MIPI-HSI PCIe 2.0 (1 lane) USB I/F Three USB2.0: 1xHS OTG + PHY, 1xHost + PHY 1xHost USB HSIC Four USB2.0: 1xHS OTG + PHY, 1xHost + PHY 2xHost USB HSIC Four USB2.0: 1xHS OTG + PHY, 1xHost + PHY 2xHost USB HSIC Four USB2.0: 1xHS OTG + PHY, 1xHost + PHY 2xHost USB HSIC Four USB2.0: 1xHS OTG + PHY, 1xHost + PHY 2xHost USB HSIC Ethernet 10/100 Mbps 1 Gbps + IEEE Gbps + IEEE Gbps + IEEE Gbps + IEEE1588 Boot Temperat. Monitor PMU Security Updated boot sources Updated boot sources Boot from encrypted image Updated boot sources Boot from encrypted image Updated boot sources Boot from encrypted image Updated boot sources Boot from encrypted image Yes Yes Yes Yes Yes Partial PMU integration MX5x Baseline + RNG Partial PMU integration MX5x Baseline + NIST-approved RNG Partial PMU integration MX5x Baseline + NIST-approved RNG Partial PMU integration MX5x Baseline + NIST-approved RNG Partial PMU integration MX5x Baseline + NIST-approved RNG Package 13x13 0.5m BGA 13x13 0.5m PoP 21x21 0.8P BGA pin-compatible 12x12 0.4mm POP pin-compatible 14
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16 Amazon Sony Kindle DX & Kindle 2 i.mx31 Kindle 3 i.mx35 Kindle, Kindle Touch i.mx50 i.mxl Ectaco i.mx31 Hanvon i.mx50 Kobo (Fnac/WHSmith) Google / iriver i.mx35 i.mx50 i.mx50 i.mx50 i.mx51 i.mx50 Pocketbook i.mx35 i.mx50 Bebook Booq i.mx31 Acer Medion i.mx35 16 Onyx Greenbook Jinke i.mx50
17 Specifications i.mx 6SoloLite CPU: 1x 1GHz System Control CPU Platform Connectivity Process: 40nm Secure JTAG 1x Cortex-A9 MMC 4.4 / SD 3.0 x3 Core Voltage: 1.3V Package: 0.5mm 13x13 MAPBGA 0.5mm 13x13 PoP Key Features and Advantages High-performance Cortex-A9 up to 1GHz with 256KB L2 cache x32 LP-DDR2, DDR3/LV-DDR3 and managed NAND support Flexible display options for next gen solutions Integrated EPD controller LCD Display up to WXGA (1366x768) with Parallel 3 USB 2.0 support with 2 integrated PHY, x1 HSIC Audio Interfaces include I 2 S/SSI, S/PDIF Tx/Rx 10/100 Ethernet PLL, Osc Clock & Reset Smart DMA IOMUX Timer x3 PWM x4 Watch Dog x2 Power Mgmt LDO Temp Monitor Internal Memory ROM RAM Security HAB Secure RTC 32KB I-cache NEON 256KB L2-cache Graphics epxp 32KB D-cache GPU2D: OpenVG1.1 CSC,Combine, Rotate, Gamma Mapping P LCD & Camera Interfaces 24-bit RGB 16-bit Parallel CSI EPDC E-INK Panels w/if SiPix Controller SiPix Panels w/if MMC 4.4 / SDXC UART x5 I 2 C x3, SPI x4 USB2 OTG & PHY USB2 Host & PHY USB2 HSIC Host 10/100 Ethernet SMBus, GPIO, Keypad I 2 S/SSI x3 S/PDIF Tx/Rx External Memory X32 LP-DDR2, DDR3 / LV-DDR3 Market Launch October
18 Specifications CPU: 1x 1GHz Process: 40nm Core Voltage: 1.1V Package: 0.8mm 21x21 BGA (pin compatible to i.mx 6DualLite/Dual/Quad Key Features and Advantages High-performance Cortex-A9 up to 1GHz with 512KB L2 cache x32 LP-DDR2, DDR3/LV-DDR3 at 400MHz, raw / managed NAND support, and 8/16/32-bit parallel NOR EPD controller for next gen display support Delivers rich graphics and UI in HW OpenGL/ES 2.x 3D accelerator and OpenVG 1.1 acceleration Drives high resolution video in HW Multi-format HD1080 video decode and encode High quality video processing (resizing, deinterlacing, etc.) Flexible display & camera support Dual display up to WXGA (1366x768) and support for HD1080 2x Parallel, LVDS, MIPI-DSI or HDMI MIPI CSI2 (2 lanes) and 2x CSI for camera Expansion port support via PCIe 2.0 Car network: 2xCAN, MLB 6-wire, 1Gb Ethernet with IEEE1588 System Control Secure JTAG PLL, Osc Clock & Reset Smart DMA IOMUX Timer x3 PWM x4 Watch Dog x2 Power Mgmt DCDC, LDO Temp Monitor Internal Memory ROM RAM Security RNG TrustZone Ciphers Security Ctrl Secure RTC efuses i.mx 6Solo 32KB I-cache CPU Platform NEON 1x Cortex-A9 512KB L2-cache Graphics 32KB D-cache Graphics: OpenGL/ES 2.x, OpenVG 1.x Video Video Codecs: 1080p Imaging Processing Unit Resizing, Blending Inversion / Rotation Image Enhancement P LCD & Camera Interfaces HDMI & PHY MIPI DSI MIPI CSI2, 20-bit CSI 24-bit RGB, LVDS EPDC E-INK Panels w/if Connectivity MMC 4.4 / SD 3.0 x3 MMC 4.4 / SDXC NAND Cntrl (BCH40) UART x5 I 2 C x3, SPI x4 USB2 OTG & PHY USB2 Host & PHY USB2 HSIC Hostx2 1Gb Eth MIPI HSI SMBus, GPIO, Keypad ESAI, I 2 S/SSI x3 S/PDIF Tx/Rx Audio: ASRC PCIe 2.0 FlexCAN x2, MLB150 External Memory X32 LP-DDR2 / DDR3 / LV-DDR3 18
19 i.mx 6SoloLite i.mx 6Solo/DualLite GC355 Vector Graphics 500MHz 350M pixels / sec raw performance Native OpenVG 1.1 Khronos conformance with hardware tessellation GC320 Composition Up to 1G pixels / sec raw performance GC880 3D + GPGPU 266MHz core / 533MHz shader 266M pixels / sec Shader Core@533MHz 4.8 GFLOPS OpenGLES 2.0/1.1, OpenVG
20 i.mx 6 Low Power Features Support for low power DRAM technology (mddr and LPDDR2) Support for ARM core SRPG (State Retention Power Gating) mode - no core power consumed if CPU is not active. Dynamic clock gating of SOC peripherals Dynamic voltage and frequency scaling supported to reduce power during lower MIPS intensive activities PXP (Pixel Pipeline) HW assist for RGB to Grayscale color space conversion, rotation, scaling and blending EPDC Controller Grayscale histogram to support auto-waveform mode detection Supporting direct-drive TFT backplanes beyond at 106 Hz Up to 64 concurrent update regions HW support for Full and Partial update modes HW collision detection 20
21 What is an ereader? EINK Challenges to Application Development Easy programming with the i.mx6 Linux BSP and Android Reference Design 21
22 Speaker Headphones Microphone EPD + LCD ereader Wi-Fi WLAN Module 3G Module Computer Bluetooth Audio Codec SDIO I2C I2S USB HS w/phy USB HS w/phy i.mx 6Solo UART EPD UART Controllers EINK Panel DDR Memory Managed NAND NOR SPI Video Processing OpenGL/ES 2.x OpenVG 1.1 I2C SPI Image Processing/ LCD Controller Display PMIC Expansion Slot SD/MMC I2C Touch Screen 3-axis accel PWR Mgmt Color LCD Panel Keyboard 22
23 A Microencapsulated Electrophoretic Display (EPD) Also known as Electronic Paper Display or bubbles E Ink Pearl is the leading panel solution Low Power Battery Life: Months v. hours Sunlight Readable Reflective v. backlight Thin and light Hold it in one hand Simple to use Some 3G enabled No monthly fee Easy to download new books Stores thousands of books 23
24 Freescale was the first company to integrate an EPD controller with an ARM Cortex-A8 core (i.mx508), removing the cost of the external hardware controller and its associated memory EPD Advantages: High resolution from any angle Sunlight readability Mimics appearance of ink on paper Flexible Light weight Durable Extremely low power Reduces paper in many applications Target Markets: ereaders Home and office automation Outdoor and digital signage Portable navigation devices Patient/client monitoring DECT phones Kiosks 24
25 Panel PMIC: Must support bi-polar high voltage to move charged particles. Temp Sensor: Movement of particles are temperature-dependent, so a temp sensor is required. EPDC controller: Manipulating display requires special controller. 25
26 EINK has significantly different characteristics than an LCD which requires modifications to how the User Interface is designed. EINK Challenge #1 Slow Refresh Rate The effective display refresh rate varies with waveform selection. EINK Challenge #2 Ghosting and Flashing Effect Depending on the update mode, a ghosting image of the previous image may remain or a flashing effect may occur during the update process. EINK Challenge #3 Collision Events Collision occurs when attempting to change pixels that are already being updated. Application Developers must consider HOW to draw. 26
27 Waveform Selection EINK has several waveform modes which are used for different grayscale depth and different update times. Higher fidelity waveforms will produce better grayscale accuracy, but take longer to complete. Application development has a trade-off between update speed and grayscale accuracy. Black - All pixels are black or white in update Region - B/W waveform should be selected (300-ms) - Maximum pixel depth required with all 16-levels of greyscale - 16-level greyscale waveform should be selected (600-ms) 27
28 Concurrent Screen Update Action to update multiple screen regions with different update mode, dimension and starting time while no geographical overlapping among all regions. 0,0 600,0 t 1 t 3 t 2 t 4 0, ,800 t 1 t 2 t 3 t 4 time 28
29 Small regional updates can be sent to the screen at the panel refresh providing user an LCD-like experience. - B/W waveform mode used for maximum throughput. - Regional updates broken into small areas updates per second 29
30 Update Mode Selection Full vs Partial Partial Update mode will only update pixels that change for the update region. Full will apply a waveform to all the pixels for a global or regional update. Ghosting may occur when using Partial updates. Shorter waveforms will produce more ghosting than longer waveforms. Full updates are used to remove any ghosting by driving the pixels to a known state (such as black) before the final state. (Think Etch-A-Sketch!!). Application will need to decide the usage of Full or Partial based on the user experience expectations. E ED Ghosting Partial Update E D Flashing Full Update 30
31 Collision Handling A pixel must complete its transition before starting a new update. A collision will occur when attempting to change a pixel that is already in flight. Application will experience a longer delay to the final image if collision occurs. Application should be designed to limit overlapping regions on a screen. E Collision! Update E Update Erase t=0 t=100ms t=300ms E Waveform Update #1 Waveform Update #2 31
32 Part Numbers: MCIMX6DL-SDB ($399) i.mx 6DualLite 1Ghz Cortex-A9 Processor Can be configured as i.mx 6Dual Display (9.7 ): MCIMX-LVDS1 ($499) Freescale MMPF0100 PMIC Display (4.3 ): MCIMX28LCD ($199) 1 GB DDR3 memory (non terminated) 3 x 7 8-layer PCB Display connectors 2x LVDS connectors Connector for 24 bit x480 WVGA with 4-wire touch screen HDMI Connector Audio Wolfson Audio Codec Microphone and headphone jacks Expansion Connector Camera CSI port signals I2C, SSI, SPI signals Connectivity Full-size SD/MMC card slot 7-pin SATA data connector 10/100/1000 Ethernet port 1x high-speed USB host port PCI-e connector Debug JTAG connector Serial to USB connector Additional Features 3-axis Freescale accel Power supply- USB plug No battery charger OS Support Linux and Android IceCream Sandwich from Freescale; Others: support by 3 rd parties Tools Support Lauterbach, ARM (DS-5), Macraigor debug/ide tool chain 32
33 33
34 34
35 TFT resolutions up to 4096 x 4096 pixels with 20 Hz refresh TFT resolutions up to 2048 x 1536 pixels at 106 Hz refresh Up to 10-bit waveform index format (5-bit pixel representation) for up to 32 pixel levels Automatic collision handling when used in conjunction with the i.mx driver Dual-scan TFT drive mode to support ultra-high resolution/refresh-rate displays Flexible direct-drive TFT interface supporting next generation source-drive, gatedriver, and panel architectures, including LVDS, DDR and multi-level source drivers. Unified generic configurable timing mode (Pigeon Mode) available on 17 panel timing control signals Ability to process multiple updates asynchronously to refresh/update operations with ability to intercept each frame scan will multiple update requests Performance tuning capabilities (FIFO control) which can interface with SoC level memory arbitration mechanisms further guaranteeing frame refresh operation Full and partial update mode support Support for up to 256 waveform modes, also supports optimal waveform autoselection based on grey level of the updated pixels Low-power mode operation via architectural clock gating Update buffer analysis function to get information like collision rectangle, grey level 35
36 Histogram analysis added to EPDC Determination of waveform based only on pixels that are transitioning 64 concurrent updates in 4-bit mode (up from 16 on i.mx508) PxP alignment restrictions have been removed Saves one buffer copy during update EPDC now returns minimum collision bounds within an update Dry-run collision detection supported 36
37 37
38 i.mx6 Reference Manual PXP chapter is very detailed and descriptive. A Good Read!! Key Features: Perform color space conversion (CSC) and scaling of YUV frames Perform color key and alpha blending of graphic or video buffers with other graphics data Rotate image for portrait or landscape support Applications: Use to overlay menu or icon over video or graphic Use to letterbox a video 38
39 Internal work flow within the PXP. All actions are achieved in 1 memory pass which reduces memory bandwidth requirements. 39
40 Android Linux 40
41 41
42 User Input E W Collisions! Update E Update Erase Update W Snapshot E W Queue and Merge Update E E Update W W Queue and Merge completes 300-ms faster, but drops the erase update. t=0 100ms 200ms 300ms 600ms 900ms 42
43 43
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