CO-DEVELOPMENT MANUFACTURING INNOVATION & SUPPORT High-Level and Model-Based Design Targeting FPGAs and SoCs Sander Ter Burg, FPGA System Engineer
3T B.V. What we do: Electronic and Embedded Systems Co-Development and Re-design Manufacturing (together with production partners) Consulting & Support Where we are: Enschede + Eindhoven More info: www.3t.nl info@3t.nl 2
Summary High-Level Design and Synthesis Model-Based Design Model-Based Design Examples SCARA Robot Braking Controller Radar Tracking Module 3
Traditional HDL Design example FPGA Design HDL HDL All code written in HDL No CPUs on-board HDL to Low Level Logic HDL HDL HDL = Hardware Description Language 4
High(er)-Level Design example PSoC Logic (FPGA) HDL High-Level Model Higher Level Design Blocks High-Level Model to HDL C/C++ code running on a CPU µc (Arm) C/C++ HDL HLS examples C/C++ to HDL + synthesis MATLAB to HDL + synthesis to HDL + synthesis 5
High Level Design Tools For FPGA devices: Vivado HLS (Xilinx) HLS Compiler (Intel) HDL Coder (MathWorks) and more For SoC devices: SDSoC (Xilinx) SDK for OpenCL (Intel) Embedded Coder (MathWorks) and more 6
High Level Design Pros Well suited for complex mathematical problems Fast Functional Iterations Freedom of implementation (CPU and/or Logic) Simulation time reduction (in software) Early resource estimation HDL Co-Simulation in software environment Software Engineers can now write Hardware 7
High Level Design Cons Hardware mind-set still needed Code restructuring needed Generated HDL is not very readable Less suitable for (peripheral) interface controllers But tools keep getting better 8
Model-Based Design A form of High-Level Designing Mathematical and visual design method To design: Complex controllers Signal processing Communication systems Applications fields examples: Industrial Aerospace Automotive 9
Real vs. Virtual World Virtual World Controller Model Plant Model Application Model Real World Controller Plant Application 10
Model-Based Design Multidisciplinary Design Approach Design with Virtual Models (without hardware) Simulation in the Virtual environment Models are always a complexity / effort trade-off Controller Model as good as your Plant/Appl. Model 11
Model-Based Design Examples SCARA Robot Braking Controller Radar Tracking Module 12
SCARA Robot Braking Application Move intermediate semiconductor products Controlled emergency braking Braking Requirements: Follow robot trajectory while braking Deviation from trajectory < 1mm Rest is under NDA Customer provided Mechanical Models (in MATLAB Simulink) SCARA Motor Model Controller Model 13
Simulink Model of Plant and Controller Angular Velocity Angle Braking Controller (Simulink) Torque SCARA Motor Model (Simulink) 14
Simulink Braking Controller Model Braking Controller Model Angular Velocity Angle Hardware Model M2E ADC FPGA Model DAC E2M Torque 15
Simulink FPGA Model FPGA Model Comm. Control / Status / Communication Logic Motor Feedback ADC Control Calculate Angle + Direction Regulator Model Braking Controller DAC Control Motor Controller 16
Simulink Braking Regulator (Model to HDL) Variable Time Step Floating Point Model Fixed Time Step Floating Point Model Fixed Time Step Fixed Point Model Fixed Time Step Fixed Point HDL Code 17
Braking Regulator HDL Co-Simulation Angular Velocity Braking Controller (Simulink) Angle Regulator Model HDL Simulation (ModelSim) Torque SCARA Motor Model (Simulink) 18
Design and Verification Summary From High Level Model to Generated HDL Various Model Translations Generated HDL for Regulator Model (HDL Coder) Angle/Direction Calculation + Braking Controller Hardcoded Design Blocks (non HDL Coder) ADC / DAC Control + Control / Status / Communication Blocks Design Verification: Co-Simulation + Hardware-in-the-Loop Design Fine-tuning: Timing Closure, Resource Sharing, Xilinx IP Instantiation for FFT 19
Radar Tracking Module example For Traffic Data processing Customer provided a High-Level Model (MATLAB) including: Radar Module Signal Processing Tracking Algorithm System-on-Module Hardware Target Enclustra Mars ZX3 20
SoC implementation setup Dual ARM Core CPU 1 CPU 2 Control Tracking Ext. Buffers ecos RTOS on CPU1 For real-time Control and Communication Only available RTOS for this SoM Tracking Algorithms on CPU2 Generated C/C++ from Matlab Model Running bare-metal on CPU2 Ethernet Data Acquisition Image Processing Image Processing in FPGA LOGIC 2D Traffic Data Matrices Operations FPGA LOGIC 21
Radar Tracking Model Radar Tracking Model (MATLAB) Radar Model 2D Traffic Data Image Processing Model Dec. FFT 1 FFT 2 Tracking Algoritme Intermediate Result Files 22
Image Processing Module Simulation File In HDL TestBench File Out Image Processing Block (Decimate / FFT1 / FFT2) Intermediate Model Results used in HDL TestBench HDL TestBench Results verified in the Model 23
Hardware-in-the-Loop Verification CPU 1 Control Dual ARM Core CPU 2 Tracking External Buffers Ethernet Data Acquisition Decimate FFT 1 FFT 2 FPGA LOGIC Data Control 24
Tooling Mathworks Tools: MATLAB: Complete Radar Tracking Model Embedded coder: Tracking Algorithms Implementation Instrument Control toolbox: Hardware-in-the-Loop Verification Signal processing toolbox: Digital Filter Design Xilinx Vivado: Xilinx IP: FFTs for Image Processing Xilinx IP: Gbit Ethernet for UDP communication Custom IP: Decimate for Image Processing Xilinx to MATLAB: Xilinx FFT C-model converted to MATLAB file 25
Summary and More Info: High-Level Design and Synthesis Model-Based Design SCARA Robot Braking Controller Radar Tracking Module Email : Web : Stand: Sander@3T.nl www.3t.nl 7A108 Next Up: Herman Kuster Topic Embedded Systems Hardware platform for industrial ultrasound steel plate Inspection 26
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