Optimization and Implementation of Embedded Signal Processing Algorithms Jonas Rutström Senior Application Engineer

Transcription

1 Optimization and Implementation of Embedded Signal Processing Algorithms Jonas Rutström Senior Application Engineer 2016 The MathWorks, 1 Inc.

2 Two important questions in embedded design What s your algorithm? 2

3 Two important questions in embedded design What s your target? 3

4 Targets are very different... 4

5 The embedded hardware might be very different... DSP MCU SoC/FPGA 5

6 Workflow Idea to implementation 6

7 Workflow Idea to implementation Prototyping 7

8 Workflow Idea to implementation Prototyping 8

9 Workflow Idea to implementation Prototyping Production 9

10 Workflow Idea to implementation Prototyping Production 10

11 Workflow Idea to implementation Optimization Prototyping Production 11

12 Let s take a step back... 12

13 What do we mean with optimization? 13

14 Speed Memory Readability Target 14

15 Speed Memory Readability Target 15

16 Optimization at different phases in the development... Prototyping C SoC/FPGA 16

17 Optimization at different phases in the development... Prototyping C SoC/FPGA 17

18 Optimization at different phases in the development... Prototyping C SoC/FPGA 18

19 Optimization at different phases in the development... Prototyping 19

20 Profiling! 20

21 Profiling in MATLAB How long did it take? tic/toc Where are the bottlenecks? profile % start timer tic % execute code out = myfunction(in); % turn on profiler profile on % execute code out = myfunction(in); % stop timer (and store % elapsed time) et = toc; % turn off profiler profile off % open html report profile report 21

22 Profiling in MATLAB 22

23 Profiling in Simulink 23

24 Example (Profiling when prototyping in MATLAB) 24

25 Optimization at different phases in the development... Prototyping C SoC/FPGA 25

26 Now, lets take a closer look of the workflow in embedded design! 26

27 Example: Workflow for embedded design Constrained Design Target Specific Design SoC/FPGA Reference Design Target Specific Design C 27

28 Example: Workflow for embedded design Constrained Design Target Specific Design SoC/FPGA Reference Design Target Specific Design C 28

29 Key Detection Algorithm 29

30 Component Integration System Object (Reference Design) System Design System Object RF ARM FPGA Optimize 30

31 Example: Workflow for embedded design Constrained Design Target Specific Design SoC/FPGA Reference Design Target Specific Design C 31

32 Example: Workflow for embedded design Constrained Design Target Specific Design SoC/FPGA Reference Design Target Specific Design C 32

33 Example: Workflow for embedded design Constrained Design Target Specific Design SoC/FPGA Reference Design Target Specific Design C 33

34 Example: Workflow for embedded design Constrained Design Target Specific Design SoC/FPGA Reference Design Target Specific Design C 34

35 Example: Workflow for embedded design Constrained Design Target Specific Design SoC/FPGA Reference Design Simulink Target Specific Design C 35

36 DEMO (System Integration and Generating Code for ARM Cortex A9 from Simulink) (Including verification with PIL) 36

37 Component Integration System Object (Reference Design) System Design System Object RF ARM FPGA Optimize 37

38 A few words about Embedded Coder... 38

39 Embedded Coder Quick Start 39

40 DEMO (Embedded Coder Quick Start) 40

41 Another use case... 41

42 Example: Workflow for embedded design Constrained Design Target Specific Design SoC/FPGA Reference Design MATLAB Target Specific Design C 42

43 Example (Generating Code ARM Cortex A9 from MATLAB) 43

44 Component Integration System Object (Reference Design) System Design System Object RF ARM FPGA Optimize 44

45 Example: Workflow for embedded design Constrained Design Target Specific Design SoC/FPGA Reference Design Target Specific Design C 45

46 Example: Workflow for embedded design Constrained Design Speed / Area Optimizations Target Specific Design SoC/FPGA Reference Design Target Specific Design C 46

47 Area Optimization for FPGA implementation ARM FPGA 47

48 Example (Area Optimization for FPGA Implementation) 48

49 Component Integration System Object (Reference Design) System Design System Object RF ARM FPGA Optimize 49

50 Summary Optimization and Implementation of Embedded Signal Processing Algorithms Constrained Design Target Specific Design SoC/FPGA Reference Design Target Specific Design C 50

51 Questions? 51