P-admissible Solution Space

Transcription

1 P-admissible Solution Spae P-admissible solution spae or Problem P: 1. the solution spae is inite, 2. every solution is easible, 3. evaluation or eah oniguration is possible in polynomial time and so is the implementation o the orresponding oniguration, and 4. the oniguration orresponding to the best evaluated solution in the spae oinides with an optimal solution o P. Sliing loorplan is not P-admissible. Why? A P-admissible loorplan representation: Sequene- Pair. 1

2 Sequene-Pair Based Floorplanning/Plaement Murata, Fujiyoshi, Nakatake and Kajitani, Retangle-paking-based module plaement, ICCAD 95. Represent a paking by a pair o module permutations alled sequene-pair (e.g., (abde, bade)). The set o all sequene-pairs is a P-admissible solution spae whose size is (n!) 2. Searh in the P-admissible solution spae by simulated annealing. Swap two modules in the irst sequene. Swap two modules in both sequenes. Rotate a module. 2

3 Relative Module Positions A loorplan is a partition o a hip into rooms, eah ontaining at most one module. Lous (right-up, let-down, up-let, down-right) 1. Take a non-empty room. 2. Start at the enter o the room, walk in two alternating diretions to hit the sides o rooms. 3. Continue until to reah a orner o the hip. Positive lous: Union o right-up lous and let-down lous. Negative lous: union o up-let lous and down-right lous. 3

4 Geometrial Inormation No pair o positive (negative) loi ross eah other, i.e., loi are linearly ordered. Sequene-Pair (Γ +, Γ - ): Γ + (Γ - ) is the module permutation representing the order o positive (negative) loi. E.g., (Γ +, Γ - ) = (abde, bade). x is ater (beore) x in both Γ + and Γ - x is right (let) to x. x is ater (beore) x in Γ + and beore (ater) x in Γ - x is below (above) x. 4

5 Optimal (Γ +, Γ + )-Paking For every sequene-pair (Γ +, Γ - ), there is an optimal (Γ +, Γ - )-paking. Horizontal onstraint graph G H (V, E) (similarly or G V (V, E) ): V: soure s, sink t, n verties or modules. E: (s, x) and (x, t) or eah module x, and (x, x ) i x must be let-to x. Vertex weight: 0 or s and t, width o module x or the other verties. 5

6 Optimal (Γ +, Γ - )-Paking (ont d) Optimal (Γ +, Γ - )-paking an be obtained in O(n 2 ) time by applying a longest path algorithm on a vertex-weighted direted ayli graph. - G H and G V are independent. - The x and y oordinates o eah module are determined by assigning the longest path length between s and the vertex o the module in G H and G V, respetively. More eiient algorithms or obtaining optimal (Γ +, Γ - )-paking: O(nlogn) by Takahashi, IEICE 96; O(nlogn) by Tang, Tian & Wong, DATE 00; O(nloglogn) by Tang & Wong, ASP-DAC 01. 6

7 BSG Based Floorplanning/Plaement Nakatake, Fujiyoshi, Murata, and Kajitani, Module plaement on bsgstruture and i layout appliations, ICCAD 96. A meta-grid, named the bounded-slieline grid (BSG), is a topology deined on a plane. U BSG ={V i,j i,j : integers, i+j : even} {H i,j i,j : integers, i+j : odd} where V i,j ={ (x,y) x = i, j-1 < y < j+1 } H i,j ={ (x,y) i-1 < x < i+1, y = j } BSG o dimension 3x3 7

8 )))) '''',,,, **** )))) %& %& $ $ $ $ "# "#!!!! 1) 1) 1) 1) &0 &0 &0 &0 //// (, (, (, (, %%%% () () () () = = = = KKKK ;B ;B ;B ;B HHHH ;;;; C GF CC GF GF GF C 4 C 44 CC 4 BBBB EEEE DDDD < < < < C? C? C? C? JJJJ IIII BBBB > > > >???? How to Find a Paking rom a BSG? '' ' ' (( ( ( CC @ AA A A = = = = > > > > :::: ;;;;

9 Theoretial Results For a BSG o dimension pxq to ontain a globally optimal paking or n modules, both p and q must be larger than or equal to n. I p or q is less than n, there exists an instane o n modules that does not have any room assignment to lead to a globally optimal paking. The given BSG is P-admissible i its dimension is nxn or larger. The size o the solution spae implied by a BSG o dimension nxn is C(n 2,n)x(n!). 9

10 Solution Perturbation Given n modules, use the BSG o dimension rxr, where rxr must be larger than n. (Problem: how to determine r? Experiments show that a airly good paking an be obtained unless r is lose to n 0.5.) Employ the simulated annealing tehnique. - Arbitrarily swap the ontents o two rooms. - Arbitrarily rotate a module. (Not mentioned in the paper.) 10

11 O-tree Based Floorplanning/Plaement Guo, Cheng, and Yoshimura, An o-tree representation o nonsliing loorplan and its appliations, DAC 99. Deinitions: - A plaement is L-ompat (B-ompat) i and only i no module an be moved let (down) rom its original position with other modules positions ixed. - A plaement is LB-ompat (or admissible) i and only i it is both L-ompat and B-ompat. Given any plaement P 1, a orresponding admissible plaement P 2 an be obtained by a sequene o x-diretion and y-diretion ompations. The overall area o P 2 is no larger than the overall area o P 1. 11

12 O-Tree Enoding ( ,adbeg) with Depth-First-Searh 12

13 O-Tree Enoding (ont d) Spae needed to store (T,π): Given a tree with n nodes in addition to its root, the label o eah node an be enoded into a [lg n] bit string, and hene n(2+[lg n]) bits are needed to store (T,π) where 2n bits or T, and n[lg n] bits or π. 2n Number o possible (T,π) s: O( n!2 / n ) 13

14 Horizontal O-Tree: O-Tree and Plaement - Suppose i is the parent o j, Ψ (i) is the set o bloks eah o whih appears beore i in π and overlaps with i in the x-oordinate projetions. ( ,adbeg) x = x + j i w i y j = 0 (max k ψ i ) yk + h ( k ) Vertial O-Tree: 14

15 O-Tree and Plaement (ont d) An O-tree is admissible i its orresponding plaement is admissible. 15

16 Admissible O-Tree Transormation (AOT) Given a horizontal O-tree T, we an irst get a vertial onstraint graph G y by applying OT2OCG to T in linear time, and then get a vertial O-tree T y by applying CG2OT to G y in linear time. Ater applying the same proedures OT2OCG and CG2OT again, we an get another horizontal O-tree. The OT2OCG and CG2OT are iterated until an admissible O-tree is ound. OT2OCG CG2OT OT2OCG CG2OT H-O-tree G v (B-ompat) V-O-tree G h (L-ompat) H-O-tree... All ompations are monotone beause modules are either moved down or let. Thereore, onvergene o the above iteration is assured and we an get an admissible O-tree. 16

17 Solution Perturbation a Selet a module B i in the O-tree (T,π). b Delete B i rom the O-tree (T,π). Insert B i in the position with the best ost value among all possible inserting positions in (T,π) as an external node. d Perorm a- on it orthogonal O-tree. Given any O-tree with n nodes, the number o possible inserting position as external nodes is 2n-1. 17

18 A Deterministi Plaement Algorithm Perturb O-trees in sequene. - Selet nodes in sequene and ind the best perturb position or eah o them. - A perturbed O-tree an be made admissible using AOT. Implementation is straightorward. 18

19 B*-Tree Based Floorplanning/Plaement Chang, Chang, Wu, and Wu, B*-tree: a new representation or nonsliing loorplans, DAC 00. Ideas: - From an admissible plaement to a B*-tree: Let hild: the lowest module on the right. Right hild: the module above, with the same let-side oordinate. - From a B*-tree to a plaement: 19

20 Pros and Cons Advantages - Binary tree based, eiient and easy. - Flexible to deal with retangular or retilinear modules. - Transormation between a tree and its plaement takes only linear time without onstruting any onstraint graph. - Can evaluate area ost inrementally. - Smaller solution spae: O(n!2 2n-2 /n 1.5 ) (same as O-tree). Disadvantages - Not a topologial representation. (Neither is O-tree!) 20

21 Coping with Pre-plaed Modules I b i annot be plaed at its ixed position (, ), exhange b i with the module that is most lose to (, ). x i y i Inremental area ost update is possible. - E.g., the positions o b 0, b 7, b 8, b 11, b 9, b 10, and b 1 (beore b 2 in the DFS order o T) remain unhanged ater the exhange sine they are in the ront o b 2 in the DFS order. x i y i 21

22 Coping with Retilinear Modules Partition a retilinear module into retangular sub-modules. Keep loation onstraints or the sub-modules. - E.g., keep the right sub-module as the let hild in the B*-tree. Align sub-modules, i neessary. Treat the sub-modules o a modules as a whole during perturbations. 22

23 Perturbations & Solutions Employ the simulated annealing tehnique. - Op1: Rotate a module. - Op2: Move a module to another plae. - Op3: Swap two modules. - Op4: Remove a sot module and insert it into the best internal or external position. (The details o how to handle a sot module an be ound in the paper.) Op2-Op4 need insertion and deletion operations. 23

24 Floorplanning/Plaement Based on Corner Blok List Hong, Huang, Cai, Gu, Dong, Cheng, and Gu, Corner blok list: an eetive and eiient topologial representation o non-sliing loorplan, ICCAD 00. A orner blok list (CBL) is a 3-tuple (S, L, T): S: a list o blok names. L: a list o orientations o orner bloks. T: a list o attahed T-juntions. 24

25 Orientation A orner blok an be vertially (enoded as 0) or horizontally (enoded as 1) oriented: A vertial T-juntion A horizontal T-juntion 25

26 Attahed T-juntions We need to know the number o attahed T- juntions to uniquely deine a loorplan. The ollowing loorplans have the same orner blok and orientation, but they have dierent number o attahed T-juntions. D D D A B C D A B C D A B C D 2 attahed T-juntions 1 attahed T-juntion 0 attahed T-juntion 26

27 From a Floorplan to a CBL a b a a d d d d S = ( ) L = ( ) T = ( ) S = (b) L = (0) T = (0) S = (b) L = (10) T = (00) S = (ab) L = (010) T = (000) S = (dab) Note: there is no need to inlude the orientation and L = (010) # o attahed T-juntions o the last orner T = (000) blok in L and T. 27

28 28 Polar Graphs and CBL e d g a b a b d g e b g a d e S = ( ) L = ( ) T = ( ) e g a b a b g e b g a e S = (d) L = (0) T = (10) e g b b g e g e S = (ad) L = (00) T = (010) e g g e g e S = (bad) L = (100) T = (10010) b

29 Polar Graphs and CBL (ont d) S = (gbad) L = (1100) T = ( ) S = (egbad) L = (01100) T = ( ) S = (egbad) L = (001100) T = ( ) S = (egbad) L = (001100) T = ( ) e e e 29

30 Advantages A topologial representation (independent o the blok size). O(n(3+lg n)) to enode a CBL. O(n!2 3n-3 /n 1.5 ) solution spae. O(n) time to onstrut the CBL rom a pair o polar graphs (whih speiies a loorplan). O(n) time to onstrut the polar graphs rom a CBL. O(n) time to onstrut a paking rom a pair o polar graphs. 30

31 Solution Perturbation Employ the simulated annealing tehnique. Perturbation operations: Randomly exhange 2 modules in S. Randomly omplement a bit in L. Randomly omplement a bit in T. Rotate a module by 90º, 180º or 270º. Relet a module horizontally or vertially. Randomly hoose an alternate shape or a sot module. 31

32 Other Floorplan Representations Q-sequene (APCAS-00, DATE-02) Twin binary tree (ISPD-01) Twin binary sequenes (ISPD-02) TCG (DAC-01), TCG-S (DAC-02) 32

33 Other Issues Considering plaement onstraints Range onstraints (ISPD-99) Boundary onstraints (ASPDAC-01) Symmetry onstraints (DAC-99) Considering timing or power Buer planning (ICCAD-99, ISPD-00) Power supply planning (ASPDAC-01) 33