CHAPTER 3 MULTISTAGE FILTER DESIGN FOR DIGITAL UPCONVERTER AND DOWNCONVERTER

Transcription

1 CHAPTER 3 MULTISTAGE FILTER DESIGN FOR DIGITAL UPCONVERTER AND DOWNCONVERTER 3.1 Introduction The interpolation and decimation filter design problem is a very important issue in the modern digital communication systems. In order to provide minimal distortion, firstly the appropriate design specifications should be met. Secondly, the interpolation or decimation filter is to be designed in a manner to satisfy the prescribed characteristics and to provide a low complexity implementation. The filter design depends essentially on the choice of suitable value of the filter coefficients hk ( ), cut-off frequency, filter length c N and the valus of passband and stopband ripple factor. The FIR filter are prefered choice over IIR filters for digital filter design (Crochiere, R. E. and Rabiner, L. R., 1983) due to their simple and stable design. In FIR filter design, it is easier to attain linear phase. Some vendors and specialized hardware only support FIR filters as it has low sensitivity to quantization effects as compared to IIR filters. Although FIR filters can be computationally little expensive to implement, yet the use of multistage/multirate techniques can yield FIR implementations that can compete and surpass IIR implementations while retaining the nice characteristics of FIR filters such as linear-phase, stability, and robustness to quantization effects. In this chapter different FIR filter designs are presented and compared to find a suitable FIR filter design to be used in the proposed design of DUC and DDC. Direct form and polyphase structures for the design of FIR filters are also presented. In this different 25

2 types of direct form and polyphase structures for interpolator and decimators are also been analyzed to select a low cost structure for the design of proposed DUC and DDC. 3.2 FIR Design Methods The various methods used for the FIR design can be categorized as Window based FIR Filter Design Frequency Sampling based FIR Filter Design Maximally Flat FIR Filters Design Equiripple FIR Filter Design Minimum Mean Square Error FIR Filter Design Minimum Phase FIR Filter Design Nyquist FIR Filter Design Window based FIR Filter Design The most common and simple approach to the designing of FIR filter is the windowing technique. This method is based on the truncation of the ideal filter response with some window function to get the actual response of the filter. The mathematical equation for window based design is given by (Crochiere, R. E. and Rabiner, L. R., 1983). h( n) h ( n) w( n) I (3.1) where wn ( ) is the window function and hn ( ) is the actual response of the filter. A number of window functions have been proposed in the literature such as Rectangular, Hamming, Blackman, Kaiser, etc. But among these Hamming and Kaiser Window (Schubler, H. W and Steffen, P. 1998) functions are preferred because they have minimum 26

3 ringing effect near the band edge, oscillations in the stop band decays gradually, they do not have abrupt discontinuities in their time domain characteristics and have correspondingly low sidelobes in their frequency domain characteristics. The window method has the property that it will preserve the zero crossing pattern of the ideal filter response in the actual filter response also. The advantages of the window design are that it is simple, easy to use and can readily be implemented in a direct manner to find the filter coefficients. The disadvantage is that, this method has limited control in choosing the cut off frequencies as well as passband and stopband ripple factor. Also this method is applicable only for smaller filter lengths Frequency Sampling based FIR Filter Design In general, the problem of FIR filter design is to find a finite length impulse response j hn ( ) whose Fourier transform He ( ) approximates a given frequency response well enough. One way of achieving such a goal is by noting that the DFT of a length N, sequence h (n) corresponds to samples of its Fourier transform at the frequencies =2 kn, that is N 1 j jn H( e ) h( n) e (3.2) and then n0 N 1 j2k N j2kn N H( e ) h( n) e, for k=0,1,2,.(n-1) (3.3) n0 It is then natural to consider designing a FIR filter of length N by finding a hn ( ) whose DFT corresponds exactly to samples of the desired frequency response. In other words, hn ( ) can be determined by sampling the desired frequency response at the N points 27

4 He j2 k N ( ) and finding its inverse DFT. This method is generally referred to as the frequency sampling approach (Gold & Jordan, 1969; Rabiner et al., 1970; Rabiner & Gold, 1975). Figure 3.1: Magnitude response of the Low Pass FIR filter designed with the Frequency Sampling Method. By examining the magnitude response shown in Figure 3.1 (Paulo S.R. et al. 2010), it is found that there is a great deal of ripple both at the passband and at the stopband. That s why this method has not found widespread use in filter design. The transition from the passband to the stopband happens between two neighbouring samples of the desired frequency response. The calculation of the coefficients is easy, but additional iteration is necessary to arrive at acceptable results. Furthermore, there are restrictions concerning the choice of the edge frequencies since these have to coincide with the sampling grid of the frequency response. 28

5 3.2.3 Maximally Flat FIR Filter Design Maximally flat filters are filters in which both the passband and stopband are as flat as possible for a specific filter order. This flatness in the bands comes at the expense of a large transition band as can be seen in figure 3.2 (Losada, R.A., 2008). By increasing the filter order from 10 to 20, smaller transition band can be achieved. Figure 3.2: Magnitude response of a Maximally Flat FIR filter So the only way to decrease the transition band is to increase the filter order which increases the required FPGA resources. These filters are seldom used in practice in particular with fixed-point implementations as the filter s coefficients are required to be quantized to a finite number of bits. 29

6 3.2.4 Equiripple FIR Filter Design When compared to other linear phase FIR filters of the same order, linear phase equiripple FIR filters have the smallest maximum deviation from the ideal filter. Equiripple filters are ideally suited for applications in which a specific tolerance must be met. For example, if it is necessary to design a filter with a given minimum stopband attenuation or a given maximum passband ripple. Figure 3.3: Comparison of Passband ripple for Window based FIR filter design and Equiripple FIR filter design Figure 3.3 (Losada, R.A., 2008) shows the comparison of passband ripple for window based FIR filter design and equiripple FIR filter design. From this figure, it can be concluded that the maximum deviation is smaller for the equiripple design. Also for the given order of a filter, the equiripple FIR filter design will give maximum ripple with 30

7 smaller peak for the same transition width. But equiripple FIR filter can not be used to design filters where the aim is to minimize the energy of the error (between ideal and actual filter) in the passband and stopband. Although the equiripple design has less peak error, still it has more total ripple error, measured in terms of its energy Minimum Mean Square Error FIR Filter Design To reduce the energy of a signal as much as possible in a certain frequency band, minimum mean squares error (MMSE) filter design is preferable. The MMSE design minimizes the energy in the ripples in both the passband and stopband, the resulting peak passband ripple is always larger than that of a comparable equiripple design (Schlichtharle D., 2000). Therefore there is a larger disturbance on the signal to be filtered for a portion of the frequencies that the filter should allow to pass. A possible compromise can be made to design equiripple filters in such a way that the maximum ripple in the passband is minimized, but with a sloped stopband that can reduce the stopband energy in a manner comparable to a MMSE design. Basically the MMSE FIR filter design technique is based on minimizing the error between desired filter and ideal interpolator/decimator filter in frequency domain (Selesnick, I. W. and Burrus, C. S., 1997). Figure 3.4 shows basic interpolation filter design for MMSE method where it is required to design the FIR filter hn ( ) for interpolation factor L with minimum interpolation error. The error signal y( m) is defined as y( m) y( m) y ( m) I (3.4) where ym ( ) and y ( m) are the outputs of actual and ideal interpolators respectively. I 31

8 Figure 3.4: Set-up for MMSE FIR Filter Design The mean square error value of y( m) is defined as (Orfanidis, S. J., 1996): 1 E Y e d ' 2 2 j ' ( ) 2 (3.5) This design can be more simplified by using a polyphase structure. Then the error signal can be defined as 2 2 E u ( n), 0,1,2,..., L 1 (3.6) where u ( n) is the error signal between actual output of polyphase filter and ideal polyphase filter output. 2 1 j j / L 2 j 2 or E, P ( e ) e X ( e ) d (3.7) 2 Equation 3.5 represents the mean square error, where 2 E, is the quadratic function of the coefficients p ( n) and has a unique minima for some optimum choice of coefficients, 32

9 j P ( e ) is the actual polyphase filter response, j / L e is the ideal polyphase response and j Xe ( ) is the input signal in frequency domain which is band limited to the range 0 ( lies between 0 and 1) (Cheney, E. W., 1998). Hence by substituting the 2 derivation of E w.r.t. p ( n) to zero gives the minimum mean square error., Figure 3.5: Magnitue Response of Minimum Mean Square Error Filter Figure 3.5 show the magnitue response of MMSE FIR filter for different filter orders N (8, 16, 30 and 60) (Schlichtharle D., 2000). From figure 3.5, it can be concluded that the sharpness of the transition band goes up as the filter order increases. The stopband attenuation, however, characterized by the highest maximum in the stopband, is absolutely independent of the filter order. The attenuation of the first lobe in the stopband amounts to about 20 db. This poor behavior in the stopband is characteristic for the kind of windowing that is used to truncate the length of the unit sample response to N 1 samples resulting in a FIR filter of order N. 33

10 3.2.6 Minimum Phase FIR Filter Design The linear phase characteristic of FIR filter implies a symmetry or anti symmetry property for the filter coefficients. Nevertheless, this symmetry of the coefficients constraints the possible designs that is attainable. This should be obvious since for a filter with N + 1 coefficients; assuming N to be even, only N/2 + 1 of these coefficients are freely assignable. The remaining N/2 coefficients are immediately determined by the linear phase constraint. If exact linear phase characteristic are not desirable then it is possible to design minimum phase equiripple FIR filters that are superior to other equiripple and MMSE FIR filter designs (Hermann, O. and Schubler, H. W., 1970). Minimum-phase FIR filters can also be designed with fixed transition width and peak passband/stopband ripple. In this case, rather than obtaining smaller ripples, the benefit is meeting the same transition width and peak passband/stopband ripples with a reduced filter order. These minimum phase FIR filters will have a much smaller transient delay not only because of their minimum phase property but also because their filter order is lower than that of a comparable linear phase filter. Sometimes when designing lowpass filters, it is necessary that the stopband of the filter begins at a specific frequency value and that the filter provides a given minimum stopband attenuation. If the filter order is fixed as desirable in FPGA based design, there are two alternatives for optimal equiripple designs. One possibility is to fix the transition width; the other is to fix the passband ripple. So in case when the transition width is fixed and the passband ripple is not a constraint, an equiripple design will result in a filter with the smallest possible passband ripple for any linear phase FIR filter of that order that meets the given specifications. 34

11 3.2.7 Nyquist FIR Filter Design Nyquist filters are a special class of filters which are useful for multirate implementations. Nyquist filters also find applications in digital communications systems where they are used for pulse shaping. The widely used root raised cosine (RRC) filter is a special case of Nyquist filter that is often used in communications standards. Nyquist filters are typically designed via FIR approximations (Losada, R.A., 2008). Nyquist filters are also called band filters because the passband of their magnitude response occupies roughly 1 L of the Nyquist interval. A very important property of Nyquist filter is that the cascade of Nyquist filters, results in an overall Nyquist filter. This makes Nyquist filters highly desirable for multistage designs. Moreover, Nyquist filters have very small passband ripple even when the filter is quantized for fixed point implementation, which are required for FPGA implementations. When designing a Nyquist filter, the value of the band L must be specified. Nyquist filters will reduce the bandwidth of a signal by a factor of L. With Nyquist filters, the passband ripple and the stopband ripple cannot be independently specified. Therefore, in all designs, only the stopband ripple and/or the transition width is required. The passband ripple will be the result of the design. In most cases, the resulting passband th L ripple is very small. A characteristic of Nyquist filters is that every th L sample of their impulse response is equal to zero which is desirable for interpolation and decimation because it means that the input samples will pass through the filter unchanged. Moreover, for both interpolation and decimation purposes, one of the L polyphase branches will result in a simple delay with no requirement of multipliers and adders, resulting in reduced implementation cost (Losada, R.A., 2008). 35

12 Amplitude Equiripple Nyquist filters If instead of specifying the order and stopband attenuation of an FIR Nyquist filter design, the order and transition width or the transition width and the stopband attenuation are specified, the design is called equiripple Nyquist design. It must be pointed out that it is not trivial to design equiripple FIR Nyquist filters, given the time-domain constraint. Equiripple designs may have convergence issues for large order and small transition width combinations and may result in spurious filters. Filters with equiripple passband and sloped stopband are also possible. (Losada, R.A., 2008). Impulse Response Samples Figure 3.6: Impulse Response of 8 th band Nyquist FIR filter. Figure 3.6 shows the impulse response of 8 th band Nyquist FIR filter. For 8 th band Nyquist FIR filter, every 8 th sample will be equal to zero (except at centre). In particular, the passband ripples of Kaiser-window designs may be smaller than those of equiripple designs. Moreover, the increasing attenuation in the stopband may be desirable for interpolation and decimation purposes. 36

13 Halfband Filters A Halfband FIR filter is a special case of Nyquist filters which can be used for the interpolation factor of 2. The linear phase Halfband filter has one important property that half of the filter coefficients are zero-valued which makes the design computationally efficient. The transfer function of the linear phase Halfband filter is given by (Lutovac, M., et al. 2001): 2M H( z) h( n) z n0 n (3.8) And the filter length is an odd number The coefficients for this filter are defined as: h( M) 1/ 2, h( M r) 0 for r 0,1,... M / 2 (3.9) N 2M 1, for M 1,3,5,... By looking at the equation, we observe that the odd indexed coefficients in hn ( ) are zero-valued except for the central coefficient hm ( ) =1/2. An efficient implementation of the Halfband interpolation filter is given by (Lang, M., 1998) which is based on the symmetry property of FIR filters. The design follows two basic properties of filter impulse response: the number of nonzero-valued coefficients is nearly half of the filter length and the nonzero coefficients exhibit symmetry property. For example with filter length of 15, taking into account that every second coefficient is zero except for the central coefficient whose value is 0.5, the transfer function H() z can be shown as: H() z h h z h z h z h z h z h z h z h z (3.10) 37

14 which is employed as an anti imaging filter located just after an input signal X() z is up-sampled by a factor of two. H() z is then written in polyphase form as: H z C z z D z ( ) ( ) ( ) (3.11) where C() z h h z h z h z h z h z h z h z (3.12) Figure 3.7: Halfband Interpolation Filter Design for (N=15) or C( z) h (1 z ) h ( z z ) h ( z z ) h ( z z ) (3.13) and D() z h z (3.14) 0 h0 0.5 (central coefficient value) The filter implementation is shown in Figure 3.7. The number of multiplications required is only 4 to implement halfband filter of length N 15 (Losada, R.A., 2008). As half of the coefficients of the half band filter are zero, so memory requirement to store these coefficients reduced significantly. Thus half band filters can be a better choice for FPGA implementations. 38

15 3.3 Discussions on Filter Design Methods From various filter design methods discussed in section 3.2, Nyquist filters seems to be a better choice for multistage implementation of interpolation and decimation filters. The impulse response of a Nyquist filter is zero for every L th sample which is desirable feature required for interpolation because it means that the input samples will pass through the filter unchanged. Moreover, for both interpolation and decimation purposes, one of the L polyphase branches will result in a simple delay with no requirement of multipliers and adders, resulting in reduced implementation cost. Also they have very small passband ripple even when the filter is quantized for fixed point implementations. This feature makes them an excellent choice for FPGA implementations. When L 2, the Nyquist filter is called a half band filter. As half of the coefficients of the half band filter is zero, so memory locations required to store these coefficients reduces. Thus half band filters can also be a better choice for FPGA implementations. Also Nyquiust filter can be used for designing a pulse shaping raised cosine filter. So in the proposed design the Nyquist filter is used for designing different stages of interpolation and decimation filters for DUC and DDC respectively. 3.4 FIR Filter Structures There are several factors that influence the selection of the filter structure used to implement a Nyquist FIR filter. If the filter length is very large, it may be preferable to usea frequency domain implementation based on the FFT. If it is to be implemented in the time domain, the target FPGA device is an important factor. In the following sub sections various filter structures which can be used for designing of interpolation and decimation filters for DUC and DDC respectively are presented and compared. 39

16 3.4.1 Implementation Structures for Interpolation Filters If the sampling rate is increased by an integer factor L, then the new sampling period T will be T 1 (3.15) T L And the new sampling rate will be F LF. This process of increasing the sampling rate of a signal xn by L implies that L 1 new sample values have been interpolated between each pair of sample values of xn. Figure 3.8: Block diagram of an Interpolator Figure 3.8 shows the conceptual block diagram of an interpolator. The insertion of L 1 zero values between each pair of samples of given as xn will result in the signal, wm x( m / L), m 0, L, 2 L,... wm ( ) 0, otherwise (3.16) To recover the baseband signal of interest and eliminate the unwanted higher frequency components it is necessary to filter the signal wmwith a digital low-pass filter, which approximates the ideal characteristic 40

17 2 FT j G, / L He ( ) 2 (3.17) 0, otherwise J if He denote the frequency response of an actual filter that approximates the characteristics in (3.17), then j j jl Y( e ) H( e ) X ( e ) (3.18) J And from (3.17), using the approximated value of He, (3.18) can be written as jl j GX ( e ), / L Ye ( ) 0, otherwise (3.19) Since an ideal frequency response cannot be achieved, the performance of the system for interpolation is mainly determined by filter characteristics. The specific role of a digital filter in interpolation process is the high performance filtering with the lowest possible complexity. The interpolation can be implemented using different filter structures. In the following subsections the different implementation structures of interpolators are analyzed Direct Form Structure for FIR Interpolator The direct form structure (Orfanidis, S.J., 1996), for the interpolation filter is shown in figure 3.9. The signal xn ( ) is up sampled by L and then filtered by the anti imaging FIR filter. The input signal to the filter is umwhich ( ) is the result of the up sampling operation performed on the input signal xn ( ). As every L th input sample to the filter is non-zero valued, therefore in the conventional FIR filter structure as shown in Figure 3.9, L 1 out 41

18 of L input samples are multiplied with the filter coefficients without contributing to the values of the output samples. Figure 3.9: Conventional Direct Form Structure of FIR Interpolator The direct implementation is not an efficient because the filtering has to be performed on the side of higher sampling rate i.e. up-sampling precedes the filtering operation (Rabiner L.R. and Gold, B.1975). Hence, to get efficient strcture, there is need to construct a filter implementation structure, in which the arithmetic operations can be performed at the lower sampling rate. This structure has been shown in Figure 3.10, where the up sampling operation is embedded into the filter structure. The up sampled samples come to the adders and thus arrive to the chain of adders and delays. This implementation structure reduces the number of multiplications per output sample (MPOS) from N (the filter length) to N/L. The number of multiplications per output sample for linear phase FIR interpolation filters can be further reduced by using the coefficient symmetry property of FIR filters. In this way the number of multiplications can be decreased by a factor of 2 (Losada, R.A. 2008), (Lang, M., 1998). This efficient implementation structure with reduced number of multiplications per output sample is shown in Figure

19 Figure 3.10: Efficient Direct Form Structure of FIR Interpolator Figure 3.11: Efficient Direct Form Structure with Reduced Number of Multiplications Polyphase Structure for FIR Interpolator Polyphase structure is the method to implement an efficient interpolation filter (Cheney, E.W., 1998). This method is used to realize a higher order FIR interpolation filter in a parallel structure and is based on the polyphase decomposition of the filter function. 43

20 The transfer function H() z of the filter is to be decomposed into M lower order transfer functions, called the polyphase components, which are then added together to get the original overall transfer function. The decomposition of transfer function H() z into two polyphase components and its generalization in terms of polyphase decomposition has been discussed as follows (McClellan, et al., 1973): H( z) h(0) h(1) z h(2) z... h( N 2) z h( N 1) z 1 2 ( N 2) ( N1) (3.20) Assuming N to be an odd number, the transfer function (3.20) can be decomposed into two polyphase components, with first term from the even indexed coefficients and the second term from the odd indexed coefficients as H( z) h(0) h(2) z... h( N 3) z h( N 1) z 2 ( N 3) ( N1) 1 3 ( 4) ( 2) (1) (3)... ( 4) N N h z h z h N z h( N 2) z (3.21) Further equation (3.20) can be simplified as H( z) h(0) h(2) z... h( N 3) z h( N 1) z 2 ( N 3) ( N1) 1 2 ( 5) ( 3) + (1) (3)... ( 4) N N z h h z h N z h( N 2) z (3.22) The even and odd-indexed coefficients Po () z and P () 1 z respectively of H() z can be written as P ( z) h(0) h(2) z... h( N 3) z h( N 1) z o 1 ( N 3)/2 ( N1)/2 (3.23) 44

21 P( z) h(1) h(3) z... h( N 4) z h( N 2) z 1 1 ( N 5)/2 ( N3)/2 (3.24) Using equations (3.20) to (3.24), the transfer function H() z can be expressed as H( z) P ( z ) z P( z ) (3.25) o Which can be generalised as M 1 k M H( z) z P ( z ) (3.26) k0 k where n Pk ( z) h( nm k) z, 0 k M 1 (3.27) n Equivalently in time domain p ( n) h( nm k), k 0,1,2,..., M 1 (3.28) k The output of the interpolator can be expressed as Y( z) H( z) X ( z) (3.29) The polyphase structure for FIR interpolator is shown in Figure This structure is the efficient implementation of the interpolation filter since filtering operation in the polyphase branches is performed at the lower sampling rate. The filtered signals are up-sampled by L and then fed to the chain of adders and delays. The samples flow through delays at the output sampling rate and finally give the output signal ym. ( ) For each new input sample xn ( ), there are M output samples. The output from the first branch 45

22 corresponding to polyphase component po ( n ) has non-zero values for m nm, n 0, 1, 2,..., which leads to the output samples y( nm ), n 0, 1, 2,....Similarly output from the th M path has non-zero interpolation samples for m nm k and the output is denoted by y( nm k) (Losada, R.A. 2008). Figure 3.12: Polyphase Structure for Interpolator Figure 3.13: Efficient Polyphase Structure 46

23 Thus for each input sample xn ( ) each of the L branches of the polyphase network contributes one non-zero output which corresponds to one of the L outputs of the network as shown in Figure The signal representation for the above polyphase interpolator is shown in Figure 3.14 (Losada, R.A. 2008). Figure 3.14: Signal representation in the Polyphase Interpolation (L=3) Figure 3.15: Polyphase Structure of an Interpolator with Commutator 47

24 Since the up sampled signals in polyphase branches have L 1 zero valued samples, the set of upsamplers and delays in the interpolator structure of Figure 3.13 can be replaced with the commutator with the rotator as shown in Figure The output samples ymare ( ) obtained by picking up the filtered samples sequentially at the output sampling rate Implementation Structures for Decimation Filters Consider the process of reducing the sampling rate of xn by an integer factor M, i.e, T M (3.30) T Then the new sampling rate will be F F M. Assume that xn represents a full band signal, i.e., its spectrum is nonzero for all frequencies f in the range F 2 f F 2, with 2 ft, i.e, X e j 2 ft 0, 2 ft (3.31) 2 except possibly at an isolated set of points. Based on well known sampling theory, in order to lower the sampling rate and to avoid aliasing at this lower rate, it is necessary to filter the signal characteristic xn with a digital low-pass filter which approximates the ideal j He 1, 0, 2 ft /2 M otherwise (3.32) The sampling rate reduction is then achieved by forming the sequence ym by extracting every M th sample of the filtered output. Figure 3.16 show the conceptual block diagram of 48

25 decimator. If the actual low-pass filter unit sample response is h n, then w n h k x n k n (3.33) Where wnis the filtered output. Figure 3.16: Block diagram of Decimator The final output ym is then obtained as wmm y m (3.34) Combining (3.33) and (3.34), the relation between ym and xn can be written as ym hk xmm k (3.35) k The z-transform of ym can be written as (Rabiner, L. R. and Crochiere, R. E. 1981) 1 1 M j l M j 2 l M Y z H e M X e M (3.36) M z z l0 Evaluating Y (z) on the unit circle, z j e, leads to the result 1 1 M 2 2 e e e j j l M j l M Y H X (3.37) M l0 49

26 Where 2 ft (3.38) Equation (3.37) expresses the Fourier transform of the output signal ym in terms of the transforms of the aliased components of the filtered input signal writing the individual components of (3.37) e e e e e j j M j M j M j M Y H X H X... M The purpose of the low-pass filter H j e is to sufficiently filter xn. By (3.39) x n so that its components above the frequency / M are negligible. In terms of (3.37) this implies that all terms for 0 l are removed and if the filter He j approximates the ideal response of (3.32) then (3.37) becomes j 1 j M e e Y X, for (3.40) M closely Direct Form Structure for FIR Decimator Two direct form implementation structures of a decimator with decimation factor M have been shown in Figures 3.17 (a) and 3.17 (b) (Ljiljana Milic, 2009). Figure 3.17 (a) presents the cascade of an FIR filter and down-sampler. The down-sampling operation precedes the multiplications and additions, and therefore the arithmetic operations are evaluated at the lower sampling rate, Figure 3.17 (b) show efficient direct form implementation structure, in which data flow through delays as in the case of the conventional FIR filter. 50

27 Figure 3.17: Direct form implementations of a Decimator: (a) Filter and Downsampler in cascade. (b) Efficient direct form implementation structure The data are picked up from delays simultaneously every M th instant of time, and then multiplied by the filter coefficients h[n] and added together to give the output sample y[m]. In the conventional implementation of Figure 3.17(a), the number of multiplications per input sample in the decimator is equal to the FIR filter length N. The efficient implementation structure of Figure 3.17 (b) reduces the number of multiplications per input sample to N/M. This property significantly improves the efficiency of multirate FIR filters. The number of multiplications can be further reduced in the case of linear-phase FIR filters. By exploiting the coefficient symmetry h[n] = h [N n 1], n = 0, 1 (N 1)/2 for N odd and n = 0, 1 (N-2)/2 for N even, the number of multiplications can be reduced 51

28 Figure 3.18: Direct implementations of a linear phase Decimator with the reduced number of multipliers by 2. Figure 3.18 (Losada, R.A., 2008) shows an efficient realization of a linear-phase decimator (with decimation factor M), where the filter length N is an even number. Here, the number of multiplications per input sample is reduced to N 2M.A similar structure exists for odd length FIR filters, where the multiplication rate is reduced to( N 1) 2M Polyphase Structure for FIR Decimator An FIR decimator filter can be implemented as a parallel connection of M polyphase components, which are added together at the output (Losada, R.A., 2008). A polyphase component is usually implemented in the direct transversal form. Figure 3.19(a) shows a decimator composed of the cascade of an FIR filter implemented as a parallel connection of M polyphase branches, and down sampler. Here the arithmetic operations in the polyphase branches are to be performed at the input sampling rate, i.e. at the higher sampling rate of the system. Instead of down-sampling at the filter output, one can shift 52

29 the down-sampling operation into the polyphase branches before the output adders. These modifications provide the efficient implementation of polyphase decimator (Ljiljana Milic, 2009). Figure 3.19: Polyphase implementation of FIR decimator: (a) Filter and downsampler. (b) Efficient polyphase decimator. In the structure of Figure 3.19(b), the down sampling by M occurs at the inputs of the polyphase components E 0 (z), E 1 (z) E M 1 (z) and filtering is performed at the sampling rate F x /M. The overall computational complexity of the decimator is reduced by M. The input sequences in the polyphase branches of Figure 3.19(b), x 0 [m], x 1 [m], x 2 [m] x M-1 [m], are delayed and down-sampled versions of the input signal x[n]. We can say that the particular sequence x k [m] is obtained when down-sampling by M the sequence x[n] with the phase offset k, k = 0, 1 M 1. Hence, from the causal sequence Xn [ ] = {, 0, 0, x [0], x [1], x [2] x [M 1], x [M], x [M+1] } it is straightforward to extract the M sequences, which can be selected from the input signal x[n] directly by using the commutative structure with the rotator shown in Figure 3.20 (Crochiere, R.E., & Rabiner, 53

30 L.R., 1983). The rotator starts at the starting time n = 0 and gives the current sample x [0] to Eo () z. The next sample x [1], at the time instant n 1, goes to E ( ) M 1 Z continues in the same manner by moving to the left. ). The rotator Figure 3.20: Commutative polyphase structure of a decimator Obviously, the rotator operates at the rate of the high rate input signal xn, [ ] whereas filtering in the polyphase branches is performed at the rate of the low-rate signal y[n]. The samples at the output y[m] are obtained by picking up sequentially samples from the filtered signals at the output sampling rate. 3.5 Multistage implementation of interpolation and decimation filters The interpolators and decimators discussed so far are single-stage systems since the implementation schemes consist of a single low-pass filter and single sampling rate alteration device. When the decimation factor M can be factored into the product of integers, M = M 1 x M 2 x M 3 x M K, instead of using a single filter and down sampler with 54

31 factor M, the overall decimator can be implemented as a cascade of K decimators. Such a cascade implementation, called a multistage decimator, is shown in Figure Figure 3.21: Multistage representation of Decimator The cascade of K decimators gives the following equivalent transfer function H (z), H z H z H z H z H z M 1 M 1 M 2 M1M 2... M 1 ( ) ( ) ( ) ( )... ( k ) k (3.42) In the same manner, the interpolator with factor L is expressible by L = L 1 x L 2 x x L K, can be implemented as a cascade of K interpolators as depicted in Figure The cascade implementation scheme of figure 3.22 is called the multistage interpolator. Figure 3.22: Multistage representation of interpolator The cascade of K interpolators gives the following equivalent transfer function H (z), H z H z H z H z H z L 1 L 1 L 2 L1 L2... L 1 ( ) ( ) ( ) ( )... ( k ) k (3.43) The multistage structures are very useful for implementing large sampling-rate conversion factors. A single stage decimation and interpolation filter usually inconvenient for the 55

32 design and implementation, due to requirement of high order filters. In Multistage implementation of decimation and interpolation this high order filter is replaced with the cascade of simpler filters. The specifications for these individual filters are significantly relaxed since the overall filter specification is shared between several lower order filters. The main advantage of a multirate system is its computational efficiency and is a desirable feature that is required for the demand of high performance filtering with the lowest possible complexity required in sample rate converters. Implementation of Interpolator and Decimator with varying number of Stages Different structures can be used for the implementation of an interpolator and decimator. In this section implementation cost of single stage, two stages and three stages interpolator and decimator for WiMAX specifications are presented. Table 3.1: Resources used by Interpolator designed with Equiripple FIR filter Resources Single Stage Two Stage Three Stage FIR Design FIR Design FIR Design Number of Multipliers Number of Adders Number of MPIS Number of APIS The resources used by Equiripple FIR interpolator for different number of stages have been shown in table 3.1 and figures 3.23 to From table 3.1 and figures 3.23 to 3.26, it is concluded that for equiripple design, when number of stage is single, design requires 56

33 216 and 208 number of multipliers and adders respectively whereas the number of multiplication per input sample (MPIS) and number of additions per input sample (AIPS) are 216 and 208 respectively. Whereas when the number of stages has been taken as three, design requires 82 and 76 number of multipliers and adders respectively whereas the number of MPIS and number of AIPS are 123 and 109 respectively. When only two stages are used, the design shows optimunm results and these value are 86, 80, 113 and 103 respectively. The resources used by Nyquist FIR interpolator for different number of stages have been shown in table 3.2 and figures 3.23 to From table 3.2 and figures 3.23 to 3.26, it can be concluded that with Nyquist design for a single stage, it requires 424 and 417 number of multipliers and adders respectively whereas the number of MPIS and number of APIS are 424 and 417 respectively. Whereas when the number of stages has been taken as three, design requires 68 and 65 number of multipliers and adders respectively whereas the number of MPIS and number of AIPS are 88 and 81 respectively. Table 3.2: Resources used by Interpolator designed with Nyquist FIR filter Single Stage Two Stage Three Stage Resources Nyquist FIR Design Nyquist FIR Design Nyquist FIR Design Number of Multipliers Number of Adders Number of MPIS Number of APIS

34 Number of Adders Number of Multipliers When only two stages are used the design shows optimum results and these value are 78, 74, 100 and 93 respectively. Number of Mutipliers used by Interpolator for Different Number of Stages Number of Stages Equiripple FIR Nyquist FIR Figure 3.23: Number of Multiplies used by Interpolator for Different Number of Stages Number of Adders used by Interpolator for Different Number of Stages Equiripple FIR Nyquist FIR Number of Stages Figure 3.24: Number of Adders used by Interpolator for Different Number of Stages 58

35 Number of APIS Number of MPIS Number of MPIS used by Interpolator for Different Number of Stages Equiripple FIR Nyquist FIR Number of Stages Figure 3.25: Number of Multiplier per Input Sample required by Interpolator for Different Number of Stages Number of APIS used by Interpolator for Different Number of Stages Equiripple FIR Nyquist FIR Number of Stages Figure 3.26: Number of Adders per Input Sample required by Interpolator for Different Number of Stages 59

36 From the comparison of the resources utilized by equiripple interpolator design and Nyquist interpolator design, it is concluded that Nyquist design requires less resources for its implementation. Also when resources used for interpolator design with single, two and three stages are compared, it is observed that resources utilized by two stage design are slightly more as compared to three stage design. But as the number of stages increses, the implementation complexity of design on an FPGA also increases. So, keeping in mind the implementation complexity for FPGA based design a two stage interpolator with Nyquist design is used for the proposed low cost WiMAX DUC. The resources used by Equiripple FIR decimator for different number of stages have been shown in table 3.3 and figures 3.27 to From table 3.2 and figures 3.27 to 3.30, it has been concluded that for equiripple design, when number of stage is single, design requires 216 and 215 number of multipliers and adders respectively whereas the number of MPIS and number of APIS are 27 and respectively. Whereas when the number of stages has been taken as three, design requires 82 and 79 number of multipliers and adders respectively whereas the number of MPIS and number of AIPS are and 14.5 Table 3.3: Resources used by Decimator designed with Equiripple FIR filter Resources Single Stage FIR Design Two Stage FIR Design Three Stage FIR Design Number of Multipliers Number of Adders Number of MPIS Number of APIS

37 respectively. When two stages are used, the design shows optimunm results and these value are 86, 84, and respectively Table 3.4: Resources used by Decimator designed with Nyquist FIR filter Resources Single Stage Nyquist FIR Two Stage Nyquist FIR Three Stage Nyquist Design Design FIR Design Number of Multipliers Number of Adders Number of MPIS Number of APIS The resources used by Nyquist FIR decimator for different number of stages have been shown in table 3.4 and figures 3.27 to From table 3.4 and figures 3.27 to 3.30, it has been concluded that for Nyquist design, when number of stage is one, design requires 425 and 424 number of multipliers and adders respectively whereas the number of MPIS and number of AIPS are and 53 respectively. Whereas when the number of stages has been taken as three, design requires 71 and 68 number of multipliers and adders respectively whereas the number of MPIS and number of APIS are and 11 respectively. When two stages are used, the design shows optimum results and these value are 80, 78, and 12.5 respectively. From the comparison of the resources utilized by equiripple decimator design and Nyquist decimator design, it can be concluded that Nyquist design requires less resources for its implementation. Also when resouces used for decimator design with single, two and three stages are compared, it has been observed 61

38 Number of Adders Number of Multipliers Number of Mutipliers used by Decimator for Different Number of Stages Number of Stages Equiripple FIR Nyquist FIR Figure 3.27: Number of Multiplies used by Decimator for Different Number of Stages that resources utilized by two stage design are slightly more as compared to three stage design. But as the number of stages increases, the implementation complexity of design on an FPGA also increases. Number of Adders used by Decimator for Different Number of Stages Equiripple FIR Nyquist FIR Number of Stages Figure 3.28: Number of Adders used by Decimator for Different Number of Stages 62

39 Number of APIS Number of MPIS Number of MPIS used by Decimator for Different Number of Stages Number of Stages Equiripple FIR Nyquist FIR Figure 3.29: Number of Multiplier per Input Sample required by Decimator for Different Number of Stages Number of APIS used by Decimator for Different Number of Stages Number of Stages Equiripple FIR Nyquist FIR Figure 3.30: Number of Adders per Input Sample required by Decimator for Different Number of Stages 63

40 So, keeping in mind the implementation complexity for FPGA based design, a two stage decimator with Nyquist design will be used for the proposed low cost WiMAX DDC. 3.6 Conclusion The design of interpolation and decimation filters is an important issue in digital communication systems. Due to less implementation complexity, linear phase and stability, FIR filters are preferred over IIR filters. In this chapter various FIR filter design techniques like window based FIR filter design, frequency sampling based FIR filter design, maximally flat FIR filters design, equiripple FIR filter design, minimum mean square error FIR filter design, minimum phase FIR filter design and Nyquist FIR filter design are discussed in detail. From their comparison, it is concluded that due to low implementation complexity, equiripple FIR Filter design and Nyquist FIR filter designs filter can be used in the design of efficient interpolation and decimation filters. Also various filter structures for direct form and polyphase form are discussed in detail. From the discussions on direct form and polyphase filter structures, it is concluded that the computational efficiency of any filter structure is determined by the number of MPOS. As compared to the conventional FIR interpolator structure, the direct form structure as well as polyphase structure reduces the number of multiplications significantly. In Polyphase structures at least, one component can exhibit the coefficient symmetry. Thereby Polyphase configuration can be suitable for the savings in memory. Also as compared to the Polyphase filter structures, the Direct form filter structures have the advantage that they can be easily modified by using symmetry property of FIR filters. Thus to take the advantages of both direct form and polyphase form structure implementations, the proposed interpolators and decimators are implemented with direct form polyphase structure. 64

41 So, in this chapter interpolation and decimation filters are designed using both equiripple FIR filter design and Nyquist FIR filter design methods using direct form polyphase structure. These designs are implemented using single stage, two stages and three stages. From comparison of the resources utilized for each type of implementation, it is concluded that both for interpolation and decimation filters, Nyquist FIR filter design requires less number of resources. Although it was observed that resources utilized by two stage design are slightly more as compared to three stage design, but due to less FPGA implementation complexity a two stage interpolator and two stage decimator with Nyquist design are used for the proposed low cost WiMAX DUC and DDC. 65