GPU-BASED RAY TRACING ALGORITHM USING UNIFORM GRID STRUCTURE

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1 GPU-BASED RAY TRACING ALGORITHM USING UNIFORM GRID STRUCTURE Reza Fuad R 1) Mochamad Hariadi 2) Telematics Laboratory, Dept. Electrical Eng., Faculty of Industrial Technology Institut Teknologi Sepuluh Nopember (ITS), Surabaya Indonesia ) rezafuad@gmail.com, 2) mochar@ee.its.ac.id Abstract Ray tracing rendering technique had been widely used in several application including 3D animation, CAD, dan architecture software. The biggest challenge to implement the ray tracing rendering system is a large computation power needed by application. In order to tackle that problem, we use uniform grid data structure to divide the scene into small grid and 3D Digital Differential Analyzer (3D-DDA) to access the structure. Our system are split into two steps, the first step is to construct the uniform grid structure based on scene condition and the second step is ray tracing traversal based on uniform grid structure that processed in previous step. Uniform grid structure is used in our system because it s GPU friendly data structure and easier to implement in GPU. Our system runs at 6 ms until 200 ms for constructing the uniform grid structure and 2 fps until 30 fps for scene rendering time. Comparing with CPU implementation, our system run 2 until 6 time faster depends on scene condition. Keywords: GPGPU, ray tracing, uniform grid, 3D-DDA in paper [2]. In that paper, they used ray tracing algorithm to make a special effect of the glossy object, in this case is a cars, which reflect the near environment object to provide a natural reflection at the car body. As described before, some accelerated data structure being used to divide the scene into more primitive geometry. That primitive geometry used to calculating the collision between rays that shoot from camera to the scene with the object in scene. One of the famous accelerated data structures that used in ray tracing algorithm is uniform grid structure. Uniform grid structure split the scene into small AABB (Axis Alignment Bounding Box) as ilustrated in figure 1. The disadvantage of uniform grid structure is the inability to adapt of the geometry distribution in the scene. Nevertheless in Wald paper [11], they describe that the ray tracing traversal in uniform grid structure can be accelerated using a 3D-DDA algorithm. 3D- DDA is an algorithm that used to generate a line in 3D space and in ray tracing traversal 3D- DDA is used to traversing the ray from AABB to another AABB in uniform grid structure. CUDA is one of parallel processing schema that introduced by Nickolls [13] and used by NVIDIA as their GPU hardware specification. 1. INTRODUCTION Rendering a photorealistic image using ray tracing algorithm at interactive frame rate is a challenging problem in computer graphics research area. Most of all applications that used ray tra-cing algorithm as their rendering technique run at offline mode. In several paper, such as [1, 2, 4, 5, 10, 12], accelerated structure is used to reduce the rendering time. K-d tree, uniform grid, and BVH are three structures that mostly used to accelerating the rendering process. The example of the ray tracing algorithm that used in real application is described Figure 1. The actual geometry of uniform grid structure

2 Figure 2. Complete data structure that used in our ray tracing renderer system. The uniform grid structure, the main structure, only refer an index from triangle offset structure and triangle offset structure is point to triangle collection (triangle data structure). In several years, GPU based algorithm had been adopted and used in many research area including photorealistic rendering using ray tracing [3, 5, 8, 13]. In several paper, such as [6, 7, 9], the investigation of the use of uniform grid structure in ray tracing algorithm both on CPU and GPU had been published and give a promising result. In this paper we will explain and discuss more detail algorithm that used to implement a GPU based ray tracing renderer. We split the system into two sub system; the first sub system is how to construct the uniform grid structure in parallel and the second sub system is how to traversing the ray in parallel. 2. CONSTRUCTING UNIFORM GRID STRUCTURE As we describe above, the first step of our ray tracing renderer is how to construct a uniform grid structure based on scene condition. The algorithm is based on our previous paper [1] and divided into six steps. We will explain each step detail in this section. Before jump to detail explanation of each step, we describe our data structure design to use with the algorithm. There is several aspects that must be considered in order to design the uniform grid data structure. The first aspect is how to design the uniform grid data structure so its can be accessed randomly by all threads that run in parallel execution. We solve that problem by spliting the data structure into three pieces. The main structure, uniform grid structure, only save the start and end index of data in polygon index structure that assosiate with each cell. The triangle offset structure is a temporary structure that saves an index of triangle in triangle data structure and an index of uniform grid cell. In our implemen-tation, this structure is sort based on cell index and it can be point a same triangle index with other element. Relation between those three data structure is ilustrated in figure 2. The second aspect is how the uniform grid resolution determines. We done this calculation in initialization step. Initialization. In this step, our system do two preparation before continue to another step. Those preparation are calculating the resolution of uniform grid depands on scene condition and reserved a memory for uniform grid storage. We use method in paper [7, 11] to calculating the resolution of uniform grid structure that match with the scene condition and the equation is show in equation 1.

3 N x = d x 3 kp V, N y = d y 3 kp V, N z = d z 3 kp V (1) With: N x, N y, and N z is the resolution of uniform grid structure each axis. P is the total polygon on the scene. V is the volume of the scene. d x, d y, and d z is the diagonal of each axis in the scene. k is a user defined parameter. In those equation there is one parameter that need to be set, parameter k. In paper [11] the value of k had been investigate to get the best system performance of ray tracing renderer. The result, best system performance is achive when k = 5. We choose the same value of k with expectation that the system will run faster and because the value had been tested in experiment before in paper [11]. Overlapped Polygon. In parallel enviroment there is no dynamic memory such as STL vector in C++, so we must ensure the memori needed by the program. As we describe above, the data structure that we use is divided into three pieces and the triangle offset structure size is one of the main problems in the algorithm. This step calculating how many cell in uniform grid that intersect with the polygon and save it for calculating size of the triangle offset structure. We implement this step in massively parallel enviroment with thread as many as total polygon in the scene. Parallel Prefix Sum. Next step after knowing how many cell intersect in each polygon, we Table 1. Data parallel size for each step in constructiong the uniform grid structure. Step Size of Data Parallel need to sum all the value to know size of the triangle offset structure. We use method that describe in paper [16] and it s already packages with CUDPP (CUDA Data Parallel Processing) library. To offer the start index of the data in each polygon than we use inclusive scan algorithm and its can be describe by equation 2. a 0,, a n 1 a 0,, a 0 a 1 a n 1 (2) From equation 2, we know that the sum of all elements in array will be available in the last element of the result array. The start index of the data each polygon will be available in array element before the polygon index right now and maximum data that can be saved is element in current polygon index substract with element before current polygon index. After the size of the triangle offset structure knowed then system will reserved the memori for it. Overlapped Polygon 2. As the size of triangle offset structure knowed and reserved memory areas, the system now do the same algorithm in second step but this time the value that saved is each cell id that intersect the polygon with polygon index itself. Cell id data is saved in separate data structure to perform a sorting algorithm in next step and its pair, polygon index data, is saved in triangle offset structure. Parallel Sort. To get a data structure that we have design early, the triangle offset must be sorted by cell id. We use parallel radix sort algorithm in paper [17] as sorting algorithm and it had been implement in CUDPP library. That paper [17] is claiming to be the fastet sorting algorithm that runs on GPU. Scanning Data For Start And End Offset. After all data in triangle offset sorted by cell id, the next step is to find the start and end index for each cell id and save it in uniform grid structure. Initialization Overlapped Polygon Paralel Prefix Sum Overlapped Polygon 2 Paralel Sort Scanning Data For Start And End Offset Serial Code The number of polygons The number of polygons The number of polygons The size of triangle offset structure The size of triangle offset structure

4 R Figure 3. Dealing with the intersection in uniform grid structure during ray traversal proccess. The blue triangles are the triangle that checked but it s not intersecting with the ray. The green and red triangles are intersecting with ray but the green one is intersecting outside the yellow box. After all step completed, we have a complete uniform grid structure that can be accesed randomly by the thread. There are some issues with the data structure design especially if the number of polygon in scene is very large. This issue will be discussed more detail in results section. Table 1 is describing the size of data parallel processed by system in each step. From that table the througthput of system can be determined by the number of polygon in the scene and the size of triangle offset structure. 3. RAY TRACING TRAVERSAL The second sub system, ray tracing traversal, is a system that tries to estimate the natural behaviour of light. There are two method that we use to implement the ray tracing traversal algorithm, slabs method for detect ray-aabb intersection [15] and ray-triangle intersection method that describe in paper [14]. There is one issue that we had to deal in ray-triangle intersection algorithm. As desribed in figure 3, if the traversal right now is in the yellow box the system will test two triangles, the green triangle and the red triangle. All those triangles is intersect with ray in different coordinat but only one triangle that intersect with ray in yellow box, the other triangle is intersect outside the yellow box. To tackle the problem, we use correction check, if the intersection coordinat is in the yellow box then the system will accept the intersection and if not than the system will reject it and continue to next cell or triangle. For efficient computing, we also add a ray-aabb scene test before traversing the ray to make sure that the ray hit the scene. The pseudo code of ray tracing traversal algorithm using uniform grid structure is describe in algorithm 1. Because we implement the ray tracing traversal in one big kernel, CUDA launch configuration will be a big issue to deal with. In paper [13], we know that CUDA split the parallel process into a several block and a block can have a several thread. To optimize the traversal process, we choose a several thread per block configuration and test the system with several cases. We choose the thread per block configu- Algorithm 1. Pseudo code of uniform grid traversal 01 hitscene Test ray-aabb scene intersection 02 if (hitscene)then 03 initialize variable for traversal 04 loop while voxel is in scene AABB 05 loop all triangle in voxel 06 test ray-triangle intersection 07 if (ray hit triangle) 08 convert intersection coordinate to voxel coordinate 09 if (same voxel coordinate) 10 save intersection coordinate 11 end if 12 end if 13 end loop 14 Calculate for next voxel coordinate 15 end loop 16 end if

5 Scene Number of Polygon Construction Time Traversal Time Memory Size Our Approach in [7] in [9] Our Approach in [7] in [9] for the structure Bunny ,14 ms n/a 10 ms 61,39 ms n/a 680 ms 0,41 MB Sponza Atrium ,80 ms 13 ms 80 ms 128,2 ms n/a 1930 ms 7,6 MB Fairy Forest ,77 ms 24 ms n/a 387,86 ms 285 ms n/a 13,22 MB Conference Room ,42 ms 27 ms n/a 278,55 ms 130 ms n/a 18,73 MB Dragon ,82 ms n/a 110 ms 133,54 ms n/a 800 ms 72,62 MB Happy Budha ,08 ms n/a 140 ms 172,40 ms n/a 580 ms 90,92 MB Table 2. Test result and comparison with another system approach [7] and [9]. In [7], they use GPU with CUDA platform and it s our competitor. In [9], they use CPU-based implementation with special structure called hashed grid. ration that has a lowest traversal time. This test will be discussed more detail in results and discussion section. 4. RESULTS To show the performance of our system, we test the system with several 3D scenes that used in several papers. Although we use a different machine configuration, such as CPU, GPU, memory interface, etc, we can analyze and compare our system with another system in several papers that have same goals. We use GeForce GTX 260 with 896 Mb of RAM with CUDA toolkit 3.0 library to test our system. We use 16x16 threads per block configuration to running the system. The whole test result and comparison with system in [7] and [9] can be seeing in table 2. We can see from table 2, comparison between our system with system in [7] has a quite small difference. The construction time and traversal time in those two systems has a relatively same result with small difference. Other comparison is between our system with Lagae system [9] that use CPU based code in their implementation. On this comparison, our system approach beat Lagae system [9] in all tests with 3 until 15 times faster depends on scene condition. Another test we do is to searching a most efficient CUDA configuration. In this test, we try to analyze the system behavior with several different threads per block configuration start from 4x4 until 16x16 threads per block. We use only three models that have a high traversal time, sponza atrium, conference, and fairy forest model. Table 3 shows the result from a system running with different threads per block configuration for our algorithm. We can see from table 3 that as we increased the threads per block configuration the traversal time has a downward trend. 5. DISCUSSION From table 2, we can analyze that ray tracing algorithm running much faster in GPU than CPU but the speed up is not quite significant with the total of processor used in the system. In GPU, there are about 200 processors that can be used to compute anything, so the speed up of 4 or 10 times is not quite significant. This phenomena occurs because the GPU is designed to compute problem in pure parallel and ray tracing is not a pure parallel problem so the speed up of system may not achieving as we predict. For constructing uniform grid structure time, our system can beat Kalajnov system [7] with only several milisecond different with lower hadrware configuration. That phenomena is occurs because our system use more faster parallel sort algorithm that described in paper [17] so the sorting time will reduce with several milisecond. Detail about parallel sort algorithm that run on GPU can be readed in [17]. In other test, from table 3 we can ensure that for several scenes we use for the test, the Tabel 3. test run with different threads per block configuration Threads per Sponza block Atrium Conference Fairy Forest 4x4 312,77 ms 714,41 ms 861,59 ms 5x5 233,87 ms 553,67 ms 738,1 ms 6x6 173,3 ms 444,89 ms 635,78 ms 7x7 146,86 ms 374,37 ms 523,73 ms 8x8 131,63 ms 339,66 ms 498,74 ms 9x9 159,27 ms 372,75 ms 488,14 ms 10x10 145,96 ms 337,94 ms 444,19 ms 11x11 117,03 ms 292,88 ms 407,49 ms 12x12 179,43 ms 372,25 ms 434,89 ms 13x13 165,15 ms 341,38 ms 382,44 ms 14x14 147,93 ms 316,46 ms 388,79 ms 15x15 135,43 ms 297,7 ms 351,04 ms 16x16 128,2 ms 278,55 ms 387,86 ms

6 Figure 4. Screen shot of our ray tracing renderer. Left: sponza atrium model and right: conference room model. optimized system not occurs in same thread per block configuration. For sponza atrium scene, the most efficient threads per block configuration is 11x11, for conference is 16x16, and for fairy forest is 15x15. Those phenomena occurs because different number of the idle processor in runtime. Idle processor is a several GPU processor that finish up the computing process too early and must be waiting for another processor to finish its works. This problem can reduced by selectively count the computing needed for each step in traversal algorithm. In our implementation, we designed the traversal algorithm in one big kernel code, so a lot of ifelse rule we use in order to implement the traversal algorithm. Those if-else rules had a big impact to increasing the number of idle processor in runtime. Figure 4 is a sample output of our system with sponza atrium and conference model. As you can see in figure 4, we not yet implement any color shading and normal interpolation because we focus in uniform grid construction and ray tracing traversal problem. 6. CONCLUSION We present our ray tracing rendering system that run on CUDA platform. In this paper, we show that a ray tracing rendering system using uniform grid structure as their accelerated structure can run 4 until 6 time faster from CPU version. We also show that optimized runtime configuration will not occurs in the same thread per block configuration. The system we approach here is not quite efficient because we use a lot of if-else rule in kernel code and its will increase the number of idle processor in runtime. For future research we suggest to investigating and designing the structure of the uniform grid for scene with large geometry distribution size. The traversal step can also divide into different step and carefully calculate the computing needed in each step to reduce the number of idle processor in runtime. Shading and normal interpolation can be added to the system to provide more photorealistic result. 7. BIBLIOGRAPHY [1] R. Fuad and M. Hariadi, GPU-Based Parallel Algorithm for Construction of Uniform Grid Structure, Proc. APTECS, 2009, Surabaya Indonesia. [2] P. H. Christensen, J. Julian, D. M. Laur, and D. Batali, Ray Tracing for the Movie Cars, Proceedings of the IEEE Symposium on Interactive Ray Tracing, 1 6, 2006 [3] M. Christen, Ray Tracing on GPU, Diploma thesis, University of Applied Sciences Basel 2005 [4] V. Havran, Heuristic ray shooting algorithms, PhD thesis, Czech Technical University 2000 [5] D. Horn, J. Sugerman; M. Houston; and P. Hanrahan, Interactive k-d Tree GPU Raytracing, Proc Symposium on Interactive 3D Graphics [6] P. Ivson, L. Duarte, and W. Celes, Gpuaccelerated uniform grid construction for ray tracing dynamic scenes, Master s Thesis Results 14/09, PUC-Rio, June [7] J. Kalojanov, and P. Slusallek, A Parallel Algorithm for Construction of Uniform Grids, Proceedings of High Performance Graphics 2009, New Orleans, USA, August 1-3, 2009 [8] F. Karlsson, and C. J. Ljungstedt, Ray Tracing Fully Implemented on Programmable Graphics Hardware, Master thesis, Chalmers University of Technology 2004

7 [9] A. Lagae, and P. Dutré, Compact, fast and robust grids for ray tracing, Computer Graphics Forum (Proceedings of the 19th Eurographics Symposium on Rendering), 27(4): , June [10] N. Thrane, and L. O. Simonsen, A Comparison of Acceleration Structures for GPU Assisted Ray Tracing, Master thesis, Aarhus University, Denmark 2005 [11] I. Wald, T. Ize, A. Kensler, A. Knoll, and S. G. Parker, Ray tracing animated scenes using coherent grid traversal, ACM Transactions on Graphics. Vol 25, 3, , [12] T. Whitted, An Improved Illumination Model for Shaded Display, Communications of the ACM, , 1980 [13] J. Nickolls, I. Buck, M. Garland, and K. Skardon, Scalable parallel programming with CUDA, In Queue 6. ACM Press, 2, 40 53, [14] Möller T. and Trumbore B., Fast, minimum storage ray-triangle intersection, J. Graph. Tools, 2(1): 21 28, [15] Kay T. L. and Kajiya J. T., Ray tracing complex scenes. In SIGGRAPH 86: Proceedings of the 13th annual conference on Computer graphics and interactive techniques, pages , New York, NY, USA, ACM. [16] Sengupta S., Harris M., and Garland M., Efficient parallel scan algorithms for GPUs, NVIDIA Technical Report NVR , December 2008 [17] Satish N., Harris M., and Garland M., Designing efficient sorting algorithms for manycore GPUs, Proc. 23rd IEEE Int l Parallel & Distributed Processing Symposium, May 2009