Logical and Bit Operations. Chapter 8 S. Dandamudi
|
|
|
- Damian Heath
- 5 years ago
- Views:
Transcription
1 Logical and Bit Operations Chapter 8 S. Dandamudi
2 Outline Logical instructions AND OR XOR NOT TEST Shift instructions Logical shift instructions Arithmetic shift instructions Rotate instructions Rotate without carry Rotate through carry Logical expressions in high-level languages Representation of Boolean data Logical expressions Bit instructions Bit test and modify instructions Bit scan instructions Illustrative examples Performance: Shift versus multiplication S. Dandamudi Logical operations: Page 2 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
3 Logical Instructions Logical instructions operate on bit-by-bit basis Five logical instructions: AND OR XOR NOT TEST All logical instructions affect the status flags S. Dandamudi Logical operations: Page 3 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
4 Logical Instructions (cont d) Since logical instructions operate on a bit-by-bit basis, no carry or overflow is generated Logical instructions Clear carry flag (CF) and overflow flag (OF) AF is undefined Remaining three flags record useful information Zero flag Sign flag Parity flag S. Dandamudi Logical operations: Page 4 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
5 Logical Instructions (cont d) AND instruction Format and destination,source Usage To support compound logical expressions and bitwise AND operation of HLLs To clear one or more bits of a byte, word, or doubleword To isolate one or more bits of a byte, word, or doubleword S. Dandamudi Logical operations: Page 5 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
6 Logical Instructions (cont d) OR instruction Format or destination,source Usage To support compound logical expressions and bitwise OR operation of HLLs To set one or more bits of a byte, word, or doubleword To paste one or more bits of a byte, word, or doubleword S. Dandamudi Logical operations: Page 6 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
7 Logical Instructions (cont d) XOR instruction Format xor destination,source Usage To support compound logical expressions of HLLs To toggle one or more bits of a byte, word, or doubleword To initialize registers to zero» Example: xor AX,AX S. Dandamudi Logical operations: Page 7 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
8 Logical Instructions (cont d) NOT instruction Format not destination Usage To support logical expressions of HLLs To complement bits» Example: 2 s complement of an 8-bit number not AL inc AL S. Dandamudi Logical operations: Page 8 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
9 Logical Instructions (cont d) TEST instruction Format test destination,source TEST is a non-destructive AND operation» Result is not written in destination Usage» Similar in spirit to cmp instruction To test bits» Example: test AL,1 jz even_number ; else odd number S. Dandamudi Logical operations: Page 9 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
10 Shift Instructions Two types of shift instructions Logical shift instructions» shl (SHift Left)» shr (SHift Right)» Another interpretation: Logical shift instructions work on unsigned binary numbers Arithmetic shift instructions» sal (Shift Arithmetic Left)» sar (Shift Arithmetic Right)» Another interpretation: Arithmetic shift instructions work on signed binary numbers S. Dandamudi Logical operations: Page 10 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
11 Shift Instructions (cont d) Effect on flags Auxiliary flag (AF): undefined Zero flag (ZF) and parity flag (PF) are updated to reflect the result Carry flag» Contains the last bit shifted out Overflow flag» For multibit shifts Undefined» For single bit shifts OF is set if the sign bit has changed as a result of the shift Cleared otherwise S. Dandamudi Logical operations: Page 11 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
12 Logical Shift Instructions General format shl destination,count shr destination,count destination can be an 8-, 16-, or 32-bit operand located either in a register or memory SHL CF 0 Bit Position: SHR 0 CF Bit Position: S. Dandamudi Logical operations: Page 12 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
13 Logical Shift Instructions (cont d) Two versions shl/shr destination,count shl/shr destination,cl First format directly specifies the count value» Count value should be between 0 and 31» If a greater value is specified, Pentium takes only the least significant 5 bits as the count value Second format specifies count indirectly through CL» CL contents are not changed» Useful if count value is known only at the run time as opposed at assembly time Ex: Count is received as an argument in a procedure call S. Dandamudi Logical operations: Page 13 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
14 Usage Logical Shift Instructions (cont d) Bit manipulation ; AL contains the byte to be encrypted mov AH,AL shl AL,4 ; move lower nibble to upper shr AH,4 ; move upper nibble to lower or AL,AH ; paste them together ; AL has the encrypted byte Multiplication and division» Useful to multiply (left shift) or divide (right shift) by a power of 2» More efficient than using multiply/divide instructions S. Dandamudi Logical operations: Page 14 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
15 Arithmetic Shift Instructions Two versions as in logical shift sal/sar destination,count sal/sar destination,cl SAL CF 0 Bit Position: SAR CF Bit Position: S. Dandamudi Logical operations: Page 15 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
16 Double Shift Instructions Double shift instructions work on either 32- or 64- bit operands Format Takes three operands shld dest,src,count ; left shift shrd dest,src,count ; right shift dest can be in memory or register src must be a register count can be an immediate value or in CL as in other shift instructions S. Dandamudi Logical operations: Page 16 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
17 Double Shift Instructions (cont d) src is not modified by doubleshift instruction Only dest is modified Shifted out bit goes into the carry flag 15/ /31 0 shld CF dest (register or memory) src (register) 15/ /31 0 shrd src (register) dest (register or memory) CF S. Dandamudi Logical operations: Page 17 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
18 Rotate Instructions A problem with the shift instructions Shifted out bits are lost Rotate instructions feed them back Two types of rotate instructions Rotate without carry» Carry flag is not involved in the rotate process Rotate through carry» Rotation involves the carry flag S. Dandamudi Logical operations: Page 18 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
19 Rotate Without Carry General format rol destination,count ror destination,count count can be an immediate value or in CL (as in shift) ROL CF Bit Position: ROR CF Bit Position: S. Dandamudi Logical operations: Page 19 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
20 Rotate Through Carry General format rcl destination,count rcr destination,count count can be an immediate value or in CL (as in shift) RCL CF Bit Position: RCR CF Bit Position: S. Dandamudi Logical operations: Page 20 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
21 Rotate Through Carry (cont d) Only two instructions that take CF into account» This feature is useful in multiword shifts Example: Shifting 64-bit number in EDX:EAX Rotate version mov CX,4 ; 4 bit shift shift_left: shl EAX,1 ; moves leftmost bit of EAX to CF rcl EDX,1 ; CF goes to rightmost bit of EDX loop shift_left Double shift version: shld EDX,EAX,4 ; EAX is unaffected by shld shl EAX,4 S. Dandamudi Logical operations: Page 21 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
22 Logical Expressions in HLLs Representation of Boolean data Only a single bit is needed to represent Boolean data Usually a single byte is used» For example, in C All zero bits represents false A non-zero value represents true Logical expressions Logical instructions AND, OR, etc. are used Bit manipulation Logical, shift, and rotate instructions are used S. Dandamudi Logical operations: Page 22 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
23 Bit Instructions Bit Test and Modify Instructions Four bit test instructions Each takes the position of the bit to be tested Instruction Effect on the selected bit bt (Bit Test) No effect bts (Bit Test and Set) selected bit 1 btr (Bit Test and Reset) selected bit 0 btc selected bit NOT(selected bit) (Bit Test and Complement) S. Dandamudi Logical operations: Page 23 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
24 Bit Instructions (cont d) All four instructions have the same format We use bt to illustrate the format bt operand,bit_pos operand is word or doubleword» Can be in memory or a register bit_pos indicates the position of the bit to be tested» Can be an immediate value or in a 16- or 32-bit register Instructions in this group affect only the carry flag» Other five flags are undefined following a bit test instruction S. Dandamudi Logical operations: Page 24 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
25 Bit Scan Instructions These instructions scan the operand for a 1 bit and return the bit position in a register Two instructions bsf dest_reg,operand ;bit scan forward bsr dest_reg,operand ;bit scan reverse» operand can be a word or doubleword in a register or memory» dest_reg receives the bit position Must be a 16- or 32-bit register Only ZF is updated (other five flags undefined) ZF = 1 if all bits of operand are 0 ZF = 0 otherwise (position of first 1 bit in dest_reg) S. Dandamudi Logical operations: Page 25 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
26 Example 1 Illustrative Examples Multiplication using shift and add operations» Multiplies two unsigned 8-bit numbers Uses a loop that iterates 8 times Example 2 Same as Example 1 (efficient version)» We loop only for the number of 1 bits Uses bit test instructions Example 3 Conversion of octal to binary S. Dandamudi Logical operations: Page 26 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
27 Performance: Shift vs. Multiplication 15 Execution time (seconds) general shift multiply single shift Number of calls (in millions) S. Dandamudi Logical operations: Page 27 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
28 Performance: Shift vs. Multiplication (cont d) 12 Execution time (seconds) multiply shift Number of calls (in millions) S. Dandamudi Logical operations: Page 28 To be used with S. Dandamudi, Introduction to Assembly Language Programming, Springer-Verlag,.
Logical and bit operations
Assembler lecture 6 S.Šimoňák, DCI FEEI TU of Košice Logical and bit operations instructions performing logical operations, shifts and rotations logical expressions and bit manipulations strings Logical
Chapter 5. Real-Mode 80386DX Microprocessor Programming 1 Part 2. The 80386, 80486, and Prentium Processors,Triebel Prof. Yan Luo, UMass Lowell 1
Chapter 5 Real-Mode 80386DX Microprocessor Programming 1 Part 2 Prof. Yan Luo, UMass Lowell 1 Introduction 5.2 Data-Transfer Instructions 5.3 Arithmetic Instructions 5.4 Logic Instructions 5.5 Shift Instructions
complement) Multiply Unsigned: MUL (all operands are nonnegative) AX = BH * AL IMUL BH IMUL CX (DX,AX) = CX * AX Arithmetic MUL DWORD PTR [0x10]
![complement) Multiply Unsigned: MUL (all operands are nonnegative) AX = BH * AL IMUL BH IMUL CX (DX,AX) = CX * AX Arithmetic MUL DWORD PTR [0x10]](/thumbs/76/72989659.jpg "complement) Multiply Unsigned: MUL (all operands are nonnegative) AX = BH * AL IMUL BH IMUL CX (DX,AX) = CX * AX Arithmetic MUL DWORD PTR [0x10]")
The following pages contain references for use during the exam: tables containing the x86 instruction set (covered so far) and condition codes. You do not need to submit these pages when you finish your
Arithmetic and Logic Instructions And Programs
Dec Hex Bin 3 3 00000011 ORG ; FOUR Arithmetic and Logic Instructions And Programs OBJECTIVES this chapter enables the student to: Demonstrate how 8-bit and 16-bit unsigned numbers are added in the x86.
Logic Instructions. Basic Logic Instructions (AND, OR, XOR, TEST, NOT, NEG) Shift and Rotate instructions (SHL, SAL, SHR, SAR) Segment 4A
Segment 4A Logic Instructions Basic Logic Instructions (AND, OR, XOR, TEST, NOT, NEG) Shift and Rotate instructions (SHL, SAL, SHR, SAR) Course Instructor Mohammed Abdul kader Lecturer, EEE, IIUC Basic
Lecture 9. INC and DEC. INC/DEC Examples ADD. ADD Examples SUB. INC adds one to a single operand DEC decrements one from a single operand
Lecture 9 INC and DEC Arithmetic Operations Shift Instructions Next week s homework! INC adds one to a single operand DEC decrements one from a single operand INC destination DEC destination where destination
3.1 DATA MOVEMENT INSTRUCTIONS 45
3.1.1 General-Purpose Data Movement s 45 3.1.2 Stack Manipulation... 46 3.1.3 Type Conversion... 48 3.2.1 Addition and Subtraction... 51 3.1 DATA MOVEMENT INSTRUCTIONS 45 MOV (Move) transfers a byte, word,
Ex : Write an ALP to evaluate x(y + z) where x = 10H, y = 20H and z = 30H and store the result in a memory location 54000H.
Ex : Write an ALP to evaluate x(y + z) where x = 10H, y = 20H and z = 30H and store the result in a memory location 54000H. MOV AX, 5000H MOV DS, AX MOV AL, 20H MOV CL, 30H ADD AL, CL MOV CL, 10H MUL CL
Introduction to 8086 Assembly
Introduction to 8086 Assembly Lecture 8 Bit Operations Clock cycle & instruction timing http://www.newagepublishers.com/samplechapter/000495.pdf Clock cycle & instruction timing See 8086: http://www.oocities.org/mc_introtocomputers/instruction_timing.pdf
Lab Session 08. To understand the use of Shift and Rotate instructions. To be able to differentiate between Arithmetic shift and Logical shift.
Lab Session 08 Objective: Theory: To understand the use of Shift and Rotate instructions. To be able to differentiate between Arithmetic shift and Logical shift. Shift and Rotate Instructions Along with
Overview of Assembly Language
Overview of Assembly Language Chapter 9 S. Dandamudi Outline Assembly language statements Data allocation Where are the operands? Addressing modes» Register» Immediate» Direct» Indirect Data transfer instructions
Shift and Rotate Instructions
Shift and Rotate Instructions Computer Organization and Assembly Language Computer Science Department National University of Computer and Emerging Sciences Islamabad Shift and Rotate Instructions Computer
Basic Pentium Instructions. October 18
Basic Pentium Instructions October 18 CSC201 Section 002 Fall, 2000 The EFLAGS Register Bit 11 = Overflow Flag Bit 7 = Sign Flag Bit 6 = Zero Flag Bit 0 = Carry Flag "Sets the flags" means sets OF, ZF,
ECOM Computer Organization and Assembly Language. Computer Engineering Department CHAPTER 7. Integer Arithmetic
ECOM 2325 Computer Organization and Assembly Language Computer Engineering Department CHAPTER 7 Integer Arithmetic Presentation Outline Shift and Rotate Instructions Shift and Rotate Applications Multiplication
8086 Programming. Multiplication Instructions. Multiplication can be performed on signed and unsigned numbers.
Multiplication Instructions 8086 Programming Multiplication can be performed on signed and unsigned numbers. MUL IMUL source source x AL source x AX source AX DX AX The source operand can be a memory location
Chapter 12. Selected Pentium Instructions
Chapter 12 Selected Pentium Instructions 1 2 Chapter 12 12 1 Carry flag indicates out-of-range error for unsigned operations. Chapter 12 3 12 2 Overflow flag indicates out-of-range error for signed operations.
Language of x86 processor family
Assembler lecture 2 S.Šimoňák, DCI FEEI TU of Košice Language of x86 processor family Assembler commands: instructions (processor, instructions of machine language) directives (compiler translation control,
CMSC 313 Lecture 07. Short vs Near Jumps Logical (bit manipulation) Instructions AND, OR, NOT, SHL, SHR, SAL, SAR, ROL, ROR, RCL, RCR
CMSC 313 Lecture 07 Short vs Near Jumps Logical (bit manipulation) Instructions AND, OR, NOT, SHL, SHR, SAL, SAR, ROL, ROR, RCL, RCR More Arithmetic Instructions NEG, MUL, IMUL, DIV Indexed Addressing:
Q1: Multiple choice / 20 Q2: Protected mode memory accesses
16.317: Microprocessor-Based Systems I Summer 2012 Exam 2 August 1, 2012 Name: ID #: For this exam, you may use a calculator and one 8.5 x 11 double-sided page of notes. All other electronic devices (e.g.,
Microprocessor & Computer Architecture / Lecture
4- Shift and Rotate Instructions Shift and rotate instructions manipulate binary numbers at the binary bit level, as did the AND, OR, Exclusive-OR, and NOT instructions. The microprocessor contains a complete
Basic Assembly SYSC-3006
Basic Assembly Program Development Problem: convert ideas into executing program (binary image in memory) Program Development Process: tools to provide people-friendly way to do it. Tool chain: 1. Programming
Week /8086 Microprocessor Programming I
Week 4 8088/8086 Microprocessor Programming I Example. The PC Typewriter Write an 80x86 program to input keystrokes from the PC s keyboard and display the characters on the system monitor. Pressing any
Defining and Using Simple Data Types
85 CHAPTER 4 Defining and Using Simple Data Types This chapter covers the concepts essential for working with simple data types in assembly-language programs The first section shows how to declare integer
Instructions moving data
do not affect flags. Instructions moving data mov register/mem, register/mem/number (move data) The difference between the value and the address of a variable mov al,sum; value 56h al mov ebx,offset Sum;
Computer Department Chapter 7. Created By: Eng. Ahmed M. Ayash Modified and Presented by: Eng. Eihab S. El-Radie. Chapter 7
Islamic University Of Gaza Assembly Language Faculty of Engineering Discussion Computer Department Chapter 7 Created By: Eng. Ahmed M. Ayash Modified and Presented by: Eng. Eihab S. El-Radie Chapter 7
CMSC 313 Lecture 05 [draft]
![CMSC 313 Lecture 05 [draft]](/thumbs/75/71799209.jpg "CMSC 313 Lecture 05 [draft]")
CMSC 313 Lecture 05 [draft] More on Conditional Jump Instructions Short Jumps vs Near Jumps Using Jump Instructions Logical (bit manipulation) Instructions AND, OR, NOT, SHL, SHR, SAL, SAR, ROL, ROR, RCL,
Islamic University Gaza Engineering Faculty Department of Computer Engineering ECOM 2125: Assembly Language LAB
Islamic University Gaza Engineering Faculty Department of Computer Engineering ECOM 2125: Assembly Language LAB Lab # 9 Integer Arithmetic and Bit Manipulation April, 2014 1 Assembly Language LAB Bitwise
Bit Operations. Ned Nedialkov. McMaster University Canada. SE 3F03 February 2014
Bit Operations Ned Nedialkov McMaster University Canada SE 3F03 February 2014 Outline Logical shifts Arithmetic shifts Rotate shifts Where are rotate shifts used? Bitwise operations Bit operations in C
Integer Arithmetic. Shift and rotate. Overview. Shift and Rotate Instructions
Overview Integer Arithmetic Shift and rotate instructions and their applications Multiplication and division instructions Extended addition and subtraction Computer Organization and Assembly Languages
8088/8086 Programming Integer Instructions and Computations
Unit3 reference 2 8088/8086 Programming Integer Instructions and Computations Introduction Up to this point we have studied the software architecture of the 8088 and 8086 microprocessors, their instruction
Assembly Language LAB
Assembly Language LAB Islamic University Gaza Engineering Faculty Department of Computer Engineering 2013 ECOM 2125: Assembly Language LAB Created by: Eng. Ahmed M. Ayash Modified and Presented By: Eihab
SPRING TERM BM 310E MICROPROCESSORS LABORATORY PRELIMINARY STUDY
BACKGROUND 8086 CPU has 8 general purpose registers listed below: AX - the accumulator register (divided into AH / AL): 1. Generates shortest machine code 2. Arithmetic, logic and data transfer 3. One
SOEN228, Winter Revision 1.2 Date: October 25,
SOEN228, Winter 2003 Revision 1.2 Date: October 25, 2003 1 Contents Flags Mnemonics Basic I/O Exercises Overview of sample programs 2 Flag Register The flag register stores the condition flags that retain
Integer Arithmetic. Pu-Jen Cheng. Adapted from the slides prepared by Kip Irvine for the book, Assembly Language for Intel-Based Computers, 5th Ed.
Computer Organization & Assembly Languages Integer Arithmetic Pu-Jen Cheng Adapted from the slides prepared by Kip Irvine for the book, Assembly Language for Intel-Based Computers, 5th Ed. Chapter Overview
Lecture Notes on Assembly Language - J. Vaughan
Lecture Notes on Assembly Language - 18. Shifts and Rotates SHL, SHR: Bitwise Logical Shifts SHL r/m8,1 ; D0 /4 SHL r/m8,cl ; D2 /4 SHL r/m8,imm8 SHL r/m16,1 ; C0 /4 ib ; o16 D1 /4 SHL r/m16,cl ; o16 D3
Chapter 7 Integer Arithmetic
Chapter 7 Integer Arithmetic 7.1 Introduction 193 7.2 Shift and Rotate Instructions 194 7.2.1 Logical Shifts and Arithmetic Shifts 194 7.2.2 SHL Instruction 195 7.2.3 SHR Instruction 196 7.2.4 SAL and
Q1: Multiple choice / 20 Q2: Memory addressing / 40 Q3: Assembly language / 40 TOTAL SCORE / 100
16.317: Microprocessor-Based Systems I Summer 2012 Exam 1 July 20, 2012 Name: ID #: For this exam, you may use a calculator and one 8.5 x 11 double-sided page of notes. All other electronic devices (e.g.,
EECE.3170: Microprocessor Systems Design I Spring 2016
EECE.3170: Microprocessor Systems Design I Spring 2016 Exam 1 Solution 1. (20 points, 5 points per part) Multiple choice For each of the multiple choice questions below, clearly indicate your response
Computer Architecture and System Programming Laboratory. TA Session 3
Computer Architecture and System Programming Laboratory TA Session 3 Stack - LIFO word-size data structure STACK is temporary storage memory area register points on top of stack (by default, it is highest
Signed number Arithmetic. Negative number is represented as
Signed number Arithmetic Signed and Unsigned Numbers An 8 bit number system can be used to create 256 combinations (from 0 to 255), and the first 128 combinations (0 to 127) represent positive numbers
22 Assembly Language for Intel-Based Computers, 4th Edition. 3. Each edge is a transition from one state to another, caused by some input.
22 Assembly Language for Intel-Based Computers, 4th Edition 6.6 Application: Finite-State Machines 1. A directed graph (also known as a diagraph). 2. Each node is a state. 3. Each edge is a transition
Computer Architecture and Assembly Language. Practical Session 3
Computer Architecture and Assembly Language Practical Session 3 Advanced Instructions division DIV r/m - unsigned integer division IDIV r/m - signed integer division Dividend Divisor Quotient Remainder
Kingdom of Saudi Arabia Ministry of Higher Education. Taif University. Faculty of Computers & Information Systems
Kingdom of Saudi Arabia Ministry of Higher Education Taif University Faculty of Computers & Information Systems المملكة العربية السعودية وزارة التعليم العالي جامعة الطاي ف آلية الحاسبات ونظم المعلومات
Section 001. Read this before starting!
Points missed: Student's Name: Total score: /100 points East Tennessee State University Department of Computer and Information Sciences CSCI 2150 (Tarnoff) Computer Organization TEST 3 for Fall Semester,
Week /8086 Microprocessor Programming II
Week 5 8088/8086 Microprocessor Programming II Quick Review Shift & Rotate C Target register or memory SHL/SAL 0 C SHR 0 SAR C Sign Bit 2 Examples Examples Ex. Ex. Ex. SHL dest, 1; SHL dest,cl; SHL dest,
16.317: Microprocessor Systems Design I Fall 2013
16.317: Microprocessor Systems Design I Fall 2013 Exam 1 Solution 1. (20 points, 5 points per part) Multiple choice For each of the multiple choice questions below, clearly indicate your response by circling
Integer Arithmetic. Computer Organization and Assembly Languages Yung-Yu Chuang 2005/11/17. with slides by Kip Irvine
Integer Arithmetic Computer Organization and Assembly Languages Yung-Yu Chuang 2005/11/17 with slides by Kip Irvine Announcements Assignment #2 is due next week. Assignment #3 box filter is online now,
EXPERIMENT WRITE UP. LEARNING OBJECTIVES: 1. Get hands on experience with Assembly Language Programming 2. Write and debug programs in TASM/MASM
EXPERIMENT WRITE UP AIM: Assembly language program for 16 bit BCD addition LEARNING OBJECTIVES: 1. Get hands on experience with Assembly Language Programming 2. Write and debug programs in TASM/MASM TOOLS/SOFTWARE
Lecture (08) x86 programming 7
Lecture (08) x86 programming 7 By: Dr. Ahmed ElShafee 1 Conditional jump: Conditional jumps are executed only if the specified conditions are true. Usually the condition specified by a conditional jump
EEM336 Microprocessors I. Arithmetic and Logic Instructions
EEM336 Microprocessors I Arithmetic and Logic Instructions Introduction We examine the arithmetic and logic instructions. The arithmetic instructions include addition, subtraction, multiplication, division,
Jones & Bartlett Learning, LLC NOT FOR SALE OR DISTRIBUTION 80x86 Instructions
80x86 Instructions Chapter 4 In the following sections, we review some basic instructions used by the 80x86 architecture. This Jones is by & no Bartlett means a Learning, complete list LLC of the Intel
Q1: Multiple choice / 20 Q2: Data transfers and memory addressing
16.317: Microprocessor Systems Design I Fall 2014 Exam 1 October 1, 2014 Name: ID #: For this exam, you may use a calculator and one 8.5 x 11 double-sided page of notes. All other electronic devices (e.g.,
Selected Pentium Instructions. Chapter 12 S. Dandamudi
Selected Pentium Instructions Chapter 12 S. Dandamudi Outline Status flags Zero flag Carry flag Overflow flag Sign flag Auxiliary flag Parity flag Arithmetic instructions Multiplication instructions Division
Step 1: Add the least significant digits together: produces with carry 1.
Advanced Arithmetic Advanced Arithmetic Chapter Four 41 Chapter Overview This chapter deals with those arithmetic operations for which assembly language is especially well suited and high level languages
Read this before starting!
Points missed: Student's Name: Total score: /100 points East Tennessee State University Department of Computer and Information Sciences CSCI 2150 (Tarnoff) Computer Organization TEST 3 for Fall Semester,
CS24: INTRODUCTION TO COMPUTING SYSTEMS. Spring 2017 Lecture 5
CS24: INTRODUCTION TO COMPUTING SYSTEMS Spring 2017 Lecture 5 LAST TIME Began exploring x86-64 instruction set architecture 16 general-purpose registers Also: All registers are 64 bits wide rax-rdx are
Assembler lecture 4 S.Šimoňák, DCI FEEI TU of Košice
Assembler lecture 4 S.Šimoňák, DCI FEEI TU of Košice Addressing data access specification arrays - specification and manipulation impacts of addressing to performance Processor architecture CISC (more
CS220 Logic Design AS06-Advanced Assembly. AS06-Advanced Assembly Shift Operations. AS06-Advanced Assembly Shift Operations
CS220 Logic Design Outline Bit Shifting Instructions Boolean Bitwise Operations Floating Point Numbers 1 The shl and shr instructions perform logical left and right shifts respectively. New, incoming bits
Selection and Iteration. Chapter 7 S. Dandamudi
Selection and Iteration Chapter 7 S. Dandamudi Outline Unconditional jump Compare instruction Conditional jumps Single flags Unsigned comparisons Signed comparisons Loop instructions Implementing high-level
Section 001. Read this before starting!
Points missed: Student's Name: Total score: /100 points East Tennessee State University -- Department of Computer and Information Sciences CSCI 2150 Computer Organization Final Exam for Spring Semester,
CSC 2400: Computer Systems. Towards the Hardware: Machine-Level Representation of Programs
CSC 2400: Computer Systems Towards the Hardware: Machine-Level Representation of Programs Towards the Hardware High-level language (Java) High-level language (C) assembly language machine language (IA-32)
Chapter 6 (Part a) Conditional Processing
Islamic University Gaza Engineering Faculty Department of Computer Engineering ECOM 2025: Assembly Language Discussion Chapter 6 (Part a) Conditional Processing Eng. Eman R. Habib April, 2014 2 Assembly
CS 24: INTRODUCTION TO. Spring 2015 Lecture 2 COMPUTING SYSTEMS
CS 24: INTRODUCTION TO Spring 2015 Lecture 2 COMPUTING SYSTEMS LAST TIME! Began exploring the concepts behind a simple programmable computer! Construct the computer using Boolean values (a.k.a. bits )
CSC 8400: Computer Systems. Machine-Level Representation of Programs
CSC 8400: Computer Systems Machine-Level Representation of Programs Towards the Hardware High-level language (Java) High-level language (C) assembly language machine language (IA-32) 1 Compilation Stages
Conditional Processing
١ Conditional Processing Computer Organization & Assembly Language Programming Dr Adnan Gutub aagutub at uqu.edu.sa Presentation Outline [Adapted from slides of Dr. Kip Irvine: Assembly Language for Intel-Based
Section 002. Read this before starting!
Points missed: Student's Name: _ Total score: /100 points East Tennessee State University -- Department of Computer and Information Sciences CSCI 2150 Computer Organization Final Exam for Fall Semester,
6.1 The 80x86 Flags Register Flags. 6.1 Which flags are the condition codes?
Thi d t t d ith F M k 4 0 2 The 80x86 Instruction Set Lab Manual, Chapter Six The Intel 80x86 processor family supports a wide variation of machine instructions. You can perform many operations with several
Week /8086 Microprocessor Programming
Week 5 8088/8086 Microprocessor Programming Multiplication and Division Multiplication Multiplicant Operand Result (MUL or IMUL) (Multiplier) Byte * Byte AL Register or memory Word * Word AX Register or
/ 30 Q3: Arithmetic instructions / 30 Q4: Logical instructions / 20 TOTAL SCORE / 100 Q5: EXTRA CREDIT / 10
EECE.3170: Microprocessor Systems Design I Spring 2016 Exam 1 February 19, 2016 Name: Section (circle 1): 201 (MWF 9-9:50) 202 (MWF 10-10:50) For this exam, you may use a calculator and one 8.5 x 11 double-sided
8086 INSTRUCTION SET
8086 INSTRUCTION SET Complete 8086 instruction set Quick reference: AAA AAD AAM AAS ADC ADD AND CALL CBW CLC CLD CLI CMC CMP CMPSB CMPSW CWD DAA DAS DEC DIV HLT IDIV IMUL IN INC INT INTO I JA JAE JB JBE
Assembly Language Lab # 4 Data Transfer & Arithmetic (1)
Faculty of Engineering Computer Engineering Department Islamic University of Gaza 2011 Assembly Language Lab # 4 Data Transfer & Arithmetic (1) Eng. Mohammad Elhindi Assembly Language Lab # 4 Data Transfer
Lecture 2 Assembly Language
Lecture 2 Assembly Language Computer and Network Security 9th of October 2017 Computer Science and Engineering Department CSE Dep, ACS, UPB Lecture 2, Assembly Language 1/37 Recap: Explorations Tools assembly
Faculty of Engineering Computer Engineering Department Islamic University of Gaza Assembly Language Lab # 2 Assembly Language Fundamentals
Faculty of Engineering Computer Engineering Department Islamic University of Gaza 2011 Assembly Language Lab # 2 Assembly Language Fundamentals Assembly Language Lab # 2 Assembly Language Fundamentals
Lab 3. The Art of Assembly Language (II)
Lab. The Art of Assembly Language (II) Dan Bruce, David Clark and Héctor D. Menéndez Department of Computer Science University College London October 2, 2017 License Creative Commons Share Alike Modified
Basic operators, Arithmetic, Relational, Bitwise, Logical, Assignment, Conditional operators. JAVA Standard Edition
Basic operators, Arithmetic, Relational, Bitwise, Logical, Assignment, Conditional operators JAVA Standard Edition Java - Basic Operators Java provides a rich set of operators to manipulate variables.
Section 001 & 002. Read this before starting!
Points missed: Student's Name: Total score: /100 points East Tennessee State University Department of Computer and Information Sciences CSCI 2150 (Tarnoff) Computer Organization TEST 3 for Spring Semester,
CS401 Assembly Language Solved MCQS From Midterm Papers
CS401 Assembly Language Solved MCQS From Midterm Papers May 14,2011 MC100401285 Moaaz.pk@gmail.com MC100401285@gmail.com PSMD01(IEMS) Question No:1 ( Marks: 1 ) - Please choose one The first instruction
Ex: Write a piece of code that transfers a block of 256 bytes stored at locations starting at 34000H to locations starting at 36000H. Ans.
INSTRUCTOR: ABDULMUTTALIB A H ALDOURI Conditional Jump Cond Unsigned Signed = JE : Jump Equal JE : Jump Equal ZF = 1 JZ : Jump Zero JZ : Jump Zero ZF = 1 JNZ : Jump Not Zero JNZ : Jump Not Zero ZF = 0
Arithmetic Logic Unit
Arithmetic Logic nit The arithmetic logic unit AL performs arithmetic, logic and shift operations. It is composed of three blocks namely the logic, arithmetic and shift blocks. Each block performs different
Assembly Language: IA-32 Instructions
Assembly Language: IA-32 Instructions 1 Goals of this Lecture Help you learn how to: Manipulate data of various sizes Leverage more sophisticated addressing modes Use condition codes and jumps to change
It is possible to define a number using a character or multiple numbers (see instruction DB) by using a string.
1 od 5 17. 12. 2017 23:53 (https://github.com/schweigi/assembler-simulator) Introduction This simulator provides a simplified assembler syntax (based on NASM (http://www.nasm.us)) and is simulating a x86
CS401 Assembly Language Solved Subjective MAY 03,2012 From Midterm Papers. MC
CS401 Assembly Language Solved Subjective MAY 03,2012 From Midterm Papers MC100401285 Moaaz.pk@gmail.com Mc100401285@gmail.com PSMD01 MIDTERM FALL 2011 CS401 Assembly Language Q: Affected flag of AND operation
ENE 334 Microprocessors
Page 1 ENE 334 Microprocessors Lecture 10: MCS-51: Logical and Arithmetic : Dejwoot KHAWPARISUTH http://webstaff.kmutt.ac.th/~dejwoot.kha/ ENE 334 MCS-51 Logical & Arithmetic Page 2 Logical: Objectives
Intel 8086: Instruction Set
IUST-EE (Chapter 6) Intel 8086: Instruction Set 1 Outline Instruction Set Data Transfer Instructions Arithmetic Instructions Bit Manipulation Instructions String Instructions Unconditional Transfer Instruction
Marking Scheme. Examination Paper. Module: Microprocessors (630313)
Philadelphia University Faculty of Engineering Marking Scheme Examination Paper Department of CE Module: Microprocessors (630313) Final Exam Second Semester Date: 12/06/2017 Section 1 Weighting 40% of
UNIT II 16 BIT MICROPROCESSOR INSTRUCTION SET AND ASSEMBLY LANGUAGE PROGRAMMING. The Intel 8086 Instruction Set
UNIT II 16 BIT MICROPROCESSOR INSTRUCTION SET AND ASSEMBLY LANGUAGE PROGRAMMING The Intel 8086 Instruction Set 1.Explain Addressing Modes of 8086? ADDRESSING MODES Implied - the data value/data address
Changes made in this version not seen in first lecture:
bitwise operators 1 Changelog 1 Changes made in this version not seen in first lecture: 6 Feb 2018: arithmetic right shift: x86 arith. shift instruction is sar to sra 6 Feb 2018: logical left shift: use
Assembly Language Lab # 6
Faculty of Engineering Computer Engineering Department Islamic University of Gaza 2011 Assembly Language Lab # 6 Boolean Instructions and Conditional Structured Eng. Doaa Abu Jabal Objective: Assembly
International Islamic University Chittagong (IIUC) Department of Electrical and Electronic Engineering (EEE)
International Islamic University Chittagong (IIUC) Department of Electrical and Electronic Engineering (EEE) EEE-3506: Microprocessor and Interfacing Sessional Experiment No. 05: Program control instructions
8086 INTERNAL ARCHITECTURE
8086 INTERNAL ARCHITECTURE Segment 2 Intel 8086 Microprocessor The 8086 CPU is divided into two independent functional parts: a) The Bus interface unit (BIU) b) Execution Unit (EU) Dividing the work between
X86 Addressing Modes Chapter 3" Review: Instructions to Recognize"
X86 Addressing Modes Chapter 3" Review: Instructions to Recognize" 1 Arithmetic Instructions (1)! Two Operand Instructions" ADD Dest, Src Dest = Dest + Src SUB Dest, Src Dest = Dest - Src MUL Dest, Src
Internal architecture of 8086
Case Study: Intel Processors Internal architecture of 8086 Slide 1 Case Study: Intel Processors FEATURES OF 8086 It is a 16-bit μp. 8086 has a 20 bit address bus can access up to 220 memory locations (1
Marking Scheme. Examination Paper Department of CE. Module: Microprocessors (630313)
Philadelphia University Faculty of Engineering Marking Scheme Examination Paper Department of CE Module: Microprocessors (630313) Final Exam Second Semester Date: 02/06/2018 Section 1 Weighting 40% of
Chapter 4. Operations on Data
Chapter 4 Operations on Data 1 OBJECTIVES After reading this chapter, the reader should be able to: List the three categories of operations performed on data. Perform unary and binary logic operations
UNIT II. 2 Marks. 2. List out the various register of IA- 32 Register structure. 3. Write about General purpose registers
UNIT II The IA-32 Pentium Example: Registers and Addressing, IA-32 Instructions, IA-32 Assembly Language, Program Flow Control, Logic and Shift/Rotate Instructions, I/O Operations, Subroutines, Other Instructions,
Architecture and components of Computer System Execution of program instructions
Execution of program instructions Microprocessor realizes each program instruction as the sequence of the following simple steps: 1. fetch next instruction or its part from memory and placing it in the
Lecture Topics. Announcements. Today: Integer Arithmetic (P&H ) Next: continued. Consulting hours. Introduction to Sim. Milestone #1 (due 1/26)
Lecture Topics Today: Integer Arithmetic (P&H 3.1-3.4) Next: continued 1 Announcements Consulting hours Introduction to Sim Milestone #1 (due 1/26) 2 1 Overview: Integer Operations Internal representation
Assembly Language LAB
Assembly Language LAB Islamic University Gaza Engineering Faculty Department of Computer Engineering 2013 ECOM 2125: Assembly Language LAB Eng. Ahmed M. Ayash Lab # 3 Data Transfer & Arithmetic February
Arithmetic Instructions
Segment 3C Arithmetic Instructions This topic covers the following instructions: Addition (ADD, INC, ADC) Subtraction (SUB, DEC, SBB,CMP) Multiplication (MUL, IMUL) Division (DIV, IDIV) BCD Arithmetic
Computer Architecture and Organization: L04: Micro-operations
Computer Architecture and Organization: L4: Micro-operations By: A. H. Abdul Hafez Abdul.hafez@hku.edu.tr, ah.abdulhafez@gmail.com, hafez@research.iiit.ac.in 1 Outlines 1. Arithmetic microoperation 2.