TUTORIAL Assembly Language programming (2)

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1 8051 Assembly Language programming (2) TUTORIAL 4 EEE3410 Microcontroller Applications 1. Write the instructions to move value 34h into register A and value 3Fh into register B, then add them together. A, #34h B, #37h ADD A,B 2. Write the instructions to add the values 16h and CDh. Place the result in register R2. R2, #0CDh A, #16h ADD A,R2 R2,A 3. The instruction ADD A, source places the sum in _register A. A, source + A A 4. Why is the following ADD instruction illegal? ADD R1, R2 Rewrite the instruction above in correct form. The destination address must be A. (ADD Rn, Rn is invalid) A,R2 ADD A,R1 R1,A 5. The instruction ADDC A, source places the sum in. Register A, ADD with carry, Source + A + Carry A 6. Find the value of the A and CY flags in each of the following. (a) A, #4Fh (b) A, #9Ch ADD A, #0B1h ADD A, #63h (a) A = 00, CY=1 Since 4Fh + B1h = = (b) A = FF, CY=0 Since 9Ch + 63h = = Show how the CPU would subtract 05h from 43h. 43h 05h Add 2 s complement of 05H to 43h CLR C A, #43h SUBB A,#05h ; 2 complement of representation for 05 (10) = (2) ; ; ; ; ; CY=0 (step 3), A=3Eh Tutorial 4 Week 6 1

2 8. If CY = 1, A = 95h, and B = 4Fh prior to the execution of SUBB A, B, what will be the contents of A after the subtraction? SETB C A,#95h B,#4Fh SUBB A,B A = 95h 4Fh 1 (Carry) = 46h -1 = 45h 9. In multiplication of two bytes in the 8051, we must place one byte in register and the other byte in register. Register A and Register B, MUL AB 10. In unsigned byte by byte multiplication, the product will be placed in register(s). MUL AB : A x B AB (16 bits) 11. Is this a valid 8051 instruction? Explain your answer. MUL A, R1. The source addresses of Multiplication Operation must be in A and B 12. In byte/byte division, the numerator must be placed in register and the denominator in register. Register A and Register B, DIV AB 13. In unsigned byte/byte division, the quotient will be placed in register and the remainder in register. DIV AB : A / B AB, Quotient A, Remainder B 14. Is this valid 8051 instruction? Explain your answer. DIV A, R1. The source addresses of Division Operation must be in A and B 15. In an 8-bit operand, bit is used for the sign bit. Bit Convert 16h to its 2 s complement representation. +16h= , 1 s complement= , 2 s complement = = The range of byte-sized signed operands is to to +127 (2 s complement refer to teaching slide chapter 3) 18. Explain the difference between a carry and an overflow. CY : Carry Flag; used in arithmetic, JUMP, ROTATE, and BOOLEAN instruction Unsigned arithmetic OV : Overflow flag; used in arithmetic instructions (signed arithmetic) 19. Find the content of register A after the following code in each case. (a) A, #37h (b) A, #37h (c) A, #37h ANL A, #0CAh ORL A, #0CAh XRL A, #0CAh (a) A, #37h ANL A, #0CAh A = 02h (b) A, #37h ORL A, #0CAh A = FFh (c) A, #37h XRL A, #0CAh A = FDh 20. To mask certain bits of the accumulator we must ANL it with. ZERO 21. To set certain bits of the accumulator to 1 we must ORL it with. 2 Week 6 Tutorial 4

3 EEE3410 Microcontroller Applications ONE 22. Perform XRL operation on an operand with itself results in. ZERO 23. Find contents of register A after execution of the following code. CLR A ORL A, #99h CPL A CLR A 0h ORL A, #99h 99h CPL A 66h 24. What is the value of register A after each execution of the following instructions? (a) A, #25h (b) A, #A2h (c) CLR A RR A RL A SETB C RR A RL A RRC A RR A RL A SETB C RR A RL A RRC A A, #25h 25h A, #A2h A2h CLR A 0h RR A 92h RL A 45h SETB C 0h RR A 49h RL A 8Ah RRC A 80h RR A A4h RL A 15h SETB C 80h RR A 52h RL A 2Ah RRC A C0h 25. Why does RLC R1 give an error in the 8051? The source address of RLC operation must be in A 26. What is in register A after the execution of the following code? A, #85h SWAP A ANL A, #0F0h A, #85h SWAP A /* 58h ANL A, #0F0h /* 50h 27. The instruction A, 40h uses addressing mode. Why? Direct Addressing Mode 28. Which registers are allowed to be used for register indirect addressing mode if the data is in on-chip RAM? R0 & R1 29. Identify the addressing mode for each of the following: (a) B, #34h (b) A, 50h (c) R2, 07 (d) R3, #0 (e) R7, 0 (f) R6, #7Fh (g) R0, A (h) B, A (i) (a) Immediate (b) Direct (c) Direct (d) Immediate (e) Direct (f) Immediate (g) Register (h) Register (i) Indirect 30. Compare the following 8051 instructions in terms of the number of bytes per instruction, machine cycle per instruction and effective jump address range. (a) SJMP (b) AJMP (c) LJMP Tutorial 4 Week 6 3

4 Bytes Machine Cycles SJMP 2 2 Relative: Program counter + offset = Effective address = address of next instruction AJMP 2 2 Absolute 2K LJMP 3 2 Long 64K 31. Assume that 5 binary data items are stored in RAM locations starting at 40h, as shown below. Write a program to find the sum of all the numbers. The result then is stored in RAM location 50h. RAM location 40h = (71) RAM location 41h = (11) RAM location 42h = (65) RAM location 43h = (59) RAM location 44h = (37) ANS: ORG 0H SUM_HB EQU 51H ;HIGN BYTE SUM_LB EQU 50H ; LOW BYTE 40H,#71 41H,#11 42H,#65 43H,#59 44H,#37 SUM_HB,#0 SUM_LB,#0 A,SUM_LB R0,#40H CONTINUE: ADD A,@R0 JNC NO_CY_OCCUR INC SUM_HB NO_CY_OCCUR: INC R0 CJNE R0,#45H,CONTINUE SUM_LB,A ; SAVE nop END 4 Week 6 Tutorial 4

5 EEE3410 Microcontroller Applications 32. If the 5 binary data items in Q31 are in BCD format, write a program to find the sum of all the numbers. The result must be in BCD format and is stored in RAM location 50h. ORG 0H SUM_HB EQU 51H SUM_LB EQU 50H CONTINUE: ACALL ; return in ACC 40H,#71 41H,#11 42H,#65 43H,#59 44H,#37 SUM_HB,#0 SUM_LB,#0 A,SUM_LB R0,#40H A,@R0 TO_BCD ADD A,SUM_LB DA A JNC NO_CY_OCCUR INC SUM_HB NO_CY_OCCUR: SUM_LB,A ;SAVE INC R0 CJNE R0,#45H,CONTINUE NOP SJMP $ TO_BCD: ; input :ACC, output ACC ;eg. input ACC=71 decimal ;output Acc=71H B,#10 ;eg. ACC=71 DIV AB ;eg. A=7 B=1 END R7,B ;eg. R7=1 B,#16 ; MUL AB ; A=70H, B=0H ADD A,R7 ; A=71H RET -- END -- Tutorial 4 Week 6 5

Microprocessors 1. The 8051 Instruction Set. Microprocessors 1 1. Msc. Ivan A. Escobar Broitman

Microprocessors 1. The 8051 Instruction Set. Microprocessors 1 1. Msc. Ivan A. Escobar Broitman Microprocessors 1 The 8051 Instruction Set Microprocessors 1 1 Instruction Groups The 8051 has 255 instructions Every 8-bit opcode from 00 to FF is used except for A5. The instructions are grouped into