Assembler Programming. Lecture 2

Transcription

1 Assembler Programming Lecture 2

2 Lecture family architecture. From 8086 to Pentium4. Registers, flags, memory organization. Logical, physical, effective address. Addressing modes.

3 Processor Processor is the device that manages all actions and services in the system. Processor handles synchronous and asynchronous events. All those actions processor handles executing the programs or the procedures.

4 8086 family processors evolution 8086 real mode only, 16-bit, 1MB addressing real mode only, 16-bit, 1MB real and protected mode, 16-bit, 16MB real and protected mode, 32-bit, 4GB. i486 real and protected mode, 32-bit, 4GB. Pentium real and protected, 32-bit, 4GB. Pentium Pro real and protected, 32-bit, 64GB. Pentium II real and protected, 32-bit, 64GB. Pentium III real and protected, 32-bit, 64GB. Pentium 4 real and protected, 32-bit, 64GB.

5 8086 architecture general purpose registers AH AX AL SI BH BX BL DI CH CX CL BP DX DH DL

6 8086 architecture special purpose registers SP IP Carry Parity Auxiliary Carry Zero Sign Trace Interrupt Direction Overflow Flags OF DF IF TF SF ZF AF PF CF

7 8086 architecture segment registers CS DS ES SS

8 Real mode registers EAX AH AX AL ESI SI EBX BH BX BL EDI DI ECX CH CX CL EBP BP EDX DH DX DL ESP SP

9 EIP and extended flag register EIP IP I/O Privilege Level Nested Task Resume Flag Virtual Mode Alignment Check Virt. Interrupt Flag Virt. Interrupt Pending Identification EFlags ID VIP VIF AC VM RF NT PL PL OFDF IF TF SF ZF AF PF CF

10 80386 segment registers CS DS ES FS GS SS

11 Other registers has registers for protected mode operation. i486 and above has math coprocessor s registers. Pentium and above has multimedia extension registers for MMX. Pentium4 has another multimedia registers for SSE.

12 Memory addressing in real mode Memory is organized in segments for 16-bit real mode segments size is 64kB, for 32-bit mode segments size is 4GB. Logical address consists of two values segment address, offset within segment. Logical address is recalculated into linear address which in real mode corresponds to the physical address of the memory.

13 Real address calculating Segment (16 bit) Shift left 4 bits Segment Fill with four zeros + Offset (16 bit) Add Offset value Linear address (20 bit)

14 Segmented addressing CS DS SS Code Segment Data Segment Stack Segment ES FS GS Data Segment Data Segment Data Segment

15 Addressing modes Instructions usually have the operands. the right operand is the source, the left operand is the destination. Operands can be of one of the types: register, immediate, direct memory, indirect memory. In the examples we will use mov instruction.

16 8086 register addressing mov ax, bx mov dl, al mov si, dx mov sp, bp mov dh, cl mov ax, ax mov ax, cs mov ds, ax

17 8086 immediate values Immediate value is a constant or result of constant expression. It is calculated during assembling. It is placed in the code as part of the instruction. mov ax, A mov ax, 0 mov bx, 12*7

18 8086 memory addressing Direct memory addressing (displacement only). Indirect memory addressing. Base addressing. Index addressing. Base addressing with indexing. Base addressing with indexing and displacement.

19 8086 direct memory addressing Specifies the data at given address mov ax, variable mov ax, [variable] mov si, ES:[variable] mov di, ES:[100]

20 8086 direct memory addressing BL mov ds:[0800h], bl one byte 0800h mov ax, ds:[0600h] high byte 0601h low byte 0600h AX

21 Indirect memory addressing Address of the data is held in the base or index register. While BX, SI or DI is used the processor as a default takes DS segment register. While BP is used the processor takes SS segment register. mov ax, [bx] mov ax, [bp] mov al, [di] mov ah, [si]

22 Indirect memory addressing mov al, [bx] data AL BX + DS

23 Base memory addressing Address of the beggining of the data table is held in the base register. Displacement inside the table is a constant. All of the following variations are legal: mov ax, element[bx] mov ax, [bx+element] mov ax, [bx]+element

24 Base memory addressing mov al, [bx]+element data AL element + BX + table beginning DS

25 Index memory addressing Address of the data table is a constant. Number of the element (byte) is held in the index register. All of the following variations are legal: mov ax, table[si] mov ax, [si+table] mov ax, [si]+table

26 Index memory addressing mov al, table[di] data AL DI + table + table beginning DS

27 Base memory addressing with indexing Address of the data table is held in the base register. Number of the element (byte) is held in the index register. All of the following variations are legal: mov ax, [bx][si] mov ax, [bx+si] mov ax, [si][bx]

28 Base memory addressing with indexing mov al, [bp][di] data AL DI BP + + base address SS

29 Base memory addressing with indexing It s illegal to use two registers of the same type. Only the following register variations are possible: mov ax, [bx][si] mov ax, [bx][di] mov ax, [bp][si] mov ax, [bp][di]

30 Base memory addressing with indexing and displacement Address of the data table is an constant. Displacment of the structure is held in the base register. Number of element in the structure (byte) is held in the index register. All of the following variations are legal: mov ax, table[bx][di] mov ax, table[di][bx] mov ax, table[bx+di] mov ax, [table+bx+di] mov ax, [bx][di]+table

31 Base memory addressing with indexing and displacement mov al, table[bx][si] SI BX + + data AL structure address table + table address DS

32 Additional notes Calculated offset is called effective address. Different addressing modes have different timings. More complicated modes take much time. If effective address is greater than 0FFFFh the carry bit is ignored. Constant displacement is a 8-bit or 16-bit signed value. Using 8-bit value is faster.

33 80386 register addressing The same as in 8086 with additional 32-bit registers. Only lower 16-bit half of 32-bit registers is accessible directly. mov eax, ebx mov esi, edx

34 Indirect memory addressing Address of the data is held in the base and/or index register. It is possible to add the constant displacement too. Almost any of the 32-bit registers can be base or index register. ESP can be the base register only. In 16-bit addressing mode the displacement must not exceed 0FFFFh. In this mode maximum segment size is 64kB.

35 Indirect memory addressing with scaling It is very useful mode for tables containing values greater than 1 byte. Index registers can be scaled by a factor of 1, 2, 4 or 8. If the scaling factor is 1 the base register is the first used in the instruction. If EBP is scaled it s treated as index register and DS segment is used instead of SS.

36 Indirect memory addressing with scaling mov ax, [ebx][ebp] ;DS bx-base mov ax, [ebp][ebx] ;SS bp-base mov ax, [ebp][ebx*2] ;SS bp-base mov ax, [ebp*2][ebx] ;DS bx-base mov ax, [ebp*2] ;DS no base mov ax, [ebp] ;SS no index mov ax, es:[ebp][ebx*2] ;ES