BAHAR DÖNEMİ MİKROİŞLEMCİLER LAB3 FÖYÜ

Size: px
Start display at page:

Download "BAHAR DÖNEMİ MİKROİŞLEMCİLER LAB3 FÖYÜ"

Transcription

1 INTRODUCTION OF SEGMENT A typical program on 8086 consists of at least three segments Code segment: Contains instructions that accomplish certain tasks Data segment: Stores information to be processed Stack segment: Store information temporarily What is a segment? A memory block includes up to 64KB. Why? Begins on an address evenly divisible by 16, i.e., an address looks like in XXXX0H. Offset address Location within a 64 kb segment range A range from 0000H to FFFFh Physical Address 20-bit address that is actually put on the address bus A range of 1MB from 00000H to FFFFFH Actual physical location in memory Logical Address Consists of a segment value (determines the beginning of a segment) and an offset address E.g., an instruction in the code segment has a logical address in the form of CS (code segment register):ip (instruction pointer) From logical address to physical address: Shift the segment value left one hex digit (or 4 bits) Then adding the above value to the offset address One logical -> only one physical Segment range representation Maximum 64KB logical 2500: :FFFF Physical 25000H 34FFFH ( FFFF)

2 Code Segment: 8086 fetches instructions from the code segment Logical address of an instruction: CS:IP Physical address is generated to retrieve this instruction from memory Data Segment: Information to be processed is stored in the data segment Logical address of a piece of data: DS:offset o Offset value: e.g., 0000H, 23FFH o Offset registers for data segment: BX, SI and DI Physical address is generated to retrieve data (8-bit or 16-bit) from memory Data Representation in Memory: o Memory can be logically imagine as a consecutive block of bytes How to store data whose size is larger than a byte? o Little endian: the low byte of the data goes to the low memory location o Big endian: the high byte of the data goes to the low memory location o E.g., 2738H Stack Segment A section of RAM memory used by the CPU to store information temporarily o Logical address of a piece of data: SS:SP (special applications with BP) o Most registers (except segment registers and SP) inside the CPU can be stored in the stack and brought back into the CPU from the stack using push and pop, respectively

3 Extra Segment: An extra data segment, essential for string operations o Logical address of a piece of data: ES:offset o Offset value: e.g., 0000H, 23FFH o Offset registers for data segment: BX, SI and DI In Summary, 80x86 Addressing modes: 80X86 has seven distinct addressing modes: Register o Data are held within registers o No need to access memory o E.g. MOV AX, BX Immediate o The source operand is a constant o Embedded in instructions o No need to access memory o E. g. MOV AX, 2550H Direct o Data is stored in memory and the address is given in instructions o Offset address in the data segment (DS) by default o E.g. MOV DL, [2400] Register indirect o Data is stored in memory and the address is held by a register o Offset address in the data segment (DS) by default o Registers for this purpose are SI, DI, and BX o E.g. MOV AL, [BX] Based relative o Data is stored in memory and the address can be calculated with base registers BX and BP as well as a displacement value o The default segment is data segment (DS) for BX, stack segment (SS) for BP o E.g. MOV CX, [BX]+10, Indexed relative o Data is stored in memory and the address can be calculated with index registers DI and SI as well as a displacement value

4 o The default segment is data segment (DS) o E.g. MOV DX, [SI]+5, Based indexed relative o Combines based and indexed addressing modes, one base register and one index register are used o The default segment is data segment (DS) for BX, stack segment (SS) for BP o E.g. MOV CL, [BX][DI]+8, ASSEMBLY LANGUAGE PROGRAMMING Model definition Used to select the size of the memory model o. MODEL SMALL: Most widely used memory models Is sufficient for the lab programs Uses a maximum of 64kb of memory for code and another 64kb for data o. MODEL MEDIUM Data must fit into 64 kb but the code can exceed o. MODEL COMPACT Data can exceed 64 kb but the code cannot exceed o. MODEL LARGE Data and code can exceed 64 kb but no single set of data should exceed 64 kb o. MODEL HUGE

5 Data and code can exceed 64 kb data can exceed o. MODEL TINY Used with COM files, data and code must fit into 64kb SEGMENT OF A PROGRAM An assembly language program can be written only in one segment. Normally a program consist of at least three segments.stack: Defines the beginning of the stack segment o.stack 64: reserves 64 byte of memory for the stack.data: Defines the beginning of the data segment o.data DATA1 DB 52H.CODE: Defines the beginning of the code segment o.code MOV load the data segment address MOV DS, AX. LABROTORY PRELIMINARY: 1. Assume that the register have the following values CS= 1000h, DS=3000h, SS= 2000h SI=5000h, DI= 4000h, BX=7000h, BP=6800h, AX=15F0h, CX=7819h and DX=1190h calculate the physical address of memory where the operand is stored and the content of the memory location in each of the following addressing examples MOV [SI], AL MOV [SI+BX+8], AH MOV [BX], AX MOV [DI+6], BX MOV [BP][SI]+10, DX 2. Convert the following code to three segments assembly program. ORG 100H MOV AX,1F16H MOV BH, AH MOV CX, AX; MOV [1004H],AX MOV AX, [BX] MOV AX, [0000H] MOV CL, 'A' MOV AX, DATA MOV DS, AX RET DATA DB 1,2,3,4,5 ; Insert code here

6 3. What are the meaning of infix, postfix and prefix? How do you use stack while calculating them?

CC411: Introduction To Microprocessors

CC411: Introduction To Microprocessors CC411: Introduction To Microprocessors OBJECTIVES this chapter enables the student to: Describe the Intel family of microprocessors from 8085 to Pentium. In terms of bus size, physical memory & special

More information

Assembler Programming. Lecture 2

Assembler Programming. Lecture 2 Assembler Programming Lecture 2 Lecture 2 8086 family architecture. From 8086 to Pentium4. Registers, flags, memory organization. Logical, physical, effective address. Addressing modes. Processor Processor

More information

SPRING TERM BM 310E MICROPROCESSORS LABORATORY PRELIMINARY STUDY

SPRING TERM BM 310E MICROPROCESSORS LABORATORY PRELIMINARY STUDY BACKGROUND 8086 CPU has 8 general purpose registers listed below: AX - the accumulator register (divided into AH / AL): 1. Generates shortest machine code 2. Arithmetic, logic and data transfer 3. One

More information

Code segment Stack segment

Code segment Stack segment Registers Most of the registers contain data/instruction offsets within 64 KB memory segment. There are four different 64 KB segments for instructions, stack, data and extra data. To specify where in 1

More information

Chapter Three Addressing Mode MOV AX, BX

Chapter Three Addressing Mode MOV AX, BX Chapter Three The 8086 The 8086 When the 8086 executes an instruction, it performs the specified function on data. The data are called its operands and may be part of the instruction reside in one of the

More information

EC-333 Microprocessor and Interfacing Techniques

EC-333 Microprocessor and Interfacing Techniques EC-333 Microprocessor and Interfacing Techniques Lecture 4 Addressing Modes Dr Hashim Ali Spring - 2018 Department of Computer Science and Engineering HITEC University Taxila Slides taken from Computer

More information

MICROPROCESSOR PROGRAMMING AND SYSTEM DESIGN

MICROPROCESSOR PROGRAMMING AND SYSTEM DESIGN MICROPROCESSOR PROGRAMMING AND SYSTEM DESIGN ROAD MAP SDK-86 Intel 8086 Features 8086 Block Diagram 8086 Architecture Bus Interface Unit Execution Unit 8086 Architecture 8086 Programmer s Model Flag Register

More information

Chapter 3: Addressing Modes

Chapter 3: Addressing Modes Chapter 3: Addressing Modes Chapter 3 Addressing Modes Note: Adapted from (Author Slides) Instructor: Prof. Dr. Khalid A. Darabkh 2 Introduction Efficient software development for the microprocessor requires

More information

Assembly Language. Dr. Esam Al_Qaralleh CE Department Princess Sumaya University for Technology. Overview of Assembly Language

Assembly Language. Dr. Esam Al_Qaralleh CE Department Princess Sumaya University for Technology. Overview of Assembly Language 4345 Assembly Language Assembly Language Dr. Esam Al_Qaralleh CE Department Princess Sumaya University for Technology Assembly Language 3-1 Overview of Assembly Language Advantages: Faster as compared

More information

Intel 8086 MICROPROCESSOR ARCHITECTURE

Intel 8086 MICROPROCESSOR ARCHITECTURE Intel 8086 MICROPROCESSOR ARCHITECTURE 1 Features It is a 16-bit μp. 8086 has a 20 bit address bus can access up to 2 20 memory locations (1 MB). It can support up to 64K I/O ports. It provides 14, 16

More information

Intel 8086 MICROPROCESSOR. By Y V S Murthy

Intel 8086 MICROPROCESSOR. By Y V S Murthy Intel 8086 MICROPROCESSOR By Y V S Murthy 1 Features It is a 16-bit μp. 8086 has a 20 bit address bus can access up to 2 20 memory locations (1 MB). It can support up to 64K I/O ports. It provides 14,

More information

EEM336 Microprocessors I. Data Movement Instructions

EEM336 Microprocessors I. Data Movement Instructions EEM336 Microprocessors I Data Movement Instructions Introduction This chapter concentrates on common data movement instructions. 2 Chapter Objectives Upon completion of this chapter, you will be able to:

More information

Week 2 The 80x86 Microprocessor Architecture

Week 2 The 80x86 Microprocessor Architecture Week 2 The 80x86 Microprocessor Architecture OBJECTIVES this chapter enables the student to: Describe the Intel family of microprocessors from 8085 to Pentium. In terms of bus size, physical memory & special

More information

EXPERIMENT WRITE UP. LEARNING OBJECTIVES: 1. Get hands on experience with Assembly Language Programming 2. Write and debug programs in TASM/MASM

EXPERIMENT WRITE UP. LEARNING OBJECTIVES: 1. Get hands on experience with Assembly Language Programming 2. Write and debug programs in TASM/MASM EXPERIMENT WRITE UP AIM: Assembly language program for 16 bit BCD addition LEARNING OBJECTIVES: 1. Get hands on experience with Assembly Language Programming 2. Write and debug programs in TASM/MASM TOOLS/SOFTWARE

More information

16-Bit Intel Processor Architecture

16-Bit Intel Processor Architecture IBM-PC Organization 16-Bit Intel Processor Architecture A-16 bit microprocessor can operate on 16 bits of data at a time. 8086/8088 have the simplest structure 8086/8088 have the same instruction set,

More information

icroprocessor istory of Microprocessor ntel 8086:

icroprocessor istory of Microprocessor ntel 8086: Microprocessor A microprocessor is an electronic device which computes on the given input similar to CPU of a computer. It is made by fabricating millions (or billions) of transistors on a single chip.

More information

6/20/2011. Introduction. Chapter Objectives Upon completion of this chapter, you will be able to:

6/20/2011. Introduction. Chapter Objectives Upon completion of this chapter, you will be able to: Introduction Efficient software development for the microprocessor requires a complete familiarity with the addressing modes employed by each instruction. This chapter explains the operation of the stack

More information

Data Movement Instructions

Data Movement Instructions Segment 3B Data Movement Instructions PUSH/POP Contents Load-Effective address (LEA, LDS, LES) String Data Transfer (LODS, STOS, MOVS) XCHG, XLAT IN and OUT Course Instructor Mohammed Abdul kader Lecturer,

More information

Basic characteristics & features of 8086 Microprocessor Dr. M. Hebaishy

Basic characteristics & features of 8086 Microprocessor Dr. M. Hebaishy Basic characteristics & features of 8086 Microprocessor Dr. M. Hebaishy Digital Logic Design Ch1-1 8086 Microprocessor Features: The 8086 microprocessor is a 16 bit microprocessor. The term 16 bit means

More information

CG2007 Microprocessor systems.

CG2007 Microprocessor systems. CG2007 Microprocessor systems Tutorial 1 Semester 2 AY 2011-12 Ganesh Iyer ganesh.vigneswara@gmail.com http://ganeshniyer.com About Me I have 3 years of Industry work experience in Bangalore, India. I

More information

Assembly Language Each statement in an assembly language program consists of four parts or fields.

Assembly Language Each statement in an assembly language program consists of four parts or fields. Chapter 3: Addressing Modes Assembly Language Each statement in an assembly language program consists of four parts or fields. The leftmost field is called the label. - used to identify the name of a memory

More information

EEM336 Microprocessors I. Addressing Modes

EEM336 Microprocessors I. Addressing Modes EEM336 Microprocessors I Addressing Modes Introduction Efficient software development for the microprocessor requires a complete familiarity with the addressing modes employed by each instruction. This

More information

SPRING TERM BM 310E MICROPROCESSORS LABORATORY PRELIMINARY STUDY

SPRING TERM BM 310E MICROPROCESSORS LABORATORY PRELIMINARY STUDY BACKGROUND Segment The "SEGMENT" and "ENDS" directives indicate to the assembler the beginning and ending of a segment and have the following format label SEGMENT [options] ;place the statements belonging

More information

1. Introduction to Assembly Language

1. Introduction to Assembly Language www.vchowk.com 1. Introduction to Assembly Language Solved EXERCISE 1 Note: Dear fellows I tried my best to solve this exercise questions if there s any mistake or doubt in any question correct it and

More information

Program controlled semiconductor device (IC) which fetches (from memory), decodes and executes instructions.

Program controlled semiconductor device (IC) which fetches (from memory), decodes and executes instructions. 8086 Microprocessor Microprocessor Program controlled semiconductor device (IC) which fetches (from memory), decodes and executes instructions. It is used as CPU (Central Processing Unit) in computers.

More information

Computer Architecture and System Software Lecture 07: Assembly Language Programming

Computer Architecture and System Software Lecture 07: Assembly Language Programming Computer Architecture and System Software Lecture 07: Assembly Language Programming Instructor: Rob Bergen Applied Computer Science University of Winnipeg Announcements New assembly examples uploaded to

More information

EC-333 Microprocessor and Interfacing Techniques

EC-333 Microprocessor and Interfacing Techniques EC-333 Microprocessor and Interfacing Techniques Lecture 3 The Microprocessor and its Architecture Dr Hashim Ali Fall - 2018 Department of Computer Science and Engineering HITEC University Taxila Slides

More information

Assembling, Linking and Executing 1) Assembling: .obj obj .obj.lst .crf Assembler Types: a) One pass assembler:

Assembling, Linking and Executing 1) Assembling: .obj obj .obj.lst .crf Assembler Types: a) One pass assembler: Assembling, Linking and Executing 1) Assembling: - Assembling converts source program into object program if syntactically correct and generates an intermediate.obj file or module. - It calculates the

More information

LABORATORY 1: EXPLORING THE SOFTWARE ARCHITECTURE OF THE MICROPROCESSOR

LABORATORY 1: EXPLORING THE SOFTWARE ARCHITECTURE OF THE MICROPROCESSOR LABORATORY 1: EXPLORING THE SOFTWARE ARCHITECTURE OF THE 80 86 MICROPROCESSOR NAME: STUDENT ID#: Objectives Learn how to: Bring up the DEBUG program. Examine and modify the contents of the 80 86 s code

More information

THE UNIVERSITY OF TRINIDAD & TOBAGO

THE UNIVERSITY OF TRINIDAD & TOBAGO THE UNIVERSITY OF TRINIDAD & TOBAGO FINAL ASSESSMENT/EXAMINATIONS DECEMBER 2012 Course Code and Title: Microprocessor Architecture & Interfacing Programme: Computer Engineering Technician Date and Time:

More information

9/25/ Software & Hardware Architecture

9/25/ Software & Hardware Architecture 8086 Software & Hardware Architecture 1 INTRODUCTION It is a multipurpose programmable clock drive register based integrated electronic device, that reads binary instructions from a storage device called

More information

Hardware and Software Architecture. Chapter 2

Hardware and Software Architecture. Chapter 2 Hardware and Software Architecture Chapter 2 1 Basic Components The x86 processor communicates with main memory and I/O devices via buses Data bus for transferring data Address bus for the address of a

More information

EC 333 Microprocessor and Interfacing Techniques (3+1)

EC 333 Microprocessor and Interfacing Techniques (3+1) EC 333 Microprocessor and Interfacing Techniques (3+1) Lecture 7 8086/88 Microprocessor Programming (Data Movement Instructions) Dr Hashim Ali Spring 2018 Department of Computer Science and Engineering

More information

Computer Architecture 1 ح 303

Computer Architecture 1 ح 303 Lecture 4 A. Addressing MODES 1. Introduction to assembly language programming: Program is a sequence of commands used to tell a microcomputer what to do. Each command in a program is an instruction Programs

More information

Microcomputer Architecture..Second Year (Sem.2).Lecture(2) مدرس المادة : م. سندس العزاوي... قسم / الحاسبات

Microcomputer Architecture..Second Year (Sem.2).Lecture(2) مدرس المادة : م. سندس العزاوي... قسم / الحاسبات 1) Input/output In computing, input/output or I/O, is the communication between an information processing system (such as a computer) and the outside world, possibly a human or another information processing

More information

ORG ; TWO. Assembly Language Programming

ORG ; TWO. Assembly Language Programming Dec 2 Hex 2 Bin 00000010 ORG ; TWO Assembly Language Programming OBJECTIVES this chapter enables the student to: Explain the difference between Assembly language instructions and pseudo-instructions. Identify

More information

EE2007 Microprocessor systems.

EE2007 Microprocessor systems. EE2007 Microprocessor systems Tutorial 1 Semester 1 AY 2010-11 Ganesh Iyer ganesh.vigneswara@gmail.com (facebook, gtalk) http://ganeshniyer.com About Me I have 3 years of Industry work experience in Bangalore,

More information

On 386 and later machines, segment had a size of 64 KB. Therefore, to get the actual physical address, we can calculate it in the following way:

On 386 and later machines, segment had a size of 64 KB. Therefore, to get the actual physical address, we can calculate it in the following way: Memory Structure Segment and Offset Actual addresses on the IBM PC are given as a pair of 16-bit numbers, the segment and the offset, written in the form segment:offset. We have ignored the segment because

More information

Computer Architecture and System Software Lecture 06: Assembly Language Programming

Computer Architecture and System Software Lecture 06: Assembly Language Programming Computer Architecture and System Software Lecture 06: Assembly Language Programming Instructor: Rob Bergen Applied Computer Science University of Winnipeg Announcements Assignment 3 due thursday Midterm

More information

Addressing Modes on the x86

Addressing Modes on the x86 Addressing Modes on the x86 register addressing mode mov ax, ax, mov ax, bx mov ax, cx mov ax, dx constant addressing mode mov ax, 25 mov bx, 195 mov cx, 2056 mov dx, 1000 accessing data in memory There

More information

Northern India Engineering College, Delhi (GGSIP University) PAPER I

Northern India Engineering College, Delhi (GGSIP University) PAPER I PAPER I Q1.Explain IVT? ANS. interrupt vector table is a memory space for storing starting addresses of all the interrupt service routine. It stores CS:IP PAIR corresponding to each ISR. An interrupt vector

More information

Tutorial Letter 103/3/2012 Computer Organization COS2621 Semesters 1 & 2

Tutorial Letter 103/3/2012 Computer Organization COS2621 Semesters 1 & 2 COS2621/103/3/2012 Tutorial Letter 103/3/2012 Computer Organization COS2621 Semesters 1 & 2 School of Computing Solutions to self tests Bar code 2 Self-test A Question 1 Alternative 1 Which one of the

More information

MODE (mod) FIELD CODES. mod MEMORY MODE: 8-BIT DISPLACEMENT MEMORY MODE: 16- OR 32- BIT DISPLACEMENT REGISTER MODE

MODE (mod) FIELD CODES. mod MEMORY MODE: 8-BIT DISPLACEMENT MEMORY MODE: 16- OR 32- BIT DISPLACEMENT REGISTER MODE EXERCISE 9. Determine the mod bits from Figure 7-24 and write them in Table 7-7. MODE (mod) FIELD CODES mod 00 01 10 DESCRIPTION MEMORY MODE: NO DISPLACEMENT FOLLOWS MEMORY MODE: 8-BIT DISPLACEMENT MEMORY

More information

INSTRUCTOR: ABDULMUTTALIB A. H. ALDOURI

INSTRUCTOR: ABDULMUTTALIB A. H. ALDOURI 8 Unsigned and Signed Integer Numbers 1. Unsigned integer numbers: each type of integer can be either byte-wide or word-wide. This data type can be used to represent decimal numbers in the range 0 through

More information

Computer Organization & Assembly Language Programming. CSE 2312 Lecture 15 Addressing and Subroutine

Computer Organization & Assembly Language Programming. CSE 2312 Lecture 15 Addressing and Subroutine Computer Organization & Assembly Language Programming CSE 2312 Lecture 15 Addressing and Subroutine 1 Sections in 8088 Code TEXT section, for the processor instructions. DATA section for the initialization

More information

CS401 Assembly Language Solved MCQS From Midterm Papers

CS401 Assembly Language Solved MCQS From Midterm Papers CS401 Assembly Language Solved MCQS From Midterm Papers May 14,2011 MC100401285 Moaaz.pk@gmail.com MC100401285@gmail.com PSMD01(IEMS) Question No:1 ( Marks: 1 ) - Please choose one The first instruction

More information

CS499. Intel Architecture

CS499. Intel Architecture CS499 Intel Architecture Intel Architecture References IA-32 Intel Architecture Software Developer s Manual, Volume 1: Basic Architecture Volume 2: Instruction Set Reference www.intel.com/design/pentiumii/manuals/

More information

Computer Organization and Assembly Language CSC-210

Computer Organization and Assembly Language CSC-210 Computer Organization and Assembly Language CSC-2 Lab # Lab() Lab(2) Lab(3) Lab(4) Lab(5) Lab(6) Lab(7) Lab(8) Lab(9) Lab() Lab() Lab(2) Lab(3) Title Computer Anatomy Memory and ports Motherboard and cards

More information

SRI VENKATESWARA COLLEGE OF ENGINEERING AND TECHNOLOGY DEPARTMENT OF ECE EC6504 MICROPROCESSOR AND MICROCONTROLLER (REGULATION 2013)

SRI VENKATESWARA COLLEGE OF ENGINEERING AND TECHNOLOGY DEPARTMENT OF ECE EC6504 MICROPROCESSOR AND MICROCONTROLLER (REGULATION 2013) SRI VENKATESWARA COLLEGE OF ENGINEERING AND TECHNOLOGY DEPARTMENT OF ECE EC6504 MICROPROCESSOR AND MICROCONTROLLER (REGULATION 2013) UNIT I THE 8086 MICROPROCESSOR PART A (2 MARKS) 1. What are the functional

More information

Advanced Microprocessors

Advanced Microprocessors Advanced Microprocessors Notes #2 Software Architecture & Instruction Set Architecture Part 1 EE 467/567 Winter 2012 by Avinash Kodi SWA.1 Background Materials Textbook: 2.1, 2.2, 3.1 Other: IA-32 Intel

More information

BLDEA S V.P. DR. P.G. HALAKATTI COLLEGE OF ENGINEERING & TECHNOLOGY, VIJAYAPURA

BLDEA S V.P. DR. P.G. HALAKATTI COLLEGE OF ENGINEERING & TECHNOLOGY, VIJAYAPURA EXPERIMENT NO.:- 1. BINARY SEARCH Work Space: Register Used Memory Address Data DI 10000H 11H 10001H 11H 10002H 22H 10003H 22H BX 10004H 33H 10005H 33H 10006H 44H 10007H 44H CX 10008H 55H 10009H 55H 24

More information

3- ADDRESSING MODES in 8086: In this section we use the MOV instruction to describe the data-addressing modes. Figure 3-1 shows the MOV instruction.

3- ADDRESSING MODES in 8086: In this section we use the MOV instruction to describe the data-addressing modes. Figure 3-1 shows the MOV instruction. 3- ADDRSING MOD in 8086: In this section we use the MOV instruction to describe the data-addressing modes. Figure 3-1 shows the MOV instruction. Fig 3-1 The MOV instruction An addressing mode is a method

More information

Microprocessor and Assembly Language Week-5. System Programming, BCS 6th, IBMS (2017)

Microprocessor and Assembly Language Week-5. System Programming, BCS 6th, IBMS (2017) Microprocessor and Assembly Language Week-5 System Programming, BCS 6th, IBMS (2017) High Speed Memory Registers CPU store data temporarily in these location CPU process, store and transfer data from one

More information

SHEET-2 ANSWERS. [1] Rewrite Program 2-3 to transfer one word at a time instead of one byte.

SHEET-2 ANSWERS. [1] Rewrite Program 2-3 to transfer one word at a time instead of one byte. SHEET-2 ANSWERS [1] Rewrite Program 2-3 to transfer one word at a time instead of one byte. TITLE PROG2-3 PURPOSE: TRANSFER 6 WORDS OF DATA PAGE 60,132.MODEL SMALL.STACK 64.DATA ORG 10H DATA_IN DW 234DH,

More information

EC 333 Microprocessor and Interfacing Techniques (3+1)

EC 333 Microprocessor and Interfacing Techniques (3+1) EC 333 Microprocessor and Interfacing Techniques (3+1) Lecture 6 8086/88 Microprocessor Programming (Arithmetic Instructions) Dr Hashim Ali Fall 2018 Department of Computer Science and Engineering HITEC

More information

Assembly Language Lab # 9

Assembly Language Lab # 9 Faculty of Engineering Computer Engineering Department Islamic University of Gaza 2011 Assembly Language Lab # 9 Stacks and Subroutines Eng. Doaa Abu Jabal Assembly Language Lab # 9 Stacks and Subroutines

More information

Introduction to Microprocessor

Introduction to Microprocessor Introduction to Microprocessor The microprocessor is a general purpose programmable logic device. It is the brain of the computer and it performs all the computational tasks, calculations data processing

More information

Internal architecture of 8086

Internal architecture of 8086 Case Study: Intel Processors Internal architecture of 8086 Slide 1 Case Study: Intel Processors FEATURES OF 8086 It is a 16-bit μp. 8086 has a 20 bit address bus can access up to 220 memory locations (1

More information

Alexandria University Faculty of Engineering Communications and Computers SSP

Alexandria University Faculty of Engineering Communications and Computers SSP Alexandria University Faculty of Engineering Communications and Computers SSP Course: Microprocessors CC421 Instructor: Dr.M.El-Banna Academic Year: 2016 2017 Assistant: TBA Spring Semester SHEET 1 Introduction

More information

Intel 8086: Instruction Set

Intel 8086: Instruction Set IUST-EE (Chapter 6) Intel 8086: Instruction Set 1 Outline Instruction Set Data Transfer Instructions Arithmetic Instructions Bit Manipulation Instructions String Instructions Unconditional Transfer Instruction

More information

Assembly Language Lab #5

Assembly Language Lab #5 Islamic University of Gaza Computer Engineering Department 2009 Assembly Language Lab #5 Eng. Tahani Z. Fourah Islamic University of Gaza Lab 5 Addressing Modes The addressing modes are different ways

More information

Chapter 2 COMPUTER SYSTEM HARDWARE

Chapter 2 COMPUTER SYSTEM HARDWARE Chapter 2 COMPUTER SYSTEM HARDWARE A digital computer system consists of hardware and software. The hardware consists of the physical components of the system, whereas the software is the collection of

More information

ADVANCE MICROPROCESSOR & INTERFACING

ADVANCE MICROPROCESSOR & INTERFACING VENUS INTERNATIONAL COLLEGE OF TECHNOLOGY Gandhinagar Department of Computer Enggineering ADVANCE MICROPROCESSOR & INTERFACING Name : Enroll no. : Class Year : 2014-15 : 5 th SEM C.E. VENUS INTERNATIONAL

More information

Intel x86 Memory. Architecture. The x86 isn't all that complex it just doesn't make a lot of sense. Program Segments. x86 Data and Address Ranges

Intel x86 Memory. Architecture. The x86 isn't all that complex it just doesn't make a lot of sense. Program Segments. x86 Data and Address Ranges 1 2 Intel x86 Memory The x86 isn't all that complex it just doesn't make a lot of sense. Architecture Mike Johnson, Leader of 80x86 Design at AMD, Microprocessor Report (1994) 3 4 Program Segments x86

More information

Microprocessor. By Mrs. R.P.Chaudhari Mrs.P.S.Patil

Microprocessor. By Mrs. R.P.Chaudhari Mrs.P.S.Patil Microprocessor By Mrs. R.P.Chaudhari Mrs.P.S.Patil Chapter 1 Basics of Microprocessor CO-Draw Architecture Of 8085 Salient Features of 8085 It is a 8 bit microprocessor. It is manufactured with N-MOS technology.

More information

INSTRUCTOR: ABDULMUTTALIB A. H. ALDOURI

INSTRUCTOR: ABDULMUTTALIB A. H. ALDOURI Note: PUSHF / POPF have no operands The figure below shows that if (SS) = 3000H, (SP) = 0042H, so the execution of POP CX loads CX by the word 4050H form the stack segment. The SP is incremented by 2.

More information

Experiment N o 3 Segmentation and Addressing Modes

Experiment N o 3 Segmentation and Addressing Modes Introduction: Experiment N o 3 Segmentation and Addressing Modes In this experiment you will be introduced to physical segmentation of the memory, and the logical segmentation of programs. You will also

More information

VARDHAMAN COLLEGE OF ENGINEERING (AUTONOMOUS) Shamshabad, Hyderabad

VARDHAMAN COLLEGE OF ENGINEERING (AUTONOMOUS) Shamshabad, Hyderabad Introduction to MS-DOS Debugger DEBUG In this laboratory, we will use DEBUG program and learn how to: 1. Examine and modify the contents of the 8086 s internal registers, and dedicated parts of the memory

More information

UNIT 2 PROCESSORS ORGANIZATION CONT.

UNIT 2 PROCESSORS ORGANIZATION CONT. UNIT 2 PROCESSORS ORGANIZATION CONT. Types of Operand Addresses Numbers Integer/floating point Characters ASCII etc. Logical Data Bits or flags x86 Data Types Operands in 8 bit -Byte 16 bit- word 32 bit-

More information

if 2 16bit operands multiplied the result will be

if 2 16bit operands multiplied the result will be how many operands in ADC? ans:3 how 32 bit word is defined? ans define double if 2 16bit operands multiplied the result will be ans 32bit if div by ero occurs then?? ans div by zero int for software int

More information

The Stack. Lecture 15: The Stack. The Stack. Adding Elements. What is it? What is it used for?

The Stack. Lecture 15: The Stack. The Stack. Adding Elements. What is it? What is it used for? Lecture 15: The Stack The Stack What is it? What is it used for? A special memory buffer (outside the CPU) used as a temporary holding area for addresses and data The stack is in the stack segment. The

More information

Module 3 Instruction Set Architecture (ISA)

Module 3 Instruction Set Architecture (ISA) Module 3 Instruction Set Architecture (ISA) I S A L E V E L E L E M E N T S O F I N S T R U C T I O N S I N S T R U C T I O N S T Y P E S N U M B E R O F A D D R E S S E S R E G I S T E R S T Y P E S O

More information

SYSC3601 Microprocessor Systems. Unit 2: The Intel 8086 Architecture and Programming Model

SYSC3601 Microprocessor Systems. Unit 2: The Intel 8086 Architecture and Programming Model SYSC3601 Microprocessor Systems Unit 2: The Intel 8086 Architecture and Programming Model Topics/Reading SYSC3601 2 Microprocessor Systems 1. Registers and internal architecture (Ch 2) 2. Address generation

More information

MICROPROCESSOR TECHNOLOGY

MICROPROCESSOR TECHNOLOGY MICROPROCESSOR TECHNOLOGY Assis. Prof. Hossam El-Din Moustafa Lecture 6 Ch.3 Addressing Modes 1 Chapter Objectives Explain the operation of each data-addressing mode. Use data-addressing modes to form

More information

Lecture 5:8086 Outline: 1. introduction 2. execution unit 3. bus interface unit

Lecture 5:8086 Outline: 1. introduction 2. execution unit 3. bus interface unit Lecture 5:8086 Outline: 1. introduction 2. execution unit 3. bus interface unit 1 1. introduction The internal function of 8086 processor are partitioned logically into processing units,bus Interface Unit(BIU)

More information

Marking Scheme. Examination Paper. Module: Microprocessors (630313)

Marking Scheme. Examination Paper. Module: Microprocessors (630313) Philadelphia University Faculty of Engineering Marking Scheme Examination Paper Department of CE Module: Microprocessors (630313) Final Exam Second Semester Date: 12/06/2017 Section 1 Weighting 40% of

More information

Ex: Write a piece of code that transfers a block of 256 bytes stored at locations starting at 34000H to locations starting at 36000H. Ans.

Ex: Write a piece of code that transfers a block of 256 bytes stored at locations starting at 34000H to locations starting at 36000H. Ans. INSTRUCTOR: ABDULMUTTALIB A H ALDOURI Conditional Jump Cond Unsigned Signed = JE : Jump Equal JE : Jump Equal ZF = 1 JZ : Jump Zero JZ : Jump Zero ZF = 1 JNZ : Jump Not Zero JNZ : Jump Not Zero ZF = 0

More information

Lecture 5: Computer Organization Instruction Execution. Computer Organization Block Diagram. Components. General Purpose Registers.

Lecture 5: Computer Organization Instruction Execution. Computer Organization Block Diagram. Components. General Purpose Registers. Lecture 5: Computer Organization Instruction Execution Computer Organization Addressing Buses Fetch-Execute Cycle Computer Organization CPU Control Unit U Input Output Memory Components Control Unit fetches

More information

Chapter 4: Data Movement Instructions. 4 1 MOV Revisited

Chapter 4: Data Movement Instructions. 4 1 MOV Revisited Chapter 4: Data Movement Instructions 4 1 MOV Revisited In this chapter, the MOV instruction introduces machine language instructions available with various addressing modes and instructions. It may be

More information

PESIT Bangalore South Campus

PESIT Bangalore South Campus INTERNAL ASSESSMENT TEST 2 Date : 02/04/2018 Max Marks: 40 Subject & Code : Microprocessor (15CS44) Section : IV A and B Name of faculty: Deepti.C Time : 8:30 am-10:00 am Note: Note: Answer any five complete

More information

8086 INTERNAL ARCHITECTURE

8086 INTERNAL ARCHITECTURE 8086 INTERNAL ARCHITECTURE Segment 2 Intel 8086 Microprocessor The 8086 CPU is divided into two independent functional parts: a) The Bus interface unit (BIU) b) Execution Unit (EU) Dividing the work between

More information

Experiment N o 3. Segmentation and Addressing Modes

Experiment N o 3. Segmentation and Addressing Modes Introduction: Experiment N o 3 Segmentation and Addressing Modes In this experiment you will be introduced to physical segmentation of the memory, and the logical segmentation of programs. You will also

More information

Experiment 3. TITLE Optional: Write here the Title of your program.model SMALL This directive defines the memory model used in the program.

Experiment 3. TITLE Optional: Write here the Title of your program.model SMALL This directive defines the memory model used in the program. Experiment 3 Introduction: In this experiment the students are exposed to the structure of an assembly language program and the definition of data variables and constants. Objectives: Assembly language

More information

UMBC. A register, an immediate or a memory address holding the values on. Stores a symbolic name for the memory location that it represents.

UMBC. A register, an immediate or a memory address holding the values on. Stores a symbolic name for the memory location that it represents. Intel Assembly Format of an assembly instruction: LABEL OPCODE OPERANDS COMMENT DATA1 db 00001000b ;Define DATA1 as decimal 8 START: mov eax, ebx ;Copy ebx to eax LABEL: Stores a symbolic name for the

More information

ADVANCED PROCESSOR ARCHITECTURES AND MEMORY ORGANISATION Lesson-11: 80x86 Architecture

ADVANCED PROCESSOR ARCHITECTURES AND MEMORY ORGANISATION Lesson-11: 80x86 Architecture ADVANCED PROCESSOR ARCHITECTURES AND MEMORY ORGANISATION Lesson-11: 80x86 Architecture 1 The 80x86 architecture processors popular since its application in IBM PC (personal computer). 2 First Four generations

More information

x86 Assembly Tutorial COS 318: Fall 2017

x86 Assembly Tutorial COS 318: Fall 2017 x86 Assembly Tutorial COS 318: Fall 2017 Project 1 Schedule Design Review: Monday 9/25 Sign up for 10-min slot from 3:00pm to 7:00pm Complete set up and answer posted questions (Official) Precept: Monday

More information

IA32 Intel 32-bit Architecture

IA32 Intel 32-bit Architecture 1 2 IA32 Intel 32-bit Architecture Intel 32-bit Architecture (IA32) 32-bit machine CISC: 32-bit internal and external data bus 32-bit external address bus 8086 general registers extended to 32 bit width

More information

Microprocessor Memory Mapping. Dr. Cahit Karakuş, February-2018

Microprocessor Memory Mapping. Dr. Cahit Karakuş, February-2018 Microprocessor Memory Mapping Dr. Cahit Karakuş, February-2018 Konu Başlıkları CPU Mimarisi Microprocessor Pins and Signals System Bus Bellek Haritası Bellek Arayüzü ve I/O portları Assemble Adres erişim

More information

Philadelphia University Student Name: Student Number:

Philadelphia University Student Name: Student Number: Philadelphia University Student Name: Student Number: Faculty of Engineering Serial Number: Final Exam, Second Semester: 2016/2017 Dept. of Computer Engineering Course Title: Microprocessors Date: 12/06/2017

More information

.code. lea dx,msg2. Page 1/8. Problem 1: Programming in Assembly [25 Points]

.code. lea dx,msg2. Page 1/8. Problem 1: Programming in Assembly [25 Points] Problem : Programming in Assembly [ Points] The following assembly program is supposed to: receive three integer numbers from the console, call a function, name sort, function sort arranges the three input

More information

Computer Processors. Part 2. Components of a Processor. Execution Unit The ALU. Execution Unit. The Brains of the Box. Processors. Execution Unit (EU)

Computer Processors. Part 2. Components of a Processor. Execution Unit The ALU. Execution Unit. The Brains of the Box. Processors. Execution Unit (EU) Part 2 Computer Processors Processors The Brains of the Box Computer Processors Components of a Processor The Central Processing Unit (CPU) is the most complex part of a computer In fact, it is the computer

More information

UNIT 4. Modular Programming

UNIT 4. Modular Programming 1 UNIT 4. Modular Programming Program is composed from several smaller modules. Modules could be developed by separate teams concurrently. The modules are only assembled producing.obj modules (Object modules).

More information

Question Bank Part-A UNIT I- THE 8086 MICROPROCESSOR 1. What is microprocessor? A microprocessor is a multipurpose, programmable, clock-driven, register-based electronic device that reads binary information

More information

UNIT-1. It is a 16-bit Microprocessor (μp).it s ALU, internal registers works with 16bit binary word.

UNIT-1. It is a 16-bit Microprocessor (μp).it s ALU, internal registers works with 16bit binary word. UNIT-1 Introduction to 8086: 8086 Microprocessor is an enhanced version of 8085Microprocessor that was designed by Intel in 1976. It is a 16-bit Microprocessor having 20 address lines and16 data lines

More information

WINTER 12 EXAMINATION Subject Code : Model Answer Page No : / N. a) Describe the function of SID and SOD pins of 8085 microprocessor

WINTER 12 EXAMINATION Subject Code : Model Answer Page No : / N. a) Describe the function of SID and SOD pins of 8085 microprocessor Subject Code : Model Answer Page No : / N Q.1) SOLVE ANY FIVE : (20 MARKS) a) Describe the function of SID and SOD pins of 8085 microprocessor Ans: - SID: - (2 Mark) Serial Input Data SID pin is used to

More information

X86 Addressing Modes Chapter 3" Review: Instructions to Recognize"

X86 Addressing Modes Chapter 3 Review: Instructions to Recognize X86 Addressing Modes Chapter 3" Review: Instructions to Recognize" 1 Arithmetic Instructions (1)! Two Operand Instructions" ADD Dest, Src Dest = Dest + Src SUB Dest, Src Dest = Dest - Src MUL Dest, Src

More information

Summer 2003 Lecture 4 06/14/03

Summer 2003 Lecture 4 06/14/03 Summer 2003 Lecture 4 06/14/03 LDS/LES/LSS General forms: lds reg,mem lseg reg,mem Load far pointer ~~ outside of current segment {E.g., load reg w/value @ mem, & seg w/mem+2 XCHG Exchange values General

More information

The Microprocessor and its Architecture

The Microprocessor and its Architecture The Microprocessor and its Architecture Contents Internal architecture of the Microprocessor: The programmer s model, i.e. The registers model The processor model (organization) Real mode memory addressing

More information

Q1: Multiple choice / 20 Q2: Memory addressing / 40 Q3: Assembly language / 40 TOTAL SCORE / 100

Q1: Multiple choice / 20 Q2: Memory addressing / 40 Q3: Assembly language / 40 TOTAL SCORE / 100 16.317: Microprocessor-Based Systems I Summer 2012 Exam 1 July 20, 2012 Name: ID #: For this exam, you may use a calculator and one 8.5 x 11 double-sided page of notes. All other electronic devices (e.g.,

More information

A Presentation created By Ramesh.K Press Ctrl+l for full screen view

A Presentation created By Ramesh.K Press Ctrl+l for full screen view Press Ctrl+l for full screen view A Presentation created By Ramesh.K rameshpkd@gmail.com Press Ctrl+l for full screen view A Microprocessor sor is a multipurpose, programmable logic device that reads binary

More information