Digital Signal Processor

Transcription

1 Student Workbook J0 Edition 2 Ê>?~Æ6J0Ä%#]Ë J00503

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3 SECOND EDITION Second Printing, March 2005 Copyright September, 2003 Lab-Volt Systems, Inc. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form by any means, electronic, mechanical, photocopied, recorded, or otherwise, without prior written permission from Lab-Volt Systems, Inc. Information in this document is subject to change without notice and does not represent a commitment on the part of Lab-Volt Systems, Inc. The Lab-Volt F.A.C.E.T. software and other materials described in this document are furnished under a license agreement or a nondisclosure agreement. The software may be used or copied only in accordance with the terms of the agreement. ISBN Lab-Volt and F.A.C.E.T. logos are trademarks of Lab-Volt Systems, Inc. All other trademarks are the property of their respective owners. Other trademarks and trade names may be used in this document to refer to either the entity claiming the marks and names or their products. Lab-Volt System, Inc. disclaims any proprietary interest in trademarks and trade names other than its own.

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5 THIS PAGE IS SUPPOSE TO BE BLANK Table of Contents Unit 1 DSP Trainer Familiarization...1 Exercise 1 Introduction to the DSP Circuit Board...11 Exercise 2 The Assembler and Debugger...15 Exercise 3 Processor Arithmetic...19 Unit 2 CPU Architecture...23 Exercise 1 The Central Arithmetic Logic Unit...29 Exercise 2 Memory Space...35 Exercise 3 Addressing...38 Unit 3 Program Execution...45 Exercise 1 The Program Controller...48 Exercise 2 The Pipeline...53 Unit 4 Basic I/O...57 Exercise 1 DSP Peripherals...60 Exercise 2 Digital Signal Processing: The FIR Filter...64 Appendix A Safety... A-ii i

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7 Introduction This Student Workbook provides a unit-by-unit outline of the Fault Assisted Circuits for Electronics Training (F.A.C.E.T.) curriculum. The following information is included together with space to take notes as you move through the curriculum. The unit objective Unit fundamentals A list of new terms and words for the unit Equipment required for the unit The exercise objectives Exercise discussion Exercise notes The Appendix includes safety information. iii

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9 Unit 1 DSP Trainer Familiarization UNIT 1 DSP TRAINER FAMILIARIZATION UNIT OBJECTIVE Upon completion of this unit, you will be able to explain the difference between a digital signal processor (DSP) and a general-purpose processor. You will be familiar with the design process for DSP programs. UNIT FUNDAMENTALS A DigitalSignalProcessor(DSP) is an incredibly fast and powerful microprocessor that, like our brain, can handle the analysis of signals in real-time. The internal design of DSPs, the key element being the multiply and add architecture, makes them often much faster at calculating mathematical operations than other microprocessors. 1

10 Unit 1 DSP Trainer Familiarization Digital Signal Processors are characterized by: specialized structures that make them execute commands rapidly and efficiently. fast multiply instructions. reduced numbers of commands making the DSP programming process simpler. DSPs have revolutionized telecommunications. They can be found inside of, to name a few, cellular phones, modems, speech recognition/synthesis devices, Digital Versatile Disk (DVD) players and high level security devices. In fact, DSPs are commonly found in other devices that are not immediately, in the minds of people, associated with them, such as: hard disk drive controllers, vehicle suspension systems and in the signal processing circuits of medical imagers and radar systems. DSPs began to appear at the end of the 1970s and the beginning of the 1980s with Bell Lab's DSP1, Intel's 2920, and NEC's µpd7720. In 1982, Texas Instruments introduced the TMS32010, the first member of what was to become a popular 16-bit fixed-point DSP family. This DSP had an average calculation rate of 8 MIPS. 2

11 Unit 1 DSP Trainer Familiarization In 1998, DSPs, using parallelism, reached calculation speeds of up to 1600 MIPS. The DSP used with the Lab-Volt DIGITAL SIGNAL PROCESSOR circuit board is a Texas Instruments TMS320C50. The TMS320C50 is a third-generation DSP with an internal design based on the first-generation TMS Also in 1982, the first floating-point DSPs were produced by Hitachi. This numeric format greatly increased the dynamic calculation range of DSPs. NEC introduced, two years later, the first 32-bit floating-point DSPs that had a calculation speed of 6.6 MIPS. Generally, real world signals (e.g., radar and sonar) are better processed by floating-point DSPs. Constructed signals (e.g., telecom, imaging and control) are generally better processed using fixed-point DSPs. 3

12 Unit 1 DSP Trainer Familiarization The uses that DSP's have been put to has grown because: They allow for more complex processing than is possible with analog circuitry; They provide repeatable signal processing performance; Digital processing codecan be easily modified, and with it design updates or changes are more flexible; They usually result in a lower development cost than analog designs with equivalent performance levels. A DSP cannot operate without the intelligence of a program giving it its commands. The program tells the DSP which instructions it must execute to perform certain functions. This program is stored as machine codeinside of the DSP. If a programmer were to write a DSP program using machine code it would be very difficult. For this reason, an assembler language is developed to program the DSP. This is a programming language whose instructions, mnemonicsare symbolic and usually in one-to-one correspondence with the machine instructions. An assemblerand a linkerare used to translate the program written in assembler language into DSP machine codes. 4

13 Unit 1 DSP Trainer Familiarization The assembler translates the program file into object fileswhich are then linked together to create the executable file. The C language is a high-level languagewhich is used more and more to program complex DSPs or highly complex algorithms. Programming in C simplifies the design of DSP applications because the programmer is no longer limited by the small instruction set of low-level languages(like the assembler language). A C compiler is used to translate the C source codes into the appropriate DSP assembler codes. The last part of programming involves checking your program for mistakes and making changes until it correctly performs the desired function. 5

14 Unit 1 DSP Trainer Familiarization This final process is commonly known as debugging. A program that aids software debugging is called a debugger. A debugger gives the programmer an ability to diagnose the problems associated with their DSP programs. This is done before committing the program to the DSP's memory. The C5x Visual Development Environment, C5x VDE, is the debugger used with the Digital Signal Processor. DSP system developers rarely debug a DSP without the aid of a debugger. As well, to aid them they often use EVMs, emulators, and simulators The DSP used with the circuit board is part of the TMS320C5x DSK (Digital Signal processing Kit) evaluation module. When using EVMs, emulators, and simulators the developers can change, during the development process, the model of the DSP being tested. 6

15 Unit 1 DSP Trainer Familiarization Once functional, the final test for a program are implemented with a DSP system. The programs included and used with the Digital Signal Processor are written in the assembler language. The assembler language used is one specific to the TMS320C5x EVMs, it has added instructions in it called DSK directives. To run, or examine the function of, a Digital Signal Processor program, the executable file (*.dsk) must be downloaded into the DSP through the C5x VDE, the Trainer's debugger. NEW TERMS AND WORDS digital - pertaining to data represented by numbers. A digital signal is not continuous, it does not have a numerical value associated with every point in time, and it has discrete amplitudes. signal - a time-dependant physical quantity (like a current level) by which, for example, information is transmitted in an electronic system or circuit. processor - a device that performs operations on data according to specific rules given to it by a list of instructions. real-time - a processor operating mode under which a data sample is received, processed, and returned before the processor's next data sample is received. This is done so quickly as to allow the user: to respond instantaneously, affect the functioning of the environment or guide the physical processes which the processor controls. Most interactive systems operate in a real-time mode. fixed-point - a system of arithmetic in which all numerical quantities are expressed by a number of bits. In this system the decimal point is implicitly located at some predetermined position. MIPS - a unit of measure proportional to the performance level of a processor. One MIPS corresponds to the execution of a Million Instructions Per Second (it is sometimes abbreviated MIP). Often the multiply/accumulate instruction, common to nearly all DSPs, is used to calculate the MIPS rate. parallelism - parallelism is a type of computing in which several independent operations are carried out at the same time instead of one after the other. 7

16 Unit 1 DSP Trainer Familiarization floating-point - a system of arithmetic characterized by a notation where real numbers are represented by a fixed-point value known as the mantissa, and by an integer known as the exponent. The real number is equal to the mantissa multiplied by two to the power of the exponent. code - a piece of programming text found in a programming language. machine code - instruction code recognized and executed by a microprocessor. The code is expressed in a binary numerical representation. mnemonics - a symbolic representation made of alphabetic letters and designed to aid human memory; It commonly represents the operation code of an assembly language instruction-name. The assembler translates the mnemonic into machine code. assembler - a program that converts, for execution, symbolic instructions (mnemonics) into machine code. linker - a program that creates one executable file from one or many object files. object files - File which consists of machine code directives that usually represent a portion of a program. C language - a general purpose programming language that produces code independent of the type of microprocessors it is developed for. high-level language - a programming language closer to human language, each program instruction or statement corresponds to one or more machine-executable instructions. low-level languages - a programming language close to machine language and in which each mnemonic has a one-to-one equivalence with machine code. compiler - a program that converts a high-level language into a low-level machine language. EVMs - Evaluation Modules are low cost development boards that include a target processor, and a limited amount of peripherals and of external memory. EVMs are used to test codes in real-time. emulators - a combination of hardware microprograms and software that enables one computer system to execute programs written for another type of microprocessor. simulators - a program that permits a computer system to imitate the logical operation of another type of microprocessor. surface mount - a type of technology that allows for a fully automated manufacturing process for printed circuits. It consists of soldering the pieces directly on the surface of a printed circuit board (PCB). CODEC - is the abbreviation for CODer-DECoder. It is an electronic circuit that converts analog signals into digital representations, and decodes digital signals into analog form. anti-aliasing filter - low pass filter designed to remove, from the input signal the high frequency components that degrade the analog-to-digital conversion of the output signal. post-filter - low pass filter designed to remove, from the output signal, high frequency components that are created by the digital-to-analog conversion. interrupt - the suspension of a computer process caused by an external event. Once the external event handling procedure is completed, the computer process is resumed. hand-shaking - the dialogue that takes place between two devices before a transfer of information begins. Hand-shaking is the exchange of predetermined signals for purposes of control when a connection is established. 8

17 Unit 1 DSP Trainer Familiarization label - a symbol that begins in column 1 of an assembler source statement. A label is the only assembler statement that can begin in column 1. mnemonic - a symbolic representation made of alphabetic letters and designed to aid human memory; It is commonly an abbreviation, or shortened form, of the description of the machine code operation that it performs. The assembler translates the mnemonic into machine code. operands - the part of an instruction that designates where the central processing unit (CPU) will fetch or store data during instruction execution. comment - the portion of a source statement that documents or improves the readability of a source file. Comments are not compiled, assembled, or linked; they have no effect on the object file. registers - a storage device having a specified capacity such as a bit, a byte, or a computer word and usually intended for a special purpose. conditional blocks - a block of code that is only assembled if a certain conditional statement is true. CPU - the CPU, Central Processing Unit, is that portion of the processor involved in arithmetic, shifting, and Boolean logic operations, as well as the generation of data- and program-memory addresses. peripheral - in a data processing system, any equipment, distinct from the central processing unit, which may provide the system with outside communication or additional facilities. breakpoints - breakpoints are used to correct or debug programs. A breakpoint is a place in a computer program, usually an instruction, where the execution of the program is interrupted. subroutine - a sequence of computer instructions that perform a specific task and that are usually used repeatedly by the main program (routine). wavetable - a list of values that define one period of a signal. The wavetable is stored in memory and is used to generate a waveform. dma - an abbreviation for Data Memory Address. pma - an abbreviation for Program Memory Address. clock cycle rates - synonymous with processor cycle rate, it usually refers to the rate at which the DSP system performs its most basic unit of work. dynamic range - the dynamic range is the ratio between the largest and smallest value a quantity or parameter can take. internal arithmetic unit - that part of a computer which performs arithmetic operations. E.g., taking two numbers stored in specific places in memory, adding them together, and storing the result. numerical formats - a programmer's convention where each bit in a word of information is implied to be weighted by a certain value. two's complement - a numerical convention for the representation of values in fixed-point processors. The left-most bit represents a negative decimal value and the remaining bits each represent a different positive decimal value. weights - the factor by which a digit in a binary number is multiplied to obtain its additive contribution in the representation of a real number. binary point - the character, in binary notation, that separates the integral part of a numerical expression from its fractional part. 9

18 Unit 1 DSP Trainer Familiarization EQUIPMENT REQUIRED F.A.C.E.T. base unit DIGITAL SIGNAL PROCESSOR circuit board C5x VDE program Ex1_1, ex1_2 assembler (asm) and program (dsk) files Oscilloscope Multimeter NOTES 10

19 Unit 1 DSP Trainer Familiarization Exercise 1 Introduction to the DSP Circuit Board EXERCISE OBJECTIVE Upon completion of this unit, you will be familiar with the location and the function of each of the various components of the DIGITAL SIGNAL PROCESSOR training system. DISCUSSION The circuit board has two functional sections: the section containing the circuit board accessories, and the section containing the Digital Signal Processor and its peripherals. The circuit board accessories are the: POWER SUPPLY with AUXILIARY POWER INPUT DC SOURCE MICROPHONE PRE-AMPLIFIER AUDIO AMPLIFIER The POWER SUPPLY circuit block delivers a filtered and regulated DC supply to the entire circuit board. The circuit board can be operated in two different ways. Either the input voltage for the Power Supply can be received from a Lab-Volt FACET Base Unit or it can be received through external ±15 V connections found on the AUXILIARY POWER INPUT block. The DC SOURCE block delivers a DC voltage varying, depending on the position of the potentiometer, between -3.5 Vdc and +3.5 Vdc. The DC SOURCE can be used as the source of an input reference signal for programs run on the DSP. The MICROPHONE PRE-AMPLIFIER is used to adjust a microphone's signal to a level suitable for input into the DSP. The GAIN potentiometer varies the output-level between a low and a high value. To be able to hear the signal from the ANALOG OUTPUT, located on the CODEC block, the AUDIO AMPLIFIER is used. Either the speaker or the headphones can be used to listen to the signal. 11

20 Unit 1 DSP Trainer Familiarization The second functional section of the circuit board, the DSP and its peripherals, contains the: DSP CODEC I/O INTERFACE INTERRUPTS AUXILIARY I/O SERIAL PORT The Digital Signal Processor is found at the heart of a digital signal processing system. The DSP block contains a TMS320C50 DSP integrated circuit (IC) in a 132-pin surface mount package. It may reach execution speeds of up to 50 MIPS. There are many kinds of DSPs, they may vary in cycle speeds. The calculation speed is set by a DSP's clock. However, the speed is limited by the IC's internal system design constraints. Some DSPs use an internal oscillator to set the clock and others use an external oscillator. The DSP used on the circuit board is configured to use an external oscillator. The Oscillator located on the circuit board provides it with a 40 MHz reference signal. The DSP divides this signal to make a 20 MHz internal one (the master clock frequency) that it uses to time its instruction cycles. Some DSP programs are written to internal ROM during the manufacturing process, most, however, use external ROM to store their program. Both types of DSPs access their ROM at boot-up and store the program to RAM for execution. A DSP uses digital signals. To be able to interact with the outside world it must have a translator to convert the analog signals to digital ones and then back again. A CODEC is the translator that is used for this purpose. A CODEC is usually made up of the following components: a programmable input GAIN an ANTI-ALIASING FILTER an Analog-to-Digital converter a Digital-to-Analog converter a POST-FILTER The I/O INTERFACE is a means to display and to input program information. The 8-position DIP switch enters an 8-bit number into the DSP. Depending on the program being used the information will be processed in different ways. The 7-segments displays are used to show program information to the DSP user. 12

21 Unit 1 DSP Trainer Familiarization Like most microprocessors, DSPs have interrupt control capabilities. Two push-buttons can be used as user input devices for a program. When one of the push-buttons is pressed an interrupt is signaled within the DSP and the program code associated with it is executed. The AUXILIARY I/O section was added for signal monitoring purposes and for prototyping of additional DSP exercises done with the circuit board. The headers of the AUXILIARY I/O block can be used to interface the DSP with an external circuit. The external circuit can be powered by the 10-pin header located in the AUXILIARY I/O block. The AUXILIARY I/O section has three headers. ±5 Vdc and ±15 Vdc connection points are available on the 10-pin right header; these can be used to power an external circuit. The circuit board supplies have a common ground. The left header outputs the 8 LSB pins (labeled D0 to D7) of the external DSP data bus, and include 4 pre-decoded addresses (labeled PA0# to PA3#) which can be used for prototype development are also included. The middle header has the following input/output (I/O) pins: Data, Program, and I/O space select (DS#, PS#, IS#) Timer output (TOUT) Read select and Write enable for external devices (RD#, WE#) Read/Write select for external accesses (R/W#) Interrupt acknowledge signal (IACK#) External interrupt input (INT4#) Directional and Chip select to control external data transfer (DIR, CS#) The DSP on the circuit board is programmed to be the slave of a host computer. For the DSP Trainer to be used the circuit board SERIAL PORT must be connected to one of your computer's serial ports. NOTE: If the host computer does not have a second serial port connection available, then at the appropriate times during the exercise procedures, you can disconnect the Base Unit serial link and use it to connect the circuit board SERIAL PORT to the computer. The C5x Visual Development Environment (VDE) manages hand-shaking between the circuit board and your computer. It controls all input and output from the DSP's memory via the serial link. Once the communication link between your computer and the DSP board is established, the C5x VDE can be used to download a program into the DSP. 13

22 Unit 1 DSP Trainer Familiarization NOTES 14

23 Unit 1 DSP Trainer Familiarization Exercise 2 The Assembler and Debugger EXERCISE OBJECTIVE Upon completion of this exercise, you will understand basic DSP source file syntax. You will be able to operate the debugger that accompanies the DIGITAL SIGNAL PROCESSOR. DISCUSSION The source file for a DSP program can be written inside of a text editor, virtually any ASCII editor can be used. The instruction lines found in the source file and used in the assembler programming language are called source statements. A DSP program is a list of these assembled source statements. The source statements used in the assembler language have a very precise syntax. There are four fields that make up a statement: the label (optional) the instruction mnemonic the instruction mnemonic operands (the number of operands depends on the instruction used) the comment (optional) Each source statement field must be separated by one or more blanks. The source statements themselves must either begin with a label or a blank. The beginning of a comment line must be indicated by a semicolon or an asterisk. A source file may also contain assembler directives. Directives supply the program with data and control the assembly process. Assembler directives permit the following to be done: initialize program instructions and data values into memory. define symbolic names for certain DSP registers (using the.mmregs directive). reserve space in memory for variables that have not been initialized. assemble conditional blocks. The executable file dsk5a.exe is the assembler program used with the DIGITAL SIGNAL PROCESSOR. When a source file (*.asm) is assembled, a dsk file (*.dsk) and a listing file (*.lst) are created. 15

24 Unit 1 DSP Trainer Familiarization The dsk file, also known as the program file, contains a list of machine code corresponding to assembled source statements. To run a program, the program file must be loaded into the DSP. The DSP is loaded with the dsk file. The listing file lists all source statements, line numbers and any errors that occurred during assembly. When the program is viewed inside of the debugger, the listing and the dsk files are used to create a display of the source file statements. The C5x VDE is the debugger used with the Digital Signal Processor. It has the following functions: Load dsk programs into memory and view the program code, run and halt the program and execute single step commands (execution of single instructions), display in a viewing window the CPU registers and peripheral registers, display in a viewing window the DSP memory areas, graph DSP memory values while the DSP program is running, edit CPU registers, DSP program instructions and memory, place breakpoints at specific DSP source statements. The C5x VDE uses the listing file to dis-assemble (contrary of assemble) machine code contained within the dsk file. The dis-assembled code is then displayed. When a dsk file is loaded into DSP memory the Dis-Assembly window automatically opens. The Dis-Assembly window displays four columns of information: 1. The address in memory where the instruction is found, 2. the instruction in machine code, 3. the instruction mnemonic, 4. the instruction operands. The source statement highlighted with a yellow line represents the next instruction that the DSP will execute. A source statement highlighted with a purple line corresponds to an instruction where a breakpoint has been set. A toolbar located at the top of the debugger screen has commands that aid in the control of program execution. Run and Halt, are used to begin and stop program execution. StepInto: You can single step through the code by clicking on the StepInto button on the Toolbar. This will execute one program instruction for every click of the button. StepOver: If you do not wish to single step through a subroutine, you can execute the StepOver command once you reach a CALL function. The entire function will then be executed, at this point single stepping can resume. StepOut: The StepOut command will execute all of the instructions necessary to execute a subroutine. Execution will be halted once a RET (return from subroutine) assembler instruction is encountered. 16

25 Unit 1 DSP Trainer Familiarization The value of all CPU registers are shown in the C5X Registers window. You will become familiar with many of the CPU registers as you advance through the course. For the moment, it is sufficient to know that these registers contain DSP system information. The registers displayed in the window contain values, DSP status and control bits and instruction pointers. Memory is viewed inside of the debugger by opening a Memory display window. The memory addresses to be monitored are user selected. As many memory windows as needed may be launched inside of the debugger. When a dsk file is loaded inside of the C5x VDE, the following is true for the Dis-Assembly and Memory display windows: All source statement labels, used to declare a variable within the source code, appear in blue. All comments of labeled source statements appear in green. The Memory display window can be used as a Watch Window. Variables stored in memory may be watched and edited if necessary. Within all viewing windows, the following is true: Memory addresses and registers appear in red when the values stored within them are modified during the execution of the previous instruction. Memory addresses and registers (except the RAM, XF and INTM registers) can be edited by simply double-clicking on the desired register or memory address. The Graph command in the View menu can be used for graphical displays of data values. Signals can be viewed in either the time or frequency domain, at any point in your program. Breakpoints halt a program for the debugger user to be able to verify the status of the loaded program after a certain instruction. When an instruction, in the Dis-Assembly window, is double-clicked on, a breakpoint is set on the instruction. The associate breakpoint window can be launched by executing the Associate Breakpoints command in the Options menu. A window can be continuously refreshed by using the associate breakpoint feature. A selected display window (Graph display, Memory display, CPU Register display,...) can be associated with any breakpoint. When a breakpoint is executed any display windows that are associated with it are updated. This effectively connects a probe to a specific point in the program. 17

26 Unit 1 DSP Trainer Familiarization NOTES 18

27 Unit 1 DSP Trainer Familiarization Exercise 3 Processor Arithmetic EXERCISE OBJECTIVE Upon completion of this exercise, you will be familiar with the numerical formats and representations used within DSPs. DISCUSSION Digital Signal Processors are categorized by the way that their arithmetic is performed. A DSP can either be: a fixed-point DSP, or, a floating-point DSP The type of DSP chosen for a specific application depends on the suitability of its arithmetic for the task. The TMS320C50 is a fixedpoint DSP. Fixed-point DSPs are usually cheaper than their floating-point counterparts because they contain less silicon and have less external pins. Fixed-point devices generally have faster clock cycle rates. In 1998, these clock cycles were as small as 10 ns, corresponding to a processor cycle rate of 100 MHz. Floating-point devices are usually more flexible because their arithmetic system has access to a wider dynamic range and in many cases these systems are more precise. A typical 16-bit fixedpoint processor stores coefficients and data values with 16-bit precision. However, within the internal arithmetic unit of the DSP, intermediate values are kept at 32 bits of precision. By so doing, the cumulative rounding error made during calculations is minimized. When you use your computer or your calculator you can calculate such values as: (-1*23) or (3.453) A DSP can also provide answers to the same types of questions. A programmer must use certain numerical formats so that every value desired to be used in the DSP has a binary representation associated with it. This binary value will need at times to represent either a positive or negative, fractional or integer number. Since a DSP is a processor that specializes in doing rapid calculations, it is essential to understand how the diverse range of numeric values can be expressed. Integers, both negative and positive, are represented by the two's complement integer format (2s-format). Fractional numbers, both negative and positive, are represented by the two's complement fractional format (Q-format). These formats differ only by the associated weights that are given to each bit of information. In two's complement integer notation (2s-format) a negative sign is associated with the most significant bit. The 2s-format provides a numeric range covering: -2N-1 to +(2N-1-1) where N represents the number of bits in the binary number. 19

28 Unit 1 DSP Trainer Familiarization The two's complement fractional format (or Q-format) associates different weights with each bit as well. The existence of the binary point separating the fractional weighted values from the integral weighted values is implied. In Q15-format the most significant bit is the sign bit and it is given a weight of -20. This implies that the binary point is located between the MSB and the 14th bit. By changing the position of the binary point the weight given to each bit is also changed. Consequently, the dynamic range and the precision of the two's complement fractional format may vary with the type of format being used. Note that by continuing to move the binary point further and further to the right a handy relationship is uncovered. The 2s-format and the Q15-format decimal representations are proportional by a scaling factor of 215. The 2s- and Q-formats can be used by the fixed-point internal arithmetic units of any DSP. These formats are numerical conventions used by programmers. The binary arithmetic done inside of a fixed-point DSP is not affected by the format of the binary number used. Floating-point DSPs generally use a 32-bit format where the 24 left-most bits represent the mantissa and the 8 remaining bits represent the exponent. So that a continuous range of values is covered by a 32-bit floating-point number, the mantissa must vary over -1 to 0 and +1 to +2. This means that the bit weighted by 20 will always be equal to 1. Therefore, it becomes unnecessary to store it in memory and during calculations it becomes an implied bit. Floating-point processors are usually more precise and have a larger dynamic range. While in theory the choice between fixed- and floating-point arithmetic is independent of the choice of precision, in practice floating-point processors usually provide higher precision. This arises because more bits are provided to define the mantissa (24 bits + 1 implied bit) compared to fixed-point DSPs that usually have 16 bits, although 20- and 24-bit fixed-point DSPs exist. 20

29 Unit 1 DSP Trainer Familiarization NOTES 21

30 Unit 1 DSP Trainer Familiarization 22

31 Unit 2 CPU Architecture UNIT 2 CPU ARCHITECTURE UNIT OBJECTIVE Upon completion of this unit, you will understand the basic difference between the architecture of a digital signal processor and that of a general-purpose processor. You will be familiar with the layout of the internal elements of a DSP CPU. UNIT FUNDAMENTALS In the 1950s, analog signal-processing circuit designers began to look to computers to simulate their designs. They were able to simulate the circuits, but not in realtime. It was until the mid- 1970s that computers became powerful enough to do the realtime signal processing of the analog circuits that they had been simulating. DSPs today are in fact the result of years of research that even now is still a very active field. Their specialized architecture allows them to implement signal processing algorithms more effectively than general-purpose processors. The basic processor architecture that is most often implemented in general-purpose processors is known as the Von Neumann architecture. The Von Neumann architecture has a single memory space that is used for both data and instructions (instructions belonging to the program). Digital Signal Processors have historically used a slightly different internal structure known as the Harvard architecture. The Harvard architecture, as opposed to the Von Neumann, has separate memory spaces for data and program instructions. The Harvard architecture differentiates between the types of information it stores in memory. The information is either a data word (an operand for an instruction) or a program word (the instruction). Data words are kept in data memory space and are read from and written to different locations within the processor via the data bus (the DB). Programming words are kept in program memory space and are read from and written to different locations within the processor via the program bus (the PB). The Von Neumann architecture only uses one bus. This bus accesses both data and program instructions. A typical DSP contains: Memory a Central Processing Unit (CPU) Peripherals a Bus structure 23

32 Unit 2 CPU Architecture Memory consists of all of the addressable storage space inside of a processing unit: Program Read-Only Memory (ROM) Data/program Single-Access RAM (SARAM) Data/program Dual-Access RAM (DARAM) The Central Processing Unit (CPU) is that part of a processor where reside the circuits that control the interpretation and execution of instructions. The peripherals are those elements such as the timer, that are used by the CPU to time the execution of instructions or, such as the serial ports, to communicate with devices exterior to the processor. The bus structures of processors are differentiated by the way that the individual processor buses are interconnected with the other elements of the processor (CPU, memory and peripherals). It is essentially the bus structure that differentiates a Harvard architecture from a Von Neumann architecture. The CPU of the TMS320C50(C50) contains: Program control elements Memory-mapped registers an Auxiliary Register Arithmetic Unit (ARAU) a Central Arithmetic Logic Unit (CALU) a Parallel Logic Unit (PLU) The CPU elements are found in practically all DSP models, but they might go under different names. E.g.: The CALU of the DSP32xx family, designed by Lucent Technologies, is named a Data Arithmetic Unit (DAU). The Program Controller is the unit that controls processor instruction execution. The PC (Program Counter register) and status and control registers are at the heart of Program Controller unit operation. Memory-mapped registers are on-chip registers mapped to (associated with) a data memory address. There are 28 core CPU registers, 17 peripheral registers, 16 I/O port registers, and 35 reserved registers in the C50. In total, 96 registers are mapped into data memory. Since memory-mapped registers are addressed in data memory space, they can be written to, and read from, in the same way as any other data memory location. The Auxiliary Register Arithmetic Unit (ARAU) is used to deduce (calculate and compare) and keep track of the position of information held within DSP memory. The C50 has eight Auxiliary Registers (ARs) which are used by the ARAU to store important memory addresses. The Central Arithmetic Logic Unit (CALU) is responsible for executing logic and all arithmetic operations within a DSP. For example on the TMS320C50 DSP, the CALU executes these operations with a 16-bit x 16-bit multiplier, an accumulator, operand registers, binary shifters, and a 32-bit 2s-complement Arithmetic Logic Unit (ALU). The Parallel Logic Unit (PLU) is a 16-bit logic unit that executes logic operations without interrupting the CALU (the main CPU arithmetic and logic unit). 24

33 Unit 2 CPU Architecture NEW TERMS AND WORDS architecture - architecture is a term applied to the overall structure and the logical interrelationships of the components of a processor (or of a computer, a network) and its software. Processor architecture can be divided into five fundamental components: input/output, storage, communication, control, and processing. general-purpose processors - a processor designed to operate on a wide variety of computational and logical problems. E.g., the Intel Pentium line of processors. memory space - memory space is a property of the DSP. Memory space represents the range of addresses allocated to either internal or external memory devices by the DSP bus structure. Onchip memory (ROM and RAM) for a specific processor is said to reside in the processor memory space as does the processors peripherals and memory-mapped registers. bus - a bus is a transmission path for the signals sent between processor devices. ROM - ROM, Read Only Memory, this type of memory is used to store program code during the manufacturing process. ROM is a non-volatile memory because it retains its data after the processor has shut down. RAM - RAM, Random Access Memory. This is usually used to store temporary program information. RAM is a volatile memory because when power is removed the stored information is lost. registers - a group of bits used for temporarily holding data or for controlling, specifying, the status of a device. status and control registers - the operation of the TMS320C50 DSP CPU is determined by the information found inside of four 16-bit Status and Control Registers. The four status and control registers are: the Circular Buffer Control Register (CBCR), Processor Mode STatus register (PMST), STatus Register 0 (ST0), STatus Register 1 (ST1). Arithmetic Logic Unit (ALU) - that part of a processor that performs arithmetic (addition, subtraction) and logic (AND, OR,...) operations. MAC - An abbreviation (mnemonic) for Multiply and ACcumulate, an operation often executed in DSPs. sign-extension - the process of filling the high-order bits of a number with the sign bit. For example, when loading a 16-bit number into a 32-bit field, the sign bit of the 16-bit number is extended into bit positions 17 to 32. overflow - in an arithmetic operation, a result whose absolute value is too large to be represented within the range of the numeration system in use. underflow - in an arithmetic operation, a result whose absolute value is too small to be represented within the range of the numeration system in use. OVerflow saturation Mode (OVM) - when enabled, any overflow value produced by the ALU appears as the maximum possible value. For the TMS320C50, the value appears as 7FFF FFFFh. When enabled, any underflow value produced by the ALU will appear as h, the minimum possible value. dma - an abbreviation for data memory address. memory - a device in which information can be inserted and stored and from which it may be extracted when wanted. access - to access memory is the action of reading the value held within a certain memory location or of storing a value to a certain memory location. 25

34 Unit 2 CPU Architecture non-volatile - a characteristic of a memory device not subject to the loss of stored information when power is removed. volatile - a characteristic of a memory device subject to the loss of stored information when power is removed. allocation - to allocate memory is to associate a specific address of the data or program bus with a memory storage space. memory block - a portion or section of memory storage. A storage block is considered a single element for holding a specific or fixed number of words. Harvard Architecture - the internal organization of a microprocessor which is characterized by separate memory spaces for program instructions and data. The program and data memory spaces are each accessed by one of two parallel buses. The Harvard architecture allows each memory space to be accessed simultaneously. modified Harvard architecture - a modified Harvard architecture is a variation on the basic structure of the Harvard architecture. The variations are used to increase the simultaneous memory accesses of the DSP. A modified Harvard architecture is also known as an extended Harvard architecture or as a Super Harvard ARChitecture (SHARC). memory bandwidth - the memory bandwidth of a processor is proportional to the number of memory cycles per instruction cycle. A high memory bandwidth occurs in processors with many data and address buses. program/data memory - program/data memory is a memory that can be accessed by either one of the two parallel buses inside of a processor with a Harvard architecture. instruction cache - an instruction cache saves an instruction and is usually used to repeat that instruction in a program. An instruction cache is also known as a program cache. memory configuration bits - these bits are status and control bits that select the memory configuration that is used by the DSP. Within the TMS320C50 DSP the MP/MC#, RAM, OVLY bits are found within the Processor Mode Status Register (PMST) and the CNF bit, another memory configuration bit, is found in Status Register 1 (ST1). kernel - the programs that form the core or the most essential parts of an operating system for a computer. Nucleus is a near-synonym for kernel and tends to be used where the effects are achieved by a mixture of normal programming and micro coding (such as is done with the assembler language). addressing modes - an addressing mode is one of a set of methods used for specifying the operand(s) of a machine code instruction. An addressing mode describes to the processor the method that it will use for storing and retrieving data from memory. implied addressing - implied addressing means that the instruction operand addresses are implied by the instruction. An example of a 'C50 instruction that uses implied addressing is ADDB (addition of ACC and ACCB registers). direct addressing - a type of addressing that encodes the operand address within the instruction word or within a word following the instruction word. This addressing mode is also known as register-direct addressing or paged memory-direct addressing. immediate (short and long) addressing - immediate addressing encodes the operand in the instruction word or in a separate word that follows the instruction word. indirect addressing - in this type of addressing the operand being addressed resides in memory and the address of the memory location containing the operand is stored within a register. It is this register that is specified during indirect addressing. 26

35 Unit 2 CPU Architecture circular addressing - an addressing mode in which the contents of a register is used to cycle through a range of addresses, creating a circular memory buffer. Circular addressing is also known as modulo addressing. paged memory-direct addressing - a type of addressing that encodes the operand address within the instruction word or within a word following the instruction word. This addressing mode is a type of direct addressing. immediate addressing - immediate addressing encodes the operand in the instruction word or in a separate word that follows the instruction word. indirect - in this type of addressing the operand being addressed resides in memory and the address of the memory location containing the operand is stored within a register. It is this register that is specified during indirect addressing. Auxiliary Register Arithmetic Unit - an Auxiliary Register Arithmetic Unit (or ARAU) is the name given by Texas Instruments the developers of the TMS320C50 DSP, to the AGU of the DSP. This is common practice, many DSP developers give different names to the units (like the AGU) inside of their DSPs. data buffers - a data buffer is a section of memory that is used to store data. The data arrives from an off-chip source (such as a CODEC) or from a previous computation. It is held in the buffer until the processor is ready to process the data. circular buffers - a section of memory used as a buffer and that appears to wrap around on itself. Circular buffers are typically implemented in software on conventional processors and via modulo, circular, addressing on DSPs. FIFO - a First-In, First-Out queue in which the most recent arrival is placed at the end of the waiting list and the item waiting the longest receives service first. A FIFO is used as a buffer to connect two devices operating asynchronously at different speeds. Each device is connected to one end of the FIFO. ARAU - ARAU stands for Auxiliary Register Arithmetic Unit, it is the unit within a DSP that is responsible for addressing. SACL *+, 0, AR0 - the 'C50 SACL instruction stores the ACCL (ACCumulator Low) bits in memory. At this point in the program the accumulator contains the most recent sample received by the DSP from the CODEC. The indirect addressing operands tell the CPU to store the sample in one of the dma labeled XN0 to XN15. The dma is pointed to by auxiliary register 0 (AR0). ADD *+, 0, AR0 - the 'C50 ADD instruction is used to add the operand to the accumulator. In this case, the ADD instruction is being repeated, and is indirectly addressing the 16 mostrecently received samples. This in effect adds the samples together (an operation required by the averaging process). SACL 10 h - the 'C50 SACL instruction, as previously stated, stores the ACCL (ACCumulator Low) bits in memory. In this particular case, when SACL is executed, the accumulator holds the average of the 16 most recent samples received by the DSP and stored in memory. SACL stores this average to the dma labeled OUTPUT. interrupt service routine - an interrupt service routine (ISR) is a subroutine that is run every time that a specific event occurs. In this case, program ex2_3.asm executes the ISR when a sample from the CODEC is received by the DSP. In RUN mode, execution of the ISR is done automatically. 27