Exercise 2-3. Addressing EXERCISE OBJECTIVES

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Exercise 2-3 Addressing EXERCISE OBJECTIVES Upon completion of this exercise, you will understand the function that of address generation unit within a DSP and the specialized addressing modes that

1 Exercise 2-3 Addressing EXERCISE OBJECTIVES Upon completion of this exercise, you will understand the function that of address generation unit within a DSP and the specialized addressing modes that it offers. DISCUSSION A processor uses an address to identify specific memory storage spaces (such as a DARAM memory element or a peripheral register). An address in fact becomes the name of a certain location. The address is used any time that the processor is required to write an operand to or read an operand from the location. Addressing is the means by which operand locations are specified to the processor when a read or write is executed. Many addressing modes exist. Depending on the addressing mode used with an instruction, an operand could be fetched directly from an internal memory address or from a register. 2-51

2 The most common types of addressing found in DSPs are: implied addressing direct addressing immediate (short and long) addressing indirect addressing circular addressing Different types of DSPs offer a variety of different addressing modes. The type of addressing used with an instruction influences program flexibility and performance. Certain types of addressing were meant only to be used for specific situations and others are restricted for use by a small processor instruction subset. Implied addressing is when the operand addresses are implied by the instruction. An example of a 'C50 instruction that uses implied addressing is: ADDB This instruction adds the ACC and ACCB registers together. ACC and ACCB are thus the implied operands for the instruction. Direct addressing encodes operand address within the instruction word or within a word following the instruction word. An Example of Direct Addressing with One Program Word Instruction Opcode Machine Code Partially Encoded Operand Address 7 bits wide The direct addressing used within the TMS320C50 is known as paged memorydirect addressing. When the instruction word is executed, the encoded 7-bit address is concatenated with the upper 9 bits of the address held in a status and control register. Direct addressing encodes the operand address within the instruction word or within a word following the instruction word. An Example of Direct Addressing with Two Program Words 2-52

Instruction Opcode Machine Code 1 1 1 0 1 1 0 0 1 0 1 0 1 0 0 1 0 0 0 1 1 1 0 1 0 1 1 0 1 1 1 0 Encoded Operand Address Memory-direct and register-direct addressing are other forms of direct

3 Instruction Opcode Machine Code Encoded Operand Address Memory-direct and register-direct addressing are other forms of direct addressing. Both use a second word following the instruction word and which encodes the operand address. Processors using paged memory-direct addressing have data memory divided up into memory pages. Each memory page corresponds to a section of memory. A special register (known in the 'C50 as the Data Page pointer, DP) stores the number of the current memory page. In the case of the 'C50, the DP points to one of 512 possible data pages. Each page containing 128 words. 2-53

4 Direct addressing within the TMS320C50 requires that the 7 lower bits of the data memory address be encoded within the instruction word. When the word is executed, the 9 bits from the Data memory Page pointer (DP) are concatenated with the 7 bits encoded within the instruction word. The operation forms the full 16-bit data memory address of the operand. Assume the 9-bit Data memory Page pointer (DP) of a DSP held the value 126 (7E h). The 7 lower bits of the addressed dma encoded within an instruction word were equal to 43 h. What is the data memory address that the instruction word requires? a. 3F43 h b. 00C1 h c. 867E h d. 7E43 h Example of Short Immediate Addressing in the TMS320C50 DSP. ADD #05Ah ADD Opcode A h Operand Known as short immediate addressing, the type of addressing shown encodes the operand into the instruction word. 2-54

5 Example of Long Immediate Addressing in the TMS320C50 DSP. ADD #0B948h ADD Opcode B948 h Operand Known as long immediate addressing, the type of addressing shown encodes the operand into a second word that follows the instruction word. DSPs use indirect and circular addressing to manage operand address sets. These are required when performing repetitive calculations on data series. The series are often stored sequentially in memory. DSPs include an Address Generation Unit (AGU). The AGU is dedicated to the calculation of addresses for the different types of addressing modes. 2-55

The AGU has its own separate arithmetic unit, AGU arithmetic is independent of the CALU. All address calculations take place in parallel with instruction execution.

6 The AGU has its own separate arithmetic unit, AGU arithmetic is independent of the CALU. All address calculations take place in parallel with instruction execution. The incorporation of an Address Generation Unit (AGU) within a DSP allows arithmetic processing to proceed at maximum speed while multiple instruction operands are specified. The figure shows the Auxiliary Register Arithmetic Unit (ARAU) of the TMS320C50 ('C50). The 'C50 AGU has eight memory-mapped auxiliary registers, identified AR0 through AR7. The registers can be used for storing addresses or temporary data. Indirect and circular addressing require the use of some of the Auxiliary Registers (AR0 to AR7). Within the ST0 register of the TMS320C50 is a 3-bit field identified as ARP, the Auxiliary Register Pointer. ARP is a 3-bit wide field that holds a value between 0 and 7. The field specifies the current auxiliary register (AR0 to AR7) being used for indirect-register addressing. Once the appropriate registers have been configured, the AGU provides the necessary operand address required by the processor for the execution of an instruction. As stated previously, the address generation unit operations are executed in parallel with the CALU arithmetic instructions. 2-56

7 Any location in data memory can be read from or written to using an address contained in an Auxiliary Register (AR0 to AR7). To select the specific AR used to address data memory, the Auxiliary Register Pointer (ARP) must be loaded with the value of the AR (0 to 7) to be used. The ARP points to the current auxiliary register used to address memory. When an assembler instruction supporting indirect addressing, such as, the TMS320C50 DSP addition (ADD) instruction: ADD * is executed, the processor fetches the data memory address from the correct auxiliary register (which is pointed to by ARP). In this example, ARP is equal to 2 and so the current auxiliary register is AR2. When an assembler instruction supporting and using indirect addressing is executed, the address for the operand will be fetched from AR2. Many DSP applications manage data buffers. Circular addressing, also known as modulo addressing, is used to manage circular buffers. 2-57

In real-time applications such as the ones executed by DSPs, the programmer must determine the size of the data buffer and then must set aside a portion of memory for the buffer.

8 In real-time applications such as the ones executed by DSPs, the programmer must determine the size of the data buffer and then must set aside a portion of memory for the buffer. The data buffers implemented on DSPs generally use a first-in, first-out (FIFO) protocol. This means that the first values that are written to the buffer will be the first values read out of the buffer. For the programmer to manage data into and out of the buffer, two address pointers must be maintained (in the case of the 'C50, two auxiliary registers are used as the pointers). One of the pointers, the read pointer, indicates the current value to be read from the buffer. The second pointer, the write pointer, indicates the current location to write a new value to in the buffer. 2-58

After each read or write operation in a FIFO buffer with linear addressing the corresponding pointer moves down (increments to the next location in the buffer).

In a FIFO buffer with circular addressing, after the read or the write pointer reaches the end of the buffer it automatically advances to the start of the buffer.

9 After each read or write operation in a FIFO buffer with linear addressing the corresponding pointer moves down (increments to the next location in the buffer). Once the pointers have advanced to the end of the buffer they must be reset to point back to the beginning of the buffer. In a FIFO buffer with circular addressing, after the read or the write pointer reaches the end of the buffer it automatically advances to the start of the buffer. The automated end-of-buffer verification and advance-to-start-of-buffer operation (usually automated by the AGU) make the buffer appear circular to the programmer. Many DSP processors provide a form of circular addressing. However, the facility of use and the mechanisms used to control it vary from DSP to DSP. The approach taken to implement circular addressing in the TMS320C50 is to use start and end address registers. The registers, respectively named CBSR1 and CBER1, hold the start and end addresses for the circular buffer. 2-59

10 The AGU of the 'C50 takes charge of determining whether one of the write or read pointers is at the end of the buffer or at the beginning. The AGU, thus automates the end-of-buffer verification and advance to start-ofbuffer operation. Circular addressing is indirect addressing, however, with added circular buffer management. TMS320C50 Instructions... MAR *, AR3 LAR AR3, #0984h... ADD *+, 0, AR0... Data buffers are often used and always implemented with indirect addressing (circular and linear). Processors require two additional elements to be specified within the indirect address field of an instruction when indirect addressing is used: & The content of the current AR can be incremented, decremented or it can stay unchanged. The change to be implemented must be specified. E.g., Increment by 1: AR3 = 0984h, AR3 + 1 = 0985h. & Whether the Auxiliary Register Pointer ARP should be updated to another AR or should stay the same must be specified in the indirect address field of the instruction. E.g., Update ARP from AR3 to AR0. If the start address for a circular buffer is 0980h, the end address is 09E4h and the current address of the read pointer is 09E4h then what is the next address that the read pointer will have? a. 09E5 h b h c. 09E3 h d h Most addressing modes covered in this section involve attaching a second word to the instruction word. These addressing modes thus require two program words to be stored in memory, increasing program size and slowing execution time. 2-60

11 To remedy the effects of so called long addressing modes (2 program words in length) many processors offer short versions of some of their addressing modes, or simply put, short addressing modes. Short addressing modes use only one program word to specify both the instruction and the address. However, by so doing, the range of addresses that can be specified is shortened. PROCEDURE Addressing Mode Initialization In this procedure section, you will initialize the direct and indirect addressing mode registers of the 'C50 ARAU. As well, you will witness the effect of an uninitialized circular buffer in a program that requires its use. * 1. Open the assembler ex2_3.asm file inside of an ASCII text editor. * 2. Read the description of the program and familiarize yourself with the Initialization Sequence and Main code. Points of interest that should be noted are: & The program stores in DSP memory the last 16 samples received from the CODEC. It calculates the average value of these samples. The average is sent to the ANALOG OUTPUT. & There are three types of addressing used within the program: direct, indirect, and circular addressing. 2-61

& The ARAU register initializations, required to correctly address instruction operands, have been left out of the code. E.g., circular buffer register (CBSR1, CBER1, CBCR) have not been initialized.

12 & The ARAU register initializations, required to correctly address instruction operands, have been left out of the code. E.g., circular buffer register (CBSR1, CBER1, CBCR) have not been initialized. & Labels (Circular, Indirect, and Direct) given in the source code indicate where the ARAU register initialization instructions should be located. Note: Before using the C5x VDE please make certain the circuit board power source is turned ON, and that the serial connection is present between the host computer and the DIGITAL SIGNAL PROCESSOR circuit block labeled SERIAL PORT. * 3. Open the C5x VDE. * 4. Using the C5x VDE, load the ex2_3.dsk program into the DSP. * 5. Open a memory display window with the following display options: Address: XN0 Type: Data Memory Display Format: Signed Integer The ex. 2-3 program dedicates labeled dma XN0 to XN15 for storage of the most recent 16 samples received by the DSP. The samples are transmitted by the CODEC which converted the signal received from its ANALOG INPUT. * 6. Using the C5x VDE, set a breakpoint at the program memory address labeled INDIRECT. Set another breakpoint at the program memory address labeled DIRECT. 2-62

13 * 7. Execute the C5x VDE RUN command. All code located before the labeled instruction line is executed, this includes DSP initializations (apart for the ARAU unit). The instruction execution line (yellow) has stopped at the indirect breakpoint. See HELP Unit 02 shelp15 The following instructions, located in the main program code, use indirect addressing: SACL *+, 0, AR0 ADD *+, 0, AR0 For these instructions to execute properly certain indirect addressing registers (AR0 and ARP) must be initialized. * 8. Using the C5x VDE, edit AR0 register to make it point towards the dma labeled XN0. AR0 is used for indirect addressing. * 9. Using the C5x VDE, edit the content of the Auxiliary Register Pointer (ARP). Make ARP point towards auxiliary register 0 (AR0). You have now initialized the ARAU for indirect addressing as used by this program. * 10. Execute the C5x VDE RUN command. The instruction execution line (yellow) will stop at the breakpoint labeled DIRECT. See HELP Unit 02 shelp16 The following instruction, located in the main program code, uses direct addressing: SACL 10 h A direct addressing register the Data Page pointer (DP) used by the above instruction must be initialized. In fact, this instruction uses paged memorydirect addressing. * 11. Using the C5x VDE, edit the contents of the DP bits. Set the Data Page pointer (DP) to the data page starting on 0x0980h (change the content of DP to 0x0980). It is, among others, the data memory address labeled OUTPUT that is found on this data page. 2-63

14 Note that after making the change to DP, register ST0 is shown as modified (highlighted in red). ST0 is modified because the Data Page pointer bits (DP) are held in the ST0 register status and control register. You have now initialized the ARAU for paged memory-direct addressing with the averaging program. * 12. Using the STEP OVER command found on the C5x VDE Toolbar, execute the following instructions: NOP CLRC INTM ZAP The execution of these last instructions completes the program initialization section. Note that we did not make any ARAU circular addressing initializations. 2-64

15 * 13. Using the C5x VDE, set a breakpoint at the AND instruction found within the RECEIVE subroutine. This is one of the instructions which precedes the TRANSMIT subroutine label. $&& ö ìè M Löí ;1õìè Lô ìèøì ö ;1íø;1ìøïïïø;1ìè ìç * 14. Execute the RUN command found on the C5x VDE Toolbar. The RECEIVE subroutine will be entered and executed once a sample sent by the CODEC is received by the DSP. The RECEIVE subroutine when property initialized for indirect, direct, and circular addressing, computes the average of the 16 samples stored in data memory addresses XN0 TO XN15. Recall that the circular addressing initialization has not yet been made. * 15. Using the Windows calculator or a hand-held calculator, add the contents of the dma labeled XN0 to XN15 and divide the sum by 16 (averaging the samples). Is your calculated average value equal to the contents of the accumulator register? * Yes * No 2-65

16 The accumulator contents do not equal the average of the contents of the dma labeled XN0 to XN15. The RECEIVE subroutine begins calculating the average at XN1. This is because AR0 is used (and auto-incremented by the SACL instruction) to load XN0 with the most recent value received from the CODEC. However, as stated previously, the circular buffer was not initialized. When the indirect read pointer AR0 was auto-incremented from XN15, it went to OUTPUT. In a properly initialized circular buffer AR0 would have pointed to XN0 after the increment. Therefore, the averaging process added XN1 to XN15 and the dma labeled OUTPUT. In data memory, OUTPUT is found immediately after the dma labeled XN15. If the circular buffer had been initialized, when the averaging process had finished adding XN15 to the accumulator the next value to be added would have been XN0. Circular Addressing Initialization In this procedure section, you will initialize the circular buffer so that the averaging program may be used properly. 2-66

17 * 16. Edit the Program Counter (PC) register to the program memory address 0x0A80 h. Using the C5x VDE, STEP OVER the Dis-Assembly window instructions until the instruction execution line (yellow) is over the instruction labeled CIRCULAR. SACL *+, 0, AR0 ADD *+, 0, AR0 The above instructions address indirectly data (XN0 to XN15) that must be held in a circular buffer. The circular addressing registers (CBCR, CBSR1, CBER1) must be initialized. 2-67

18 * 17. Edit Circular Buffer 1 Start Register (CBSR1) to the first data memory address belonging to the circular buffer (XN0). * 18. Edit Circular Buffer 1 End Register (CBER1) to the last data memory address belonging to the circular buffer (XN15). * 19. Edit the Circular buffer 1 Auxiliary Register bits (CAR1) to AR0. This makes circular buffer 1 use auxiliary register 0 (AR0) as the pointer for the buffer elements. Note that after making the change to the CAR1 bits the CBCR register is also shown as modified (written in red within the C5x VDE). The Circular buffer 1 Auxiliary Register bits (CAR1) are located within the CBCR register. * 20. Enable circular buffer 1 by setting the circular buffer 1 enable bit (CENB1). Note that after making the change to the CENB1 bit the CBCR register is also shown as modified (written in red within the C5x VDE). The circular buffer 1 enable bit (CENB1) is located within the CBCR register. * 21. Execute the C5x VDE RUN command. The instruction execution line (yellow) found within the Dis-Assembly window will stop at the breakpoint labeled INDIRECT. * 22. Using the C5x VDE, edit AR0 to make it point towards the dma labeled XN

19 * 23. Using the C5x VDE, edit the content of the Auxiliary Register Pointer (ARP). Make ARP point towards auxiliary register 0 (AR0). You have now re-initialized the ARAU for indirect addressing with the averaging program. The ARAU for direct addressing has been initialized. * 24. Using the C5x VDE STEP OVER command, execute the following instructions lines: NOP CLRC INTM ZAP * 25. Execute the RUN command found on the C5x VDE Toolbar. The RECEIVE subroutine is entered and executed every time a sample sent by the CODEC is received by the DSP. ö ìè M Löí ;1õìè Lô ìèøì ö ;1íø;1ìøïïïø;1ìè ìç The RECEIVE subroutine computes the average of the 16 samples stored in data memory addresses XN0 to XN15. * 26. Using the Windows calculator or a hand-held calculator, add the contents, once again, of the dma labeled XN0 to XN15 and divide the sum by 16 (this averages the samples). Is your calculated average value equal to the contents of the accumulator register? * Yes * No Having initialized the circular buffer the averaging operation now properly executes. * 27. End the C5x VDE session. Running the Averaging Program In this procedure section, you will make the necessary initialization corrections to the averaging program source code. You will verify, using a function generator and an oscilloscope, if the ex2_3.asm program correctly makes a 16-point average. 2-69

20 * 28. Locate within the ex2_3 source file, opened inside of an ASCII text editor, the source statement labeled Circular:. * 29. Make the NOP instruction a comment (by placing a semi-colon in front of it) and remove the semi-colons from in front of the three commented SPLK instructions. These three added lines of source code initialize the CBSR1, CBER1 and CBCR registers. The source statements initialize the circular buffer. * 30. Locate within the ex2_3 source file the source statement labeled Indirect:. * 31. Make the NOP instruction a comment (by placing a semi-colon in front of it) and remove the semi-colon from in front of the two commented instructions (LAR and MAR). The added lines of source code initialize the AR0 and ARP registers. These are the source statements that initialize indirect addressing. * 32. Locate within the ex2_3 source file the source statement labeled Direct: * 33. Make the NOP instruction a comment (by placing a semi-colon in front of it) and remove the semi-colon from in front of the LDP instruction. The added source code initializes the DP bits located within status and control register ST0. This source statement initializes direct addressing. * 34. Save the modified source file to your personal student folder as: ex2_3v2.asm * 35. Assemble the file, from within your student folder. Execute within the student folder the following command at a DOS prompt: c:\lv91027\bin\dsk5a.exe ex2_3v2.asm -l You have now assembled the corrected averaging DSP file. * 36. Open the C5x VDE. * 37. Using the C5x VDE, load the ex2_3v2.dsk file into the DSP. 2-70

* 38. Execute the RUN command found on the C5x VDE Toolbar. * 39. Make the following connections: Connect the OUTPUT of a function generator to a BNC tee adaptor.

21 * 38. Execute the RUN command found on the C5x VDE Toolbar. * 39. Make the following connections: Connect the OUTPUT of a function generator to a BNC tee adaptor. The adapter divides the signal in two. Connect the function generator signal to CHANNEL 1 of an oscilloscope and to the ANALOG INPUT of the CODEC circuit block located on the DIGITAL SIGNAL PROCESSOR. Connect the ANALOG OUTPUT of the CODEC circuit block to the CHANNEL 2 input of the oscilloscope. * 40. Make the following settings on the function generator: Function generated sinusoidal Frequency Hz Amplitude VPP Offset VDC * 41. Adjust the oscilloscope as follows: Time Base ms/div Channel V/DIV (DC coupled) Channel V/DIV (DC coupled) You should observe the superposition of two sinusoidal waveforms on the oscilloscope display. One of the waveforms will be less than the amplitude of the other. 2-71

22 The smallest amplitude waveform corresponds to the averaged signal received from the ANALOG OUTPUT of the CODEC circuit block located on the DIGITAL SIGNAL PROCESSOR. * 42. Vary the frequency and the type of function generated by the function generator. Observe the results. * 43. End the C5x VDE session. CONCLUSION & An address is used any time that the processor is required to write an operand to or read an operand from a location. & Addressing is the means by which operand locations are specified to the processor when a read or write instruction is executed. & Certain types of addressing are meant to be used for certain specific situations and others are restricted for use by a small processor instruction subset. & The type of addressing used with an instruction influences program flexibility and performance. & DSPs include an Address Generation Unit (AGU), it is dedicated to calculating addresses. All address calculations take place in parallel with instruction execution. REVIEW QUESTIONS 1. Which of the following choices is not a location that can be addressed using an addressing mode? a. external program memory address 2C05h b. internal data memory address 0983h c. data bus d. accumulator register 2. Assume that a certain DSP using direct paged-memory addressing has 512 data pages each containing 128 words. If the current data page is 42d (DP = 42d) then which of the following addresses can be directly addressed by an instruction word? a h b h c h d h 2-72

23 3. Which of the following is true of a short addressing mode? a. A second word is attached to the instruction word. b. The range of addresses that can be specified is reduced. c. When short addressing is used program size is increased. d. When short addressing is used program execution time is slowed. 4. Where is the data memory address of an indirectly addressed operand stored? a. It is held in the accumulator. b. It is stored in data memory. c. It is stored in a memory-mapped Auxiliary Register of the AGU. d. It is encoded in the instruction word. 5. Which of the following choices does not describe an operation performed by an AGU managing a circular buffer? a. Read and write pointer update. b. Send the current circularly addressed dma to the accumulator. c. Verify if the read or write pointers are at the end of the buffer. d. None of the above. 2-73

Exercise 1-2. The Assembler and Debugger EXERCISE OBJECTIVES

Exercise 1-2. The Assembler and Debugger EXERCISE OBJECTIVES Exercise 1-2 The Assembler and Debugger EXERCISE OBJECTIVES Upon completion of this exercise, you will understand basic DSP source file syntax. You will be able to operate the debugger that accompanies