Microprocessors and Microcontrollers

Transcription

1 Microprocessors and Microcontrollers Prepared By Dr. M. Moustafa ١

2 CHAPTER ONE Microprocessors and Microcontrollers Prepared By Dr. M. Moustafa ٢

3 1. Introduction: A brief comparison between Microprocessors and Microcontrollers will be introduced. 1.1 Microprocessors: A Typical microprocessor is illustrated in Figure (1-1). As discussed previously, microprocessor varies from 8 bit to 32 bits. They are featured with very limited number of registers. However, they can address a huge size of RAM ( starting from 64 KB to 16 GB as in some Pentium versions). Figure (1-1): Block Diagram of A Microprocessor Prepared By Dr. M. Moustafa ٣

4 1.2 Microcontrollers: A typical Microcontroller is presented in Figure (1-2). However, it is a special purpose microprocessor. Also it varies from 8 bits to 32 bits microcontroller. Figure (1-2): Block Diagram of A Microcontroller Prepared By Dr. M. Moustafa ٤

5 An overview of microcontrollers. Microcontrollers are often described as single chip computers. They contain a microprocessor core, (often) some memory and various peripheral devices such as parallel i/o ports, serial i/o ports, timers, analogue to digital converters (ADC's) and various other special function sub-systems. Serial Digital I/O ADC RAM CPU Core ROM Parallel Digital I/O Timers Figure 1. Microcontroller elements. Red lines represent the address bus, blue lines represent the data bus The CPU The central processor unit is responsible for executing stored program (in ROM) and managing the peripherals. It fetches numeric instructions from memory (opcodes) one by one, interprets them and carries out some operation as a result. Programs consist of a collection of these opcodes mixed with (numeric) data. The CPU works its way sequentially through these instructions, sometimes jumping from place to place as a result of program design or as a result of operating conditions. Figure 2 shows the sort of components commonly found in CPU's. Registers are a little like internal memory storage areas. These are useful for interim calculation results (this reduces the number of reads/writes to external memory which is usually slower). Some registers have special functions such keeping track of where the Prepared By Dr. M. Moustafa ٥

6 next instruction is supposed to come from in memory. The arithmetic logic unit is responsible for carrying out calculations. In some CPU's this can be quite simple; perhaps only supporting add, subtract and basic logical operations. In more sophisticated CPU's, there may be several arithmetic units, some/all capable performing advanced floating point operations. The instruction decoder's job is to translate numeric opcodes into sequences of actions. The data bus is a collection of wires or tracks that are used to transport numbers into and out of the CPU. A logic '1' on each line of the bus is represented by a particular voltage commonly 5V or 3.3V. Logic '0' is commonly represented by a 0V signal. Any device that the CPU needs to communicate with is connected (in parallel with others) to the data bus. The address bus is another collection of wires/tracks. Its purpose is to select which of the external devices (or memory locations) is allowed to use the data bus. Remember, each wire of the data bus is just a simple conduction and is only capable of conveying one bit of data at a time. If for example, two devices attempt to write to the data bus at the same time; their signals will become confused and lost. In simple systems, the CPU alone controls the address bus. Registers Arithmetic logic Unit Instruction decoder Address bus Data bus Figure 2. CPU elements. Prepared By Dr. M. Moustafa ٦

7 RAM & ROM RAM (random access memory) is used for storing values that are liable to change during the course of the execution of a program. RAM contents are (usually) lost each time systems are turned off/on. As a result of this, RAM is not very useful for long term program storage you don't want to have to reload the control program for your photo copier each time you plug it out. ROM (read only memory) does not lose its contents when power is removed. Thus it is generally used for storing programs (but not variables). There are different technologies used to implement ROM program memory such as EPROM, EEPROM and Flash memory. Both ROM and RAM consist of arrays of storage locations, often arranged in byte or multiples of bytes in some sort of module (such as a chip). These modules/chips have an address bus which is controlled by some external device (CPU). The address bus selects which of the internal memory locations is connected to the module's data bus. Address bus Memory Cells Data bus Figure 3: Memory module structure Parallel Digital I/O Microprocessors (and microcontrollers micro's for short) send and receive information to the outside world using ports. There are many different types of port however the simplest is the parallel I/O port. These ports can be thought of as memory cells or registers that are connected to the CPU core using the data bus and also to the outside world via pins on the side of the micro. In the case of parallel ports, each bit in the port register is connected to a pin on the chip. If a given bit is at logic one, then the pin is drive to whatever voltage represents logic '1' for that system (commonly 5V or 3.3V). Similarly bits at logic '0' drive 0V out on the appropriate pin. Figure 4 shows how port I/O takes place in a generic microcontroller system. Prepared By Dr. M. Moustafa ٧

8 3.3V CPU Core b0??? 0 L1 b1 b0?? 1 0 S2 S1 0V Figure 4: Parallel port I/O. Shown are two 4 bit ports - one input, one output. To turn the transistor and hence L1 on, its base must be brought to 0V. Bringing it to 3.3V by writing a logic '1' to the appropriate bit (b0) causes L1 to turn off. The closure of S1 causes b1 of the input port to be driven high (logic '1' or 3.3V). S2 is open so the resistor shown pulls b0 low (logic '0' or 0V). Serial I/O Serial communications requires the sender to send data 1 bit at a time a rate agreed with the intended receiver. Each bit is given a time slot, the sets the transmit wire/track to the correct logic level for each bit's time slot. The receiver measures the voltage arriving from the sender at the middle of each bit's time slot. It can thus decide whether a '1' or '0' has been sent for a particular bit. Reliable operation requires precise timing. The receiver must look at the correct times for each bit. There are two common ways in which this is achieved : the sender and receiver each have very accurate clocks that are periodically re-aligned this is called Asynchronous transmission. The other method requires both parties to share a single clock source Synchronous transmission. Transmitting serial data is cheaper than parallel transmission as there are fewer conductors involved. Mice, keyboard, USB and Ethernet are all examples of serial transmission. Prepared By Dr. M. Moustafa ٨

9 Transmit Logic State Ground Local Clock b0 b1 b7 time Local Clock Figure 5a: Asynchronous serial transmission Transmit Logic State Ground Clock Local Clock b0 b1 b7 time Figure 5b: Synchronous serial transmission Timers Timers are typically constructed using a clock source and a counter. Counters count clock periods that are input to them. Some counters count up, some down. Counters have a limited width or number of bits and as a result can only count up or down so far without rolling over. An 8 bit up counter for example can only count up to 255 decimal; one more period input will cause it to overflow and revert to zero. A 16 bit down-counter will decrement down to zero, and given one more input it will roll around to (0xffff). When this roll over takes place, most counters emit some kind of signal. Counter/timer application 1: Divide down frequency by N. Figure 6 Prepared By Dr. M. Moustafa ٩

10 shows a down-counter and it associated reload register. When the down-counter attempts to roll below zero, it takes whatever value is in its reload register and resumes its downward count from there. This arrangement can be used to divide a frequency by an arbitrary value 0x100 (or 256) in this case. A microprocessor could use this sort of arrangement to divide down a high speed system clock down to a 1Hz tick useful for keeping track of time of day. 1 Mhz clock Count value a Roll over signal Reload Register Frequency =1 Mhz/256 1 Mhz clock Figure 6. Dividing down a clock signal Figure 7 shows how a counter/timer can be used to measure time periods. Suppose a microprocessor is required to measure the duration of some external event. If it raises the Enable signal shown to logic 1 AND, the external event signal is high then the gate output will switch in accordance with the clock. When the event signal goes low, the gate is effectively closed. The counter value remains static and the number of pulses (microseconds) can be read from the counter. Prepared By Dr. M. Moustafa ١٠

11 1 Mhz clock Gate output 4 clock tick i.e. 4 µs External event e.g. sensor output Enable signal Counter Figure 7. Period measurement using a timer/counter. Apart from the above two applications, counters can simply be used as event counters allowing the microprocessor to perform other tasks. ADC's (and DAC's) Frequently microprocessors are required to process non-digital i.e. analogue (or continuous) signals. In order for them to do this, a special device called an Analogue to Digital Converter is required. This device accepts an analogue input and translates this to a digital number whose size is proportional to the magnitude of the analogue signal. Each Analogue to Digital Converter has an associated input voltage range and an output numeric range. Example: The ADS7891 ADC from Texas Instruments is a 14 bit converter that typically operates at 5V. Its input signal range is given as 0 to 2.5V (assuming it operates with a 5V power supply). Its conversion time is quoted as around 250ns. The device has an 14 bit parallel output (many ADC's use serial outputs). Figure 8 shows how such an ADC could be used in conjunction with a microcontroller. The microcontroller instructs the ADC to convert the analogue input to a digital signal. Internally the ADC takes a snapshot (sample and hold) of the analogue input and, in this case uses an successive approximation to map this signal to a proportional digital number. While this is going on, the microcontroller must wait. It monitors the status of the conversion finished (sometimes called End of conversion ) signal. When the conversion is done, the 14 converted result can be read using 14 input port bits. Prepared By Dr. M. Moustafa ١١

12 Conversion Result Vin ADS Input Port bits 6 Input Port bits Micro Start Conversion 1 output port bit Conversion Finished 1 input port bit Figure 8. Sample (approximate) interfacing of an ADC with a microcontoller. Some ADC's have multiplexed inputs which allow them to convert several input signals in sequence. Others have a address/data bus style of interface to the microprocessor allowing them to be mapped into the memory address space of a system. Many microcontrollers have integrated multichannel ADC's. Digital to Analogue converters perform the inverse of ADC's. They accept a digital input signal and output a proportional analogue signal. Historically, DAC's have rarely been found integrated into microcontrollers for fabrication reasons. If an analogue output is required for a microcontroller without an internal DAC then an external IC and support circuitry must be added. Alternatively, it may be possible to generate a pseudo analogue output by controlling Prepared By Dr. M. Moustafa ١٢

13 the duty cycle of an output port pin. For example, if a digital output pin spends half of its time at 5V and the rest of its time at 0V its average voltage is 2.5V. By varying the percentage high time the average output voltage may be controlled. This is know as Pulse Width Modulation (PWM). The pulsed output can be filtered to create a continuous analogue signal using a simple filter as shown in Figure 9. Volts Port output Volts Average value Output port bit time Resistor time Micro Capacitor Ground Figure 9: Analogue output by PWM Interrupts. Very simple microprocessor systems are often built which execute only one task. For example, a burglar alarm system may spend all of its time reading the status of various sensors checking for an alarm condition. Similarly, a microprocessor in a musical greeting card may spend its time generating analogue outputs. More complex microprocessor systems are often required to monitor and control man inputs and outputs. In such circumstances, the allocation of CPU time for driving the outputs and monitoring the inputs must be carefully balanced. One way of doing this is to scatter calls to the various i/o routines throughout the program code. Consider for example a modern PC running a gaming application. The CPU must run around the mouse and keyboard drivers to check for new inputs while at the same time update the video display. As systems become more complex, this running around becomes more convoluted and ultimately impractical. Interrupts offer a solution. Figures 10a and 10b illustrate how a gaming console could be implemented using interrupt driven I/O. Prepared By Dr. M. Moustafa ١٣

14 Game Logic Mouse Driver Port Gaming Console / PC Video Driver Keyboard Driver Port Port Figure 10a. Most of the time, the CPU is busy processing game logic and updating the video display. Prepared By Dr. M. Moustafa ١٤

15 Game Logic Move Event Mouse Driver Port Gaming Console / PC Video Driver Keyboard Driver Port Port Figure 10b: When a player moves the mouse, an interrupt signal is generated. This interrupt signal causes the CPU to suspend its processing of the game logic/video display and to switch to code that handles signals from the mouse (mouse driver). The mouse driver will generate a message that informs the game logic code of the player's movement. The handling of this event would typically take place in less than 1 millisecond so short a time that the user is unaware that it is taking place. So what then are interrupts? Interrupts are signals that cause the CPU to suspend its current activity and perform some other task. Frequently interrupt signals are produced by hardware devices that require urgent attention (e.g. a network card signals that it has received an incoming block of data). A given computer system may need to support several hardware subsystems each of which will occasionally require urgent attention. CPU's are commonly designed to handle interrupts from various sources. Each interrupt signal is associated with a particular memory location which contains the address of the subroutine that should be executed on Prepared By Dr. M. Moustafa ١٥

16 receipt of this interrupt. System programmers can populate these special memory locations with the addresses of interrupt handling code. Definition: Interrupt vector : A (special) memory location which contains the address of an interrupt service routine. Definition: Interrupt service routine: A piece of code that is executed on receipt of an interrupt signal. Definition: Interrupt vector table : A collection of interrupt vectors. Prepared By Dr. M. Moustafa ١٦

17 1.3 Comparison between Microprocessors and Microcontrollers: As stated before, Microcontrollers are 4bit, 8 bits, 16 bits, or 32 bits. The 4 bits were developed at beginning of this industry, while the 8 bits are commonly used nowadays. Furthermore, 16 bits are propagating while 32 bits microcontrollers are recently introduced. However, 8 bits devices are still in tact in many industrial applications. A deep look inside each category will be given ( except for 4-bits devices). Prepared By Dr. M. Moustafa ١٧

18 1.4 Eight bits Microcontrollers: Table (1-1) lists the different configuration for different microcontrollers. It is clear that none of them is identical with the others. Prepared By Dr. M. Moustafa ١٨

19 Table (1-1) : Configuration of different 8 bits Microcontrollers 1.5 Sixteen bits Microcontrollers: Table (1-2) lists the Configuration of different 16 bits Microcontrollers for three different companies. All of them can address external memory. Prepared By Dr. M. Moustafa ١٩

20 Table (1-2) : Configuration of different 16 bits Microcontrollers 1.5 Thirty-Two bits Microcontrollers: Prepared By Dr. M. Moustafa ٢٠

21 1.5 Development Systems for Microcontrollers: Prepared By Dr. M. Moustafa ٢١

22 CHAPTER TWO Introduction to INTEL Microprocessors Prepared By Dr. M. Moustafa ٢٢

23 2.Introduction To Microprocessors : Microprocessors (Central Processing Units "CPU") are the brain of computers. It is a kind of VLSI Integrated ICs. It contains a few number of Registers (which are fabricated from hundred of Transistors). The early Microprocessors (INTEL 4004, 4 bits microprocessors) was introduced at middle of seventh decade of the last century. Meanwhile, the development resulted with other Microprocessors (e.g. 8080, 8085, etc ). Most of these Microprocessors were 8 bits, with limited RAM ( 64 KB at most). Furthermore, each microprocessor had its own assembly language. However the triggering evolution sparked with fabrication of INTEL 8086 (end of seventh decade of the last century) which lead to the presence of Personal Computers (PC) at end of eighth decade of the last century. After that, many Microprocessors were introduced either from INTEL company or other companies like MOTORLA, Zilog, NEC, AMD. A very hard competition started which resulted with 32 bits Microprocessors, then 64 bits Microprocessors (e.g. The different Pentium versions) with capabilities of addressing more than 4 GB RAM. Furthermore, the assembly language associated with INTEL 8086 still compatible with new series of INTEL 80x86 microprocessors. Assembly language is a low level programming language. It is recommended to get some knowledge about computer structure in order to understand anything related to the subject. The simple computer model is simply illustrated in Figure (2-1). Figure (2-1) : The simple computer model The system bus (shown in yellow) connects the various components of a computer. The CPU is the heart of the computer, most of computations occur inside the CPU. RAM is a place to where the programs are loaded in order to be executed. Inside the Prepared By Dr. M. Moustafa ٢٣

24 INTEL 8086 CPU (as well as INTEL 8088 CPU) could be easily represented as shown in Figure (2-2). Internal Architecture of INTEL 8086 CPU is the milestone in the INTEL 80x86 CPU which introduced recently. Control Unit Instruction (CU) Queue Figure (2-2) : Internal Architecture of INTEL 8086 CPU The INTEL 8086 CPU (as well as INTEL 8088 CPU) has a few number of Registers. These registers are classified as follows (different classifications are considered). 2.2 General purpose registers: 8086 CPU has 8 general purpose registers, each register has its own name: AX - the accumulator register (divided into AH / AL). BX - the base address register (divided into BH / BL). CX - the count register (divided into CH / CL). DX - the data register (divided into DH / DL). SI - source index register. DI - destination index register. BP - base pointer. SP - stack pointer. Despite the name of a register, it's the programmer who determines the usage for each general purpose register. The main purpose of a register is to keep a number (variable). The size of the above registers is 16 bit, it's something like: b (in binary form), or in decimal (human) form. Prepared By Dr. M. Moustafa ٢٤

25 Four general purpose registers (AX, BX, CX, DX) are made of two separate 8 bit registers, for example if AX= b, then AH= b and AL= b. Therefore, when you modify any of the 8 bit registers 16 bit register is also updated, and vice-versa. The same is for other 3 registers, "H" is for high and "L" is for low part. Because registers are located inside the CPU, they are much faster than memory. Accessing a memory location requires the use of a system bus, so it takes much longer. Accessing data in a register usually takes no time. Therefore, you should try to keep variables in the registers. Register sets are very small and most registers have special purposes which limit their use as variables, but they are still an excellent place to store temporary data of calculations. Segment registers: CS - points at the segment containing the current program. DS - generally points at segment where variables are defined. ES - extra segment register, it's up to a coder to define its usage. SS - points at the segment containing the stack. Although it is possible to store any data in the segment registers, this is never a good idea. The segment registers have a very special purpose - pointing at accessible blocks of memory. Segment registers work together with general purpose register to access any memory value. For example if we would like to access memory at the physical address 12345h (hexadecimal), we should set the DS = 1230h and SI = 0045h. This is good, since this way we can access much more memory than with a single register that is limited to 16 bit values. CPU makes a calculation of physical address by multiplying the segment register by 10h and adding general purpose register to it (1230h * 10h + 45h = 12345h): the address formed with 2 registers is called an effective address. by default BX, SI and DI registers work with DS segment register; BP and SP work with SS segment register. Other general purpose registers cannot form an effective address! Also, although BX can form an effective address, BH and BL cannot. Prepared By Dr. M. Moustafa ٢٥

26 2.3 Special purpose registers: IP - the instruction pointer. Flags register - determines the current state of the microprocessor. IP register always works together with CS segment register and it points to currently executing instruction. Flags register is modified automatically by CPU after mathematical operations, this allows to determine the type of the result, and to determine conditions to transfer control to other parts of the program. Generally you cannot access these registers directly, the way you can access AX and other general registers, but it is possible to change values of system registers using some tricks that you will learn a little bit later. 2.4 Memory Access: To access memory, these four registers: BX, SI, DI, BP could be use. Combining these registers inside [ ] symbols, we can get different memory locations. These combinations are supported (addressing modes): [BX + SI] [BX + DI] [BP + SI] [BP + DI] [SI + d8] [DI + d8] [BP + d8] [BX + d8] [SI] [DI] d16 (variable offset only) [BX] [BX + SI + d16] [BX + DI + d16] [BP + SI + d16] [BP + DI + d16] [BX + SI + d8] [BX + DI + d8] [BP + SI + d8] [BP + DI + d8] [SI + d16] [DI + d16] [BP + d16] [BX + d16] d8 - stays for 8 bit signed immediate displacement (for example: 22, 55h, -1, etc...) d16 - stays for 16 bit signed immediate displacement (for example: 300, 5517h, -259, etc...). Displacement can be a immediate value or offset of a variable, or Prepared By Dr. M. Moustafa ٢٦

27 even both. if there are several values, assembler evaluates all values and calculates a single immediate value.. Displacement can be inside or outside of the [ ] symbols, assembler generates the same machine code for both ways. Displacement is a signed value, so it can be either positive or negative. Generally the compiler takes care about difference between d8 and d16, and generates the required machine code. For example, let's assume that DS = 100, BX = 30, SI = 70. The following addressing mode: [BX + SI] + 25 is calculated by processor to this physical address: 100 * = By default DS segment register is used for all modes except those with BP register, for these SS segment register is used. There is an easy way to remember all those possible combinations using this chart: It is possible to form all valid combinations by taking only one item from each column or skipping the column by not taking anything from it. As seen recently, BX and BP never go together. SI and DI also don't go together. Here are some examples of a valid addressing modes: [BX+5], [BX+SI], [DI+BX-4] The value in segment register (CS, DS, SS, ES) is called a segment, and the value in purpose register (BX, SI, DI, BP) is called an offset. When DS contains value 1234h and SI contains the value 7890h it can be also recorded as 1234:7890. The physical address will be 1234h * 10h h = 19BD0h. If zero is added to a decimal number it is multiplied by 10, however Prepared By Dr. M. Moustafa ٢٧

28 10h = 16, so if zero is added to a hexadecimal value, it is multiplied by 16, for example: 7h = 7 70h = 112 In order to say the compiler about data type, these prefixes should be used: byte ptr - for byte. word ptr - for word (two bytes). For example: byte ptr [BX] or word ptr [BX] ; byte access. ; word access. Assembler supports shorter prefixes as well: b. - for byte ptr w. - for word ptr in certain cases the assembler can calculate the data type automatically. 2.5 MOV instruction Copies the second operand (source) to the first operand (destination). The source operand can be an immediate value, generalpurpose register or memory location. The destination register can be a general-purpose register, or memory location. Both operands must be the same size, which can be a byte or a word. Prepared By Dr. M. Moustafa ٢٨

29 these types of operands are supported: MOV REG, memory MOV memory, REG MOV REG, REG MOV memory, immediate MOV REG, immediate REG: AX, BX, CX, DX, AH, AL, BL, BH, CH, CL, DH, DL, DI, SI, BP, SP. memory: [BX], [BX+SI+7], variable, etc... immediate: 5, -24, 3Fh, b, etc... For segment registers only these types of MOV are supported: MOV SREG, memory MOV memory, SREG MOV REG, SREG MOV SREG, REG SREG: DS, ES, SS, and only as second operand: CS. REG: AX, BX, CX, DX, AH, AL, BL, BH, CH, CL, DH, DL, DI, SI, BP, SP. memory: [BX], [BX+SI+7], variable, etc... The MOV instruction cannot be used to set the value of the CS and IP registers. here is a short program that demonstrates the use of MOV instruction: ORG 100h ; this directive required for a simple 1 segment.com program. MOV AX, 0B800h ; set AX to hexadecimal value of B800h. MOV DS, AX ; copy value of AX to DS. MOV CL, 'A' ; set CL to ASCII code of 'A', it is 41h. MOV CH, b ; set CH to binary value. MOV BX, 15Eh ; set BX to 15Eh. MOV [BX], CX ; copy contents of CX to memory at B800:015E RET ; returns to operating system. The above program could be copied easily to the code editor, and press [Compile and Emulate] button (or press F5 key on your keyboard) on the simple program to emulate 8086 (emu 8086). Prepared By Dr. M. Moustafa ٢٩

30 the emulator window should open with this program loaded, click [Single Step] button and watch the register values. As you may guess, ";" is used for comments, anything after ";" symbol is ignored by compiler. You should see something like that when program finishes: Actually the above program writes directly to video memory, so you may see that MOV is a very powerful instruction. 2.6 Variables: Variable is a memory location. For a programmer it is much easier to have some value be kept in a variable named "var1" then at the address 5A73:235B, especially when you have 10 or more variables. Our compiler supports two types of variables: BYTE and WORD. Syntax for a variable declaration: name DB value name DW value DB - stays for Define Byte. Prepared By Dr. M. Moustafa ٣٠

31 DW - stays for Define Word. name - can be any letter or digit combination, though it should start with a letter. It's possible to declare unnamed variables by not specifying the name (this variable will have an address but no name). value - can be any numeric value in any supported numbering system (hexadecimal, binary, or decimal), or "?" symbol for variables that are not initialized. As was discussed before, MOV instruction is used to copy values from source to destination. Let's see another example with MOV instruction: ORG 100h MOV AL, var1 MOV BX, var2 RET ; stops the program. VAR1 DB 7 var2 DW 1234h Copy the above code to the source editor, and press F5 key to compile it and load in the emulator. You should get something like: Prepared By Dr. M. Moustafa ٣١

32 As you see this looks a lot like our example, except that variables are replaced with actual memory locations. When compiler makes machine code, it automatically replaces all variable names with their offsets. By default segment is loaded in DS register (when COM files is loaded the value of DS register is set to the same value as CS register - code segment). In memory list first row is an offset, second row is a hexadecimal value, third row is decimal value, and last row is an ASCII character value. Compiler is not case sensitive, so "VAR1" and "var1" refer to the same variable. The offset of VAR1 is 0108h, and full address is 0B56:0108. The offset of var2 is 0109h, and full address is 0B56:0109, this variable is a WORD so it occupies 2 BYTES. It is assumed that low byte is stored at lower address, so 34h is located before 12h. You can see that there are some other instructions after the RET instruction, this happens because disassembler has no idea about where the data starts, it just processes the values in memory and it understands them as valid 8086 instructions. As you may guess, the compiler just converts the program source to the set of bytes, this set is called machine code, and processor understands the machine code and executes it. ORG 100h is a compiler directive (it tells compiler how to handle the source code). This directive is very important when you work with variables. It tells compiler that the executable file will be loaded at the offset of 100h (256 bytes), so compiler should calculate the correct address for all variables when it replaces the variable names with their offsets. Directives are never converted to any real machine code. Why executable file is loaded at offset of 100h? Operating system keeps some data about the program in the first 256 bytes of the CS (code segment), such as command line parameters and etc. Though this is true for COM files only, EXE files are loaded at offset of 0000, and generally use special segment for variables. Prepared By Dr. M. Moustafa ٣٢

33 2.7 Arrays : Arrays can be seen as chains of variables. A text string is an example of a byte array, each character is presented as an ASCII code value (0..255). Here are some array definition examples: a DB 48h, 65h, 6Ch, 6Ch, 6Fh, 00h b DB 'Hello', 0 b is an exact copy of the a array, when compiler sees a string inside quotes it automatically converts it to set of bytes. This chart shows a part of the memory where these arrays are declared: The value of any element in array could be accessed using square brackets, for example: MOV AL, a[3] Any of the memory index registers BX, SI, DI, BP could also be used, for example: MOV SI, 3 MOV AL, a[si] If you need to declare a large array you can use DUP operator. The syntax for DUP: number DUP ( value(s) ) number - number of duplicate to make (any constant value). value - expression that DUP will duplicate. Prepared By Dr. M. Moustafa ٣٣

34 for example: c DB 5 DUP(9) is an alternative way of declaring: c DB 9, 9, 9, 9, 9 one more example: d DB 5 DUP(1, 2) is an alternative way of declaring: d DB 1, 2, 1, 2, 1, 2, 1, 2, 1, 2 Of course, DW could be used instead of DB if it's required to keep values larger then 255, or smaller then DW cannot be used to declare strings. 2.8 Getting the Address of a Variable: There is LEA (Load Effective Address) instruction and alternative OFFSET operator. Both OFFSET and LEA can be used to get the offset address of the variable. LEA is more powerful because it also allows you to get the address of an indexed variable. Getting the address of the variable can be very useful in some situations, for example when you need to pass parameters to a procedure. Reminder: In order to tell the compiler about data type, these prefixes should be used: BYTE PTR - for byte. WORD PTR - for word (two bytes). For example: BYTE PTR [BX] ; byte access. or WORD PTR [BX] ; word access. assembler supports shorter prefixes as well: b. - for BYTE PTR Prepared By Dr. M. Moustafa ٣٤

35 w. - for WORD PTR In certain cases the assembler can calculate the data type automatically. Here is first example: ORG 100h MOV AL, VAR1 VAR1 by moving it to AL. LEA BX, VAR1 VAR1 in BX. ; check value of ; get address of MOV BYTE PTR [BX], 44h ; modify the contents of VAR1. MOV AL, VAR1 VAR1 by moving it to AL. ; check value of RET VAR1 DB 22h END Here is another example, which uses OFFSET instead of LEA: ORG 100h MOV AL, VAR1 VAR1 by moving it to AL. ; check value of MOV BX, OFFSET VAR1 VAR1 in BX. ; get address of MOV BYTE PTR [BX], 44h ; modify the contents of VAR1. MOV AL, VAR1 VAR1 by moving it to AL. RET ; check value of VAR1 DB 22h END Both examples have the same functionality. Prepared By Dr. M. Moustafa ٣٥

36 These lines: LEA BX, VAR1 MOV BX, OFFSET VAR1 are even compiled into the same machine code: MOV BX, num num is a 16 bit value of the variable offset. Please note that only these registers can be used inside square brackets (as memory pointers): BX, SI, DI, BP! (see previous part of the tutorial). 2.9 Constants: Constants are just like variables, but they exist only until your program is compiled (assembled). After definition of a constant value cannot be changed. To define constants EQU directive is used: its name EQU < any expression > For example: k EQU 5 MOV AX, k The above example is functionally identical to code: MOV AX, 5 You can view variables while your program executes by selecting "Variables" from the "View" menu of emulator. Prepared By Dr. M. Moustafa ٣٦

37 To view arrays you should click on a variable and set Elements property to array size. In assembly language there are not strict data types, so any variable can be presented as an array. Variable can be viewed in any numbering system: HEX - hexadecimal (base 16). BIN - binary (base 2). OCT - octal (base 8). SIGNED - signed decimal (base 10). UNSIGNED - unsigned decimal (base 10). CHAR - ASCII char code (there are 256 symbols, some symbols are invisible). You can edit a variable's value when your program is running, simply double click it, or select it and click Edit button. It is possible to enter numbers in any system, hexadecimal numbers should have "h" suffix, binary "b" suffix, octal "o" suffix, decimal numbers require no suffix. String can be entered this way: 'hello world', 0 (this string is zero terminated). Arrays may be entered this way: 1, 2, 3, 4, 5 (the array can be array of bytes or words, it depends whether BYTE or WORD is selected for edited variable). Expressions are automatically converted, for example: when this expression is entered: it will be converted to 7 etc... Prepared By Dr. M. Moustafa ٣٧

38 2.10 Complete 8086 instruction set: Quick reference: AAA AAD AAM AAS ADC ADD AND CALL CBW CLC CLD CLI CMC CMP CMPSB CMPSW CWD DAA DAS DEC DIV HLT IDIV IMUL IN INC INT INTO IRET JA JAE JB JBE JC JCXZ JE JG JGE JL JLE JMP JNA JNAE JNB JNBE JNC JNE JNG JNGE JNL JNLE JNO JNP JNS JNZ JO JP JPE JPO JS JZ LAHF LDS LEA LES LODSB LODSW LOOP LOOPE LOOPNE LOOPNZ LOOPZ MOV MOVSB MOVSW MUL NEG NOP NOT OR OUT POP POPA POPF PUSH PUSHA PUSHF RCL RCR REP REPE REPNE REPNZ REPZ RET RETF ROL ROR SAHF SAL SAR SBB SCASB SCASW SHL SHR STC STD STI STOSB STOSW SUB TEST XCHG XLATB XOR Operand types: REG: AX, BX, CX, DX, AH, AL, BL, BH, CH, CL, DH, DL, DI, SI, BP, SP. SREG: DS, ES, SS, and only as second operand: CS. memory: [BX], [BX+SI+7], variable, etc...(see Memory Access). immediate: 5, -24, 3Fh, b, etc... Notes: When two operands are required for an instruction they are separated by comma. For example: REG, memory When there are two operands, both operands must have the same size (except shift and rotate instructions). For example: AL, DL Prepared By Dr. M. Moustafa ٣٨

39 DX, AX m1 DB? AL, m1 m2 DW? AX, m2 Some instructions allow several operand combinations. For example: memory, immediate REG, immediate memory, REG REG, SREG Some examples contain macros, so it is advisable to use Shift + F8 hot key to Step Over (to make macro code execute at maximum speed set step delay to zero), otherwise emulator will step through each instruction of a macro. Here is an example that uses PRINTN macro: include 'emu8086.inc' ORG 100h MOV AL, 1 MOV BL, 2 PRINTN 'Hello World!' ; macro. MOV CL, 3 PRINTN 'Welcome!' ; macro. RET These marks are used to show the state of the flags: 1 - instruction sets this flag to instruction sets this flag to 0. r - flag value depends on result of the instruction.? - flag value is undefined (maybe 1 or 0). Some instructions generate exactly the same machine code, so disassembler may have a problem decoding to your original code. This is especially important for Conditional Jump instructions. Prepared By Dr. M. Moustafa ٣٩

40 CHAPTER THREE INTEL 8051/8052 Microcontroller Prepared By Dr. M. Moustafa ٤٠

41 3.1 Introduction To INTEL 8051 Microcontroller: Despite its relatively old age, the 8051 is one of the most popular microcontrollers in use today. Many derivative microcontrollers have since been developed that are based on--and compatible with--the Thus, the ability to program an 8051 is an important skill for anyone who plans to develop products that will take advantage of microcontrollers. 3.2 Types of Memory: The 8051 has three very general types of memory. To effectively program the 8051 it is necessary to have a basic understanding of these memory types. The memory types are illustrated in the Figure (3-1). They are: On-Chip Memory, External Code Memory, and External RAM. Figure (3-1) : General Types of Memory in INTEL 8051 Microcontroller a) On-Chip Memory It refers to any memory (Code, RAM, or other) that physically exists on the microcontroller itself. On-chip memory can be of several types, but we'll get into that shortly. b) External Code Memory It is code (or program) memory that resides off-chip. This is often in the form of an external EPROM. c) External RAM It is RAM memory that resides off-chip. This is often in the form of standard static RAM or flash RAM. d) Code Memory Prepared By Dr. M. Moustafa ٤١

42 It is the memory that holds the actual 8051 program that is to be run. This memory is limited to 64K and comes in many shapes and sizes: Code memory may be found on-chip, either burned into the microcontroller as ROM or EPROM. Code may also be stored completely off-chip in an external ROM or, more commonly, an external EPROM. Flash RAM is also another popular method of storing a program. Various combinations of these memory types may also be used--that is to say, it is possible to have 4K of code memory on-chip and 64k of code memory off-chip in an EPROM. When the program is stored on-chip the 64K maximum is often reduced to 4k, 8k, or 16k. This varies depending on the version of the chip that is being used. Each version offers specific capabilities and one of the distinguishing factors from chip to chip is how much ROM/EPROM space the chip has. However, code memory is most commonly implemented as off-chip EPROM. This is especially true in low-cost development systems and in systems developed by students. Programming Tip: Since code memory is restricted to 64K, 8051 programs are limited to 64K. Some assemblers and compilers offer ways to get around this limit when used with specially wired hardware. However, without such special compilers and hardware, programs are limited to 64K. e) External RAM As an obvious opposite of Internal RAM, the 8051 also supports what is called External RAM. As the name suggests, External RAM is any random access memory which is found off-chip. Since the memory is off-chip it is not as flexible in terms of accessing, and is also slower. For example, to increment an Internal RAM location by 1 requires only 1 instruction and 1 instruction cycle. To increment a 1-byte value stored in External RAM requires 4 instructions and 7 instruction cycles. In this case, external memory is 7 times slower! What External RAM loses in speed and flexibility it gains in quantity. While Internal RAM is limited to 128 bytes (256 bytes with an 8052), the 8051 supports External RAM up to 64K. Programming Tip: The 8051 may only address 64k of RAM. To expand RAM beyond this limit requires programming and hardware tricks. You may have to do this "by hand" since many compilers and assemblers, while providing support for programs in excess of 64k, do not support more than 64k of RAM. This is rather strange since it has been the experience that programs can usually fit in 64k but often RAM is what is lacking. Thus if you need more than 64k of RAM, check to see if your compiler supports it-- but if it doesn't, be prepared to do it by hand On-Chip Memory As mentioned at the beginning of this chapter, the 8051 includes a certain amount Prepared By Dr. M. Moustafa ٤٢

43 of on-chip memory. On-chip memory is really one of two types: Internal RAM and Special Function Register (SFR) memory. The layout of the 8051's internal memory is presented in the following memory map as illustrated in Figure (3-2). As is illustrated in this map, the 8051 has a bank of 128 bytes of Internal RAM. This Internal RAM is found on-chip on the 8051 so it is the fastest RAM available, and it is also the most flexible in terms of reading, writing, and modifying its contents. Internal RAM is volatile, so when the 8051 is reset this memory is cleared. Figure (3-2) : The Layout of the INTEL 8051's Internal Memory Map The 128 bytes of internal RAM is subdivided as shown on the memory map. The first 8 bytes (00h - 07h) are "register bank 0". By manipulating certain SFRs, a program may choose to use register banks 1, 2, or 3. These alternative register banks are located in internal RAM in addresses 08h through 1Fh. We'll discuss "register banks" more in a later chapter. For now it is sufficient to know that they "live" and are part of internal RAM. Bit Memory also lives and is part of internal RAM. We'll talk more about bit memory very shortly, but for now just keep in mind that bit memory actually resides in internal RAM, from addresses 20h through 2Fh. The 80 bytes remaining of Internal RAM, from addresses 30h through 7Fh, may be used by user variables that need to be accessed frequently or at high-speed. This area is also utilized by the microcontroller as a storage area for the operating stack. This fact severely limits the 8051s stack since, as illustrated in the memory map, the area reserved for the stack is only 80 bytes--and usually it is less since this 80 bytes has to be shared between the stack and user variables. 3.3 Register Banks: Prepared By Dr. M. Moustafa ٤٣

44 The 8051 uses 8 "R" registers which are used in many of its instructions. These "R" registers are numbered from 0 through 7 (R0, R1, R2, R3, R4, R5, R6, and R7). These registers are generally used to assist in manipulating values and moving data from one memory location to another. For example, to add the value of R4 to the Accumulator, the following instruction would be executed: ADD A,R4 Thus if the Accumulator (A) contained the value 6 and R4 contained the value 3, the Accumulator would contain the value 9 after this instruction was executed. However, as the memory map shows, the "R" Register R4 is really part of Internal RAM. Specifically, R4 is address 04h. This can be seen in the bright green section (it Your script is printed with colors!) of the memory map. Thus the above instruction accomplishes the same thing as the following operation: ADD A,04h This instruction adds the value found in Internal RAM address 04h to the value of the Accumulator, leaving the result in the Accumulator. Since R4 is really Internal RAM 04h, the above instruction effectively accomplished the same thing. But watch out! As the memory map shows, the 8051 has four distinct register banks. When the 8051 is first booted up, register bank 0 (addresses 00h through 07h) is used by default. However, your program may instruct the 8051 to use one of the alternate register banks; i.e., register banks 1, 2, or 3. In this case, R4 will no longer be the same as Internal RAM address 04h. For example, if your program instructs the 8051 to use register bank 3, "R" register R4 will now be synonymous with Internal RAM address 1Ch. The concept of register banks adds a great level of flexibility to the 8051, especially when dealing with interrupts. However, always remember that the register banks really reside in the first 32 bytes of Internal RAM. Programming Tip: If you only use the first register bank (i.e. bank 0), you may use Internal RAM locations 08h through 1Fh for your own use. But if you plan to use register banks 1, 2, or 3, be very careful about using addresses below 20h as you may end up overwriting the value of your "R" registers! 3.4 Bit Memory The 8051, being a communications-oriented microcontroller, gives the user the ability to access a number of bit variables. These variables may be either 1 or 0. There are 128 bit variables available to the user, numbered 00h through 7Fh. The user may make use of these variables with commands such as SETB and CLR. For example, to set bit number 24 (hex) to 1 you would execute the instruction: Prepared By Dr. M. Moustafa ٤٤

45 SETB 24h It is important to note that Bit Memory is really a part of Internal RAM. In fact, the 128 bit variables occupy the 16 bytes of Internal RAM from 20h through 2Fh. Thus, if you write the value FFh to Internal RAM address 20h youve effectively set bits 00h through 07h. That is to say that: MOV 20h,#0FFh is equivalent to: SETB 00h SETB 01h SETB 02h SETB 03h SETB 04h SETB 05h SETB 06h SETB 07h As illustrated above, bit memory isnt really a new type of memory. Its really just a subset of Internal RAM. But since the 8051 provides special instructions to access these 16 bytes of memory on a bit by bit basis it is useful to think of it as a separate type of memory. However, always keep in mind that it is just a subset of Internal RAM--and that operations performed on Internal RAM can change the values of the bit variables. Programming Tip: If your program does not use bit variables, you may use Internal RAM locations 20h through 2Fh for your own use. But if you plan to use bit variables, be very careful about using addresses from 20h through 2Fh as you may end up overwriting the value of your bits! Bit variables 00h through 7Fh are for user-defined functions in their programs. However, bit variables 80h and above are actually used to access certain SFRs on a bit-by-bit basis. For example, if output lines P0.0 through P0.7 are all clear (0) and you want to turn on the P0.0 output line you may either execute: MOV P0,#01h or you may execute: SETB 80h Both these instructions accomplish the same thing. However, using the SETB command will turn on the P0.0 line without effecting the status of any of the other P0 output lines. The MOV command effectively turns off all the other output lines which, in some cases, may not be acceptable. Programming Tip: By default, the 8051 initializes the Stack Pointer (SP) to 07h when the microcontroller is booted. This means that the stack will start at address 08h and expand upwards. If you will be using the Prepared By Dr. M. Moustafa ٤٥

46 alternate register banks (banks 1, 2 or 3) you must initialize the stack pointer to an address above the highest register bank you will be using, otherwise the stack will overwrite your alternate register banks. Similarly, if you will be using bit variables it is usually a good idea to initialize the stack pointer to some value greater than 2Fh to guarantee that your bit variables are protected from the stack. 3.5 Special Function Register (SFR) Memory: Special Function Registers (SFRs) are areas of memory that control specific functionality of the 8051 processor. For example, four SFRs permit access to the 8051s 32 input/output lines. Another SFR allows a program to read or write to the 8051s serial port. Other SFRs allow the user to set the serial baud rate, control and access timers, and configure the 8051s interrupt system. When programming, SFRs have the illusion of being Internal Memory. For example, if you want to write the value "1" to Internal RAM location 50 hex you would execute the instruction: MOV 50h,#01h Similarly, if you want to write the value "1" to the 8051s serial port you would write this value to the SBUF SFR, which has an SFR address of 99 Hex. Thus, to write the value "1" to the serial port you would execute the instruction: MOV 99h,#01h As you can see, it appears that the SFR is part of Internal Memory. This is not the case. When using this method of memory access (its called direct address), any instruction that has an address of 00h through 7Fh refers to an Internal RAM memory address; any instruction with an address of 80h through FFh refers to an SFR control register. Programming Tip: SFRs are used to control the way the 8051 functions. Each SFR has a specific purpose and format which will be discussed later. Not all addresses above 80h are assigned to SFRs. However, this area may NOT be used as additional RAM memory even if a given address has not been assigned to an SFR. Prepared By Dr. M. Moustafa ٤٦

47 3.5.1 Manipulation of SFRs: The 8051 is a flexible microcontroller with a relatively large number of modes of operations. Your program may inspect and/or change the operating mode of the 8051 by manipulating the values of the 8051's Special Function Registers (SFRs). SFRs are accessed as if they were normal Internal RAM. The only difference is that Internal RAM is from address 00h through 7Fh whereas SFR registers exist in the address range of 80h through FFh. Each SFR has an address (80h through FFh) and a name. The following chart provides a graphical presentation of the 8051's SFRs, their names, and their address. As could be seen, although the address range of 80h through FFh offer 128 possible addresses, there are only 21 SFRs in a standard All other addresses in the SFR range (80h through FFh) are considered invalid. Writing to or reading from these registers may produce undefined values or behavior. Programming Tip: It is recommended that you not read or write to SFR addresses that have not been assigned to an SFR. Doing so may provoke undefined behavior and may cause your program to be incompatible with other 8051-derivatives that use the given SFR for some other purpose. Prepared By Dr. M. Moustafa ٤٧