VDD = V, TA = -40 C to +85 C, outputs terminated with 100 Ohms between Q and /Q.³
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1 Ultra-Low Jitter 200MHz LVDS XO ClockWorks FUSION General Description The is an ultra-low phase jitter XO with LVDS output optimized for high line rate applications. Features 200MHz LVDS Typical phase noise: - 94fs (Integration range: 1.875MHz-20MHz) ±50ppm total frequency stability -40 C to +85 C temperature range Industry standard 6-Pin 5mm x 3.2mm LGA package Absolute Maximum Ratings¹ Supply Voltage (VIN) V Lead Temperature (soldering, 10s) C Case Temperature C Storage Temperature (T ) C to +125 C S ESD Machine Model...200V ESD Rating (HBM)...2kV Electrical Characteristics Operating Ratings² Supply Voltage (VIN) V to +3.63V Ambient Temperature (TA) C to +85 C Junction Thermal Resistance LGA (T ) Still Air...58 C/W JA VDD = V, TA = -40 C to +85 C, outputs terminated with 100 Ohms between Q and /Q.³ Symbol Parameter Condition Min. Typ. Max. Units IDD Supply Current ma F0 Center Frequency 200 MHz Øj Frequency Stability Note 4 ±50 ppm Phase Noise Integration Range (12kHz to 20MHz) Integration Range (1.875MHz to 20MHz) Tstart Start-Up Time 20 ms TR/TF Rise/Fall time ps VOH VOL Duty Cycle % Output High Voltage VOH max = VCM max + 1/2 VOD max Output Low Voltage VOL min = VCM min - 1/2 VOD max fsrms LVDS output levels V LVDS output levels V VOD Output Differential Voltage mv VCM Common Mode Output Voltage V Notes: 1. Exceeding the absolute maximum ratings may damage the device. 2. The device is not guaranteed to function outside its operating ratings. 3. Guaranteed after thermal equilibrium. 4. Inclusive of initial accuracy, temperature drift, aging, shock, vibration. ClockWorks is a registered trademark of Microchip Technology Inc. Microchip Technology Inc. May 14, 2018 Revision 1.0
2 Ordering Information Ordering Part Number Marking Line 1 Marking Line 3 Shipping Package MX555A BB2000 Tube 6-Pin 5mm x 3.2mm LGA -TR MX555A BB2000 Tape and Reel 6-Pin 5mm x 3.2mm LGA Devices are Green and RoHS compliant. Sample material may have only a partial top mark. Pin Configuration OE VDD DNC /Q GND Q Pin Description Pin Number Pin Name Pin Type Pin Level Pin Function 1 OE I, SE LVCMOS Output Enable, disables output to tri-state, 0 = Disabled, 1 = Enabled, 50k Ohms Pull-Up 2 DNC Make no connection, leave floating. 3 GND PWR Power Supply Ground 4, 5 Q, /Q O, Diff LVDS Clock Output Frequency = 200MHz 6 VDD PWR Power Supply Environmental Specifications Thermal Shock MIL-STD-883, Method 1011, Condition A Moisture Resistance MIL-STD-883, Method 1004 Mechanical Shock MIL-STD-883, Method 2002, Condition C Mechanical Vibration MIL-STD-883, Method 2007, Condition B Resistance to Soldering Heat J-STD-020C, Table 5-2 Pb-free devices (except 2 cycles max) Hazardous Substance Pb-Free / RoHS / Green Compliant Solderability JESD22-B102-D Method 2 (Preconditioning E) Terminal Strength MIL-STD-883, Method 2004, Test Condition D Gross Leak MIL-STD-883, Method 1014, Condition C Fine Leak MIL-STD-883, Method 1014, Condition A2, R1=2x10-8 atm cc/s Solvent Resistance MIL-STD-202, Method 215 May 14, Revision 1.0
3 Figure 1. LVDS Output 200MHz 1.875MHz-20MHz 94fs Figure 2. LVDS Output 200MHz 12kHz-20MHz 140fs May 14, Revision 1.0
4 Figure 3. E5001A Period 200MHz LVDS, RMS TJ: 239fs, Pk-Pk TJ: 2.08ps May 14, Revision 1.0
5 Package Information and Recommended Land Pattern for 6-Pin LGA³ 6-Pin LGA (5x3.2mm) Note: 3. Package information is correct as of the publication date. For updates and most current information, go to Microchip Technology Inc. Microchip makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This information is not intended as a warranty and Microchip does not assume responsibility for its use. Microchip reserves the right to change circuitry, specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Microchip's terms and conditions of sale for such products, Microchip assumes no liability whatsoever, and Microchip disclaims any express or implied warranty relating to the sale and/or use of Microchip products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right Microchip Technology Inc. May 14, Revision 1.0
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\ Description polymeric ESD suppressor help protect sensitive electronic equipment against electrostatic discharge (ESD) without distorting data signals. This protection is a result of its ultra-low capacitance
AOZ8809ADI. Ultra-Low Capacitance TVS Diode. Features. General Description. Applications. Typical Applications
Ultra-Low Capacitance TVS Diode General Description The AOZ889ADI is a transient voltage suppressor array designed to protect high speed data lines such as HDMI 1.4/2., USB 3./3.1, MDDI, SATA, and Gigabit
GRF6011. Preliminary. SPDT Failsafe Switch GHz. Product Description. Features. Applications
Product Description Features Path: RFC to RF1: (1.9 GHz); Vdd: 3.3V Insertion Loss: 0.43 db IP1dB: 32.0 dbm IIP3: 49.5 dbm is linear, ultra-low loss SPDT switch that has been designed with failsafe characteristics
GRF5110. Preliminary dbm Power-LNA Tuning Range: GHz. Product Description
Preliminary Product Description is a high linearity PA /Linear Driver with low noise figure (NF). It delivers excellent P1dB, IP3 and NF over a wide range of frequencies with fractional bandwidths of roughly
PCI EXPRESS Jitter Attenuator
PCI EXPRESS Jitter Attenuator ICS874003-04 DATA SHEET General Description The ICS874003-04 is a high performance ICS Differential-to-LVDS Jitter Attenuator designed for use HiPerClockS in PCI Express systems.
Features. LOAD SWITCH or PMIC. LOAD SWITCH or PMIC /RESET
Dual-Input Push Button Reset IC with Immediate and Delayed Outputs General Description The is a two input, two output push-button reset IC. It will generate a reset pulse for a factory-programmed reset
Monolithic Amplifier CMA-252LN+ Ultra Low Noise, High IP to 2.5 GHz. The Big Deal
Ultra Low, High IP3 Monolithic Amplifier 50Ω The Big Deal 1.5 to 2.5 GHz Ceramic, Hermetically Sealed, Nitrogen filled Low profile case,.045 high Ultra Low High Gain, High IP3 Class 1B HBM ESD (500V) CASE
DS90LV004 4-Channel LVDS Buffer/Repeater with Pre-Emphasis
DS90LV004 4-Channel LVDS Buffer/Repeater with Pre-Emphasis General Description The DS90LV004 is a four channel 1.5 Gbps LVDS buffer/repeater. High speed data paths and flow-through pinout minimize internal
GRF3014. Preliminary. Broadband Gain Block Near DC to 9.0 GHz. Product Description. Features. Applications
Product Description is a broadband gain block designed for applications up to 9.0 GHz exhibiting flat gain over the band. Features Reference: 5.0V/45mA/5.0 GHz Gain: 10.0 db OP1dB: 12.4 dbm OIP3: 26.0
GRF2243. Preliminary. LNA with Bypass Tuning Range: 0.1 to 5.0 GHz. Product Description. Features. Applications
Product Description Features Reference: 3.3V/15mA/2.5 GHz Gain: 19.8 db EVB NF: 0.75 db is a low noise amplifier (LNA) with low loss bypass which requires only a single control input. It is designed for
3.3V, 3.2Gbps DIFFERENTIAL 4:1 LVDS MULTIPLEXER with INTERNAL INPUT TERMINATION
3.3V, 3.2Gbps DIFFERENTIAL 4:1 LVDS MULTIPLEXER with TERNAL PUT TERMATION FEATURES Selects among four differential inputs Guaranteed AC performance over temp and voltage: DC-to > 3.2Gbps data rate throughput
500mW, 5% Tolerance SMD Zener Diodes
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SY89610L. General Description. Features. Applications MHz to 694MHz Jitter Attenuator and Low Phase Noise Frequency Synthesizer
77.75MHz to 694MHz Jitter Attenuator and Low Phase Noise Frequency Synthesizer General Description The is a 3.3V, fully differential jitter attenuator and frequency synthesizer that accepts a noise clock
PCI EXPRESS Jitter Attenuator
PCI EXPRESS Jitter Attenuator ICS874003-02 DATA SHEET General Description The ICS874003-02 is a high performance Differential-to- LVDS Jitter Attenuator designed for use in PCI Express systems. In some