FST3257 Quad 2:1 Multiplexer / Demultiplexer Bus Switch

Transcription

1 FST3257 Quad 2:1 Multiplexer / Demultiplexer Bus Switch Features 4Ω Switch Connection Between Two Ports Minimal Propagation Delay Through the Switch Low I CC Zero Bounce in Flow-Through Node Control Inputs Compatible with TTL Level Description May 2009 The Fairchild Switch FST3257 is a quad 2:1 high-speed CMOS TTL-compatible multiplexer / demultiplexer bus switch. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. When /OE is LOW, the select pin connects the A port to the selected B port output. When /OE is HIGH, the switch is OPEN and a high-impedance state exists between the two ports. Ordering Information Part Number Operating Temperature Range Eco Status Package Packing Method FST3257M -40 to 85 C 16-Lead Small Outline Integrated Circuit Tubes RoHS FST3257MX -40 to 85 C (SOIC) JEDEC MS-012,0.150 Narrow Tape and Reel FST3257QSC -40 to 85 C 16-Lead Quarter Size Outline Package Tubes Green FST3257QSCX -40 to 85 C (QSOP) JEDEC MO Inch Wide Tape and Reel FST3257MTC -40 to 85 C 16-Lead Thin Shrink Small Outline Package Tubes RoHS FST3257MTCX -40 to 85 C (TSSOP) JEDEC MO-153, 4mm Wide Tape and Reel For Fairchild s definition of Eco Status, please visit: FST3257 Rev

2 Pin Assignments Pin Descriptions Figure 1. Logic Diagram Figure 2. Connection Diagram Pin # Names Description 1 S Select Input 2, 3, 5, 6, 10, 11, 13, 14 1B 1, 1B 2,2B 1, 2B 2, 3B 1, 3B 2, 4B 1, 4B 2 Bus B 4, 7, 9, 12 1A, 2A, 3A, 4A Bus A 8 GND Ground 15 /OE Bus Switch Enables 16 VCC Supply Voltage Truth Table Select Inputs Bus Switch Enabled Function S Logic Level HIGH Disconnected Logic Level LOW Logic Level LOW A=B 1 Logic Level HIGH Logic Level LOW A=B 2 FST3257 Rev

3 Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit V CC Supply Voltage V V S DC Switch Voltage V V IN DC Input Voltage (1) V I IK DC Input Current -50 ma I OUT DC Output Sink Current 128 ma I CC/I GND DC V CC/GND Current ±100 ma T STG Storage Temperature Range C Note: 1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Min. Max. Unit V CC Power Supply Operating V V IN Input Voltage V V OUT Output Voltage V t r,t f Input Rise and Fall Time Switch Control Input 0 5 Switch I/O 0 DC ns/v T A Free Air Operating Temperature C Note: 2. Unused control inputs must be held HIGH or LOW. They may not float. FST3257 Rev

4 DC Electrical Characteristics Symbol Parameter Conditions V CC (V) T A =-40 to +85 C Min. Typ. (3) Max. V IK Clamp Diode Voltage I IN=-18mA V V IH V IL High-Level Input Voltage Low-Level Input Voltage 3.0 to 3.6 (5) to to 3.6 (5) to I IN Input Leakage Current 0 V IN ±1.0 µa I OZ Off-state Leakage Current 0 A, B V CC 5.5 ±1.0 µa R ON Switch On Resistance (4) I CC Quiescent Supply Current V IN=0V, I IN=64mA 3.3 (5) V IN=0V, I IN=30mA 3.3 (5) V IN=2.4V, I IN=15mA 3.3 (5) V IN=2.4V, I IN=15mA 3.0 (5) V IN=0V, I IN=64mA V IN=0V, I IN=30mA V IN=2.4V, I IN=15mA V IN=2.4V, I IN=15mA V IN=V CC or GND, I OUT=0, Units µa ΔI CC Increase in I CC per input One Input at 3.4V, Other inputs at V CC or GND ma Notes: 3. Typical values are at nominal V CC for the V CC range and T A=25 C. 4. Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the voltages on the A or B pins. 5. This parameter is guaranteed by design, but is not tested. V V Ω FST3257 Rev

5 AC Electrical Characteristics Symbol Parameter Conditions t PHL,t PLH t PZH,t PZL t PHZ,t PLZ V CC= 4.5 to 5.5V T A=-40 to +85 C, C L= 50pF, RU=RD=500Ω V CC=4.0V V CC=3.0 to 3.6V (7) Min. Max. Min. Max. Min. Max. Propagation Delay (6) 0.25 Bus to Bus V IN=Open Propagation Delay Select to Bus A (6) Output Enable Time, Select to Bus B Output Enable Time, Select to Bus /OE Output Disable Time, Select to Bus B Output Disable Time, Select to Bus /OE V IN=7V for t PZL V IN=Open for t PZH V IN=7V for t PLZ V IN=Open for t PHZ Units ns ns ns Figure Figure 3 Figure 4 Figure 3 Figure 4 Figure 3 Figure 4 Notes: 6. This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical on resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance). 7. These parameters are guaranteed by design, but not tested. Capacitance T A=+25 C, f=1mhz. Capacitance is characterized by not tested. Symbol Parameter Conditions Typ. Max. Units C IN Control Pin Input Capacitance V CC=5.0V 3.0 pf C I/O A Port 7.0 V CC /OE=5.0V pf B Port 5.0 Input/Output Capacitance A Port 3.0 V CC /OE=3.3V pf B Port 3.5 FST3257 Rev

6 AC Loadings and Waveforms Notes: 8. Input driven by 50Ω source terminated in 50Ω. 9. C L included load and stray capacitance. 10. Input PRR=1.0MHz, tw=500ns. Figure 3. AC Test Circuit Figure 4. AC Waveforms FST3257 Rev

7 Physical Dimensions 6.00 PIN ONE NDICATOR MAX (0.30) M A CBA B 1.75 LAND PATTERN RECOMMENDATION C SEE DETAIL A C (R0.10) (R0.10) (1.04) X 45 GAGE PLANE 0.36 SEATING PLANE NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AC, ISSUE C. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH AND TIE BAR PROTRUSIONS D) CONFORMS TO ASME Y14.5M-1994 E) LANDPATTERN STANDARD: SOIC127P600X175-16AM F) DRAWING FILE NAME: M16AREV12. DETAIL A SCALE: 2:1 Figure Lead Small Outline Integrated Circuit (SOIC) JEDEC MS-012,0.150 Narrow Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: FST3257 Rev

8 Physical Dimensions TOP VIEW SIDE VIEW LAND PATTERN RECOMMENDATION END VIEW DETAIL A Figure Lead Quarter Size Outline Package (QSOP) JEDEC MO Inch Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: FST3257 Rev

9 Physical Dimensions 5.00± ± MTC16rev4 Figure Lead Thin Shrink Small Outline Package (TSSOP) MO-153, 4.4mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: FST3257 Rev

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