CPCI INTERBUS 3M G4. Technical Description

Transcription

1 Computertechnik GmbH CPCI INTERBUS 3M G4 Technical Description Order Numbers: CPCI INTERBUS 3M G4 Your contact: 2001 by Janich & Klass Computertechnik GmbH, Wuppertal Zum Alten Zollhaus Wuppertal Germany Tel: +49 (0) Fax: +49 (0)

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3 Table of Contents 1 Overview Board Description Host-Interface PCI register I/O Register Watchdog The Signal SysFail USC/ The Topics of the USC/ The Functional Mode of the USC/ Multiport-Memory (MPM) Communication Abilities of the MPM Interfaces Remote Bus Interface Serial Interface Bus Connector Diagnosis Elements Front Panel Technical Data Environment Conditions ( ) Page 3

4 Copyright 2000 Janich & Klass Computertechnik GmbH. All rights reserved. Printed in Germany. The information contained in this documentation is the property of Janich & Klass Computertechnik GmbH, Wuppertal. Neither receipt nor possession hereof confers or transfers any right to reproduce or disclose any part of the contents hereof, without the prior written consent of Janich & Klass. Trademarks All product names and logos are trademarks or registered trademarks of their representative companies. Disclaimer The contents of this manual are checked for matching the described product. Deviations cannot be excluded, so that we cannot give any guarantee for full accuracy. The details of this manual are however regularly checked. Necessary corrections will be contained in the subsequent revisions. We will be thankful for any improvement proposals. Janich & Klass Computertechnik GmbH assume no liability for damages incurred directly or indirectly from errors in this manual, omissions, or discrepancies between this manual and the product. Safety Hints This unit may not be used in any other way than described in this manual. Installation, putting into operation, and maintenance of this unit may exclusively be made by qualified personnel. This personnel must be familiar with the warnings and hints of this manual. Qualified personnel by means of this manual are persons who are familiar with installation, mounting, putting into operation and operation of this unit and who have the qualification fitting their tasks, like for example: - Education and instructions, respectively the authorization to switch on/off, to ground, and to tag current circuits and units resp. systems as per the actual standards of safety technique. - Education and instruction as per the actual standards of safety technique concerning maintenance and use of appropriate safety equipment. - Education in First Aid. Before you put this unit into a bus-rack, you have to check whether the required voltages are available at the specific connector pins, and whether the required currents can be fed. Before exchanging any units, the sub-rack must be switched off. This unit contains electro-statically endangered components. Electro-static discharge through the human body or similar must therefore by all means be avoided, for example, by prior touch to grounded metal parts (water pipe, etc.). This is important specially before exchanging the unit. You have to retighten all locking screws after every exchange. Protect this unit from moisture. By no means conductive matters or liquids may enter the unit. Do not operate the unit at higher temperatures than stated in this description. Connected wires may not be subject to tension load. Page 4 ( )

5 Do not expose the unit to strong magnet fields, for the danger of data loss from the hard disk. The unit may not be exposed to strong vibrations, as they might destroy the hard disk. In case of a defective fuse, please by all means replace it with a new one of the same type, as otherwise fire danger exists. This unit contains a lithium battery. ATTENTION! Explosion danger at inadequate battery exchange. The battery may be replaced only with the same type, or with a type recommended by Janich & Klass. Used batteries must be disposed according to legal prescriptions. At visible damages of the unit, please return it to Janich & Klass for repair. (Each unauthorized repair may lead to loss of the guarantee.) Do not try to repair this unit on your own. Please always address yourself to Janich & Klass in case of eventual repair. Guaranty repair must always be made directly by Janich & Klass. History Revision Date Name Modifications HW-Revision p.b Documentation completed 1.0 ( ) Page 5

6 1 Overview The CPCI INTERBUS 3M G4 is an intelligent Master component for the CompactPCI-Bus for the 4 th INTERBUS generation. The card processes the complete INTERBUS protocol without burdening the CPCI Host-CPU. The integrated Multiport Memory enables a fast data exchange with the INTERBUS. Drivers are available for the operating systems Windows NT and VxWorks. They allow access to the functions of the card via a simple software interface. Die Technical Data of the CPCI INTERBUS 3M G4 in Short: INTERBUS Protocol (DIN E 19258) INTERBUS component of the 4 th generation with follow features: - tree structure on up to 16 b bus levels - logical addressing of individual members and data points - usage of ample switch functions for partial areas of the INTERBUS system - extended diagnosis functions - support of INTERBUS-Loop 2 data pre-processing on the component full support of the CMD G4 software from Phoenix Contact up to 255 bus segments, up to 4096 I/O points, 512 members resp. 62 PCP members at the bus, 128KB On-Board RAM for "Process Data Preprocessing" remote bus connection via 9pin DSUB connector with potential separation RS232 interface on 9pin DSUB connector for parametring, operation, diagnosis and firmware update Watchdog up to 8 components per computer four LED's for "RUN", "FAIL", "BSA" and "PF" operating temperature 5-65 C, relative humidity 10-90% non-condensing power consumption 5V/0,7A 3U component with front panel 4HP Page 6 ( )

7 2 Board Description 2.1 Host-Interface The Host Interface represents the interface between the CompactPCI host CPU and the MPM interface of the board. The host interface is realized with a 32 Bit data bus and a 32 Bit address bus, as per PCI-Bus Specification 2.2. Furthermore, an interrupt signal from the MPM control logic can generate interrupts at the CompactPCI-Bus. The software interface of the boards to the host system consists of a 16 Byte window in the I/O area and a 256 KByte window in the standard address area (memory area). The basic addresses of both windows are assigned by the system Bios. Memory-Bereich 256 KByte 16 Byte { I/O-Bereich IBS PCI SC/... x KByte x = n * 256 KByte IBS PCI SC/ KByte reserviert MPM 0 KByte 0 MByte 6189A004 Address Windows of the CPCI INTERBUS 3M G4 ( ) Page 7

8 2.1.1 PCI register The PCI registers integrate the boards into the CPCI-Bus-System. The following table shows the arrangement of the PCI registers and their board-specific settings: 00hex Device ID (4100hex for CPCI INTERBUS 3MG4) Vendor ID (13DBhex for Janich & Klass) 04hex Status Register Command Register 08hex Class Code (0Chex) Subclass Code (80hex) 00hex Revision ID (HW-Rev) 0Chex Bits Header Type Latency Timer Cache Line Size 10hex 14hex 18hex 1Chex 20hex 24hex 28hex 2Chex 30hex 34hex 38hex 3Chex Max-Lat (00hex) Basic address register 0 (reserved for PLX9030 configuration) Basic address register 1 (reserved for PLX9030 configuration) Basic address register 2 (here: I/O address for the host interface register, 32Byte) Basic address register 3 (here: addresses for MPM and NV-RAM, 512 KByte) Basic address register 4 (not used) Basic address register 5 (not used) Reserved (not used) Reserved (not used) Expansion memory basic address (Expansion ROM) (not used) Min-Gnt (00hex) Reserved (not used) Reserved (not used) Interrupt Pin Interrupt Line Annotations to above Table: The Vendor-ID 13DBhex is the released manufacturer ID for Janich & Klass Computertechnik GmbH. The Device-ID of the CPCI INTERBUS 3M G4 is 4100hex. The Revision-ID indicates the hardware revision of the card. The Class Code 0Chex identifies a serial bus controller The PCI interface uses two basic address register: The Basic address register 2 contains the I/O address for the host interface register. The length of the I/O address area is 32 Byte. The Basic address register 3 is used for the MPM address area of the master and the NV-RAM. For MPM and NV-RAM, 512 KByte are foreseen as memory address area. The MPM serves as data interface between the host system and the INTERBUS master. Only interrupt line A is used. Page 8 ( )

9 2.1.2 I/O Register The CPCI INTERBUS 3M G4 assigns 32 I/O addresses in the I/O address area of the host- CPU. The following registers are defined: Offset 0 r/w RES1 reserved Offset 1 r/w RES2 reserved Offset 2 r/w IEREG Interrupt Enable Register Offset 3 r/w WATCHDOG Watchdog Control Register Offset 4 r/w MARESET Software Reset Register Offset 7 r/- CARDID Card Identification 2.2 Watchdog The CPCI INTERBUS 3M G4 has a Watchdog, which can be used for survey of the user program ( Crash of the CPU, freezing of a program). When the Watchdog times out, it sets the INTERBUS system back to a defined condition (reset of all outputs). Hint: The Watchdog does not influence the host CPU; a Rest of the host CPU is not generated! The Watchdog must, if you want to use it, be enabled from the user program. As default, it is disabled. Once enabled, the Watchdog can no more be disabled by software, but can be disabled only by switching the system off, or by a hardware reset. The Watchdog can be set to different periods. Within this set time, the Watchdog must be triggered by calling the function TriggerWatchDog () in the user program, otherwise it will generate a reset of the INTERBUS system. The following table shows the different survey periods: Survey Period 8,2 ms 16,4 ms 32,8 ms 65,5 ms 131,1 ms 262,1 ms 524,3 ms 1048,6 ms 2.3 The Signal SysFail For every member connected to the MPM, his own area is reserved within the MPM which is used for example for status reports or for reply signals. One of these status signal is the signal SysFail (System Failure). It is set at a system error of the corresponding member, for example when his Watchdog has timed out. With the function GetSysFailRegister, you can read the signal SysFail of any MPM member. ( ) Page 9

10 2.4 USC/4 The central part of the CPCI INTERBUS 3M G4 is the INTERBUS Masterboard IBS USC/4 from Phoenix Contact. It integrates all INTERBUS-specific components on one single module and has an interface to the Multiport Memory (MPM). The firmware integrated to the IBS USC/4 performs all tasks in the range of network management and network diagnosis. The firmware operates under a real time multi taskingoperating system on a highly developed hardware. In addition, an SPS runtime system is integrated to the firmware, which can be used for host CPU-independent preprocessing of process data The Topics of the USC/4 INTERBUS Protocol as per EN Master-Interface and Slave-Interface, respectively -Extension Master Interface supports up to 256 remote bus members supports up to 256 / 512 Slave members (remote bus and local bus members) max / 4096 inputs and 2048 / 4096 outputs physical and logical addressing of all slave members tree structure with up to 16 hierarchic remote bus levels direct data transfer possible, without action of the CPU, between I/O units and between PCP units PCP 2.0 (supports parameter channel widths of 1, 2 and 4 words), 32 / 62 (basis functionality / expandable up to) units interrupt-controlled synchronization to the INTERBUS cycles (cycle preciseness 20 µs) Diagnosis via on-board LED's MPM asynchronous serial interface (RS232C) The Functional Mode of the USC/4 The IBS USC/4 comprises all hardware components required for the kernel of an INTERBUS Master. The Master functionality, as also the system coupler functionality are supported. The following illustration shows an INTERBUS network with both functionalities. An INTERBUS Master has a remote bus interface to the INTERBUS members and an interface to the relative host system (SPS or IPC, for example). If you add a Slave interface to the Master (for example, the protocol chip SUPI 3), a system coupler is generated. A system coupler has the same interfaces to INTERBUS and host system as an INTERBUS Master. Same as the Master, it controls an INTERBUS network on its own, but it can additionally exchange data via its Slave interface with a hierarchically superior INTERBUS network. Page 10 ( )

11 Example for an INTERBUS Network For reaching fast reply periods (max. 2 INTERBUS cycles), process data can be preprocessed with the IBS USC/4. Here, inputs are logically connected and the result is transferred to outputs. This functionality is realized by an algorithm defined by the user by means of the software IBS CMD, which is processed with an SPS runtime system. The SPS runtime system is integrated into the firmware of the IBS USC/4. The following table gives a short overview over the capability of the SPS runtime systems: Instruction Time (TPLC) Required Memory 1k word instructions 0,7ms 7 Kbytes 1k Bit instructions 1,5ms 15 Kbytes Hint: The INTERBUS cycle time rises by the process time for the SPS runtime system: T = TCycle + TPLC The INTERBUS cycle time is calculated as follows: with n A TBit TSW TM TCycle = (15 * (8 + n ) + 3 * A) * TBit + TSW + 2 * TM Number of Bytes of all active field units in the configuration frame Number of active members Bit period (0,002 ms) Firmware runtime (0,7 ms) Signal runtime on the transfer medium (0,016 ms * km -1 for copper) The value TSW is valid for the physical addressing of the process data. It includes not the time required for a logical addressing. To approximately determine the cycle time, please calculate with a time of 5 µs for each logically addressed process data object. ( ) Page 11

12 2.5 Multiport-Memory (MPM) Another important functional unit of the CPCI INTERBUS 3M G4 is, besides the USC/4, the 64 KByte wide Multiport-Memory (MPM) with integrated access administration. It is designed as static RAM (SRAM) and serves for data exchange between the Host-CPU and the USC/4. The MPM is switched linearly into the address area of the Host-CPU. 7FFFFhex Page 0 bis max. Page 255 max. 256 KByte 40000hex 3FFFFhex 192 KByte 10000hex 0FFFFhex 00000hex 64 KByte Statisches RAM (SRAM) Structure of the MPM 5802A Communication Abilities of the MPM The MPM serves for exchange of information between the MPM members. This communication may be connected to the exchange of data, or may consist of the report about an event. Both possibilities are offered by the MPM and are supported by corresponding mechanisms. The static RAM of the MPM is available for data exchange. For exchanging events, four interrupt sources exist for each MPM member, which can be evaluated independent from each other. It is also possible to use both forms in combination, as, for example, at the mailbox interface. Realized communication methods: Data interface Mailbox interface Sys-Fail-Request Signal interface Synchronization Requests Page 12 ( )

13 Schematic Representation of the different MPM Communication Abilities: Annotation: Some of the Events (Mailbox-Handshake- and Sys-Fail-interrupt) are already arranged to fixed tasks, so that these are no longer freely available to the user. ( ) Page 13

14 3 Interfaces 3.1 Remote Bus Interface The remote bus interface X1 makes the connection between the ISA96 CPCI 3M G4 and the INTERBUS-members (field units). The remote bus interface is designed as 9-pole D-SUB connector on the front panel. Pre-confectioned remote bus cables are available from Phoenix Contact in usual lengths. The following illustration shows the design of the remote bus cable: Front Panel X1 Remote Bus Cable (D9/D9) 6 DO- 6 DO- green DO- 6 1 DO+ 1 DO+ yellow DO+ 1 7 DI- 7 DI- rosy DI- 7 2 DI+ 2 DI+ gray DI+ 2 3 COM 3 COM brown COM V 5 bridged Screen 9 RBST 9 4 GND Screen 8 VCC 9pole DSUB counter-plug 9pin DSUB connector 9pole DSUB counter-plug Remote Bus Interface and Example of a Remote Bus Cable (Cable Type D9/D9) By means of the interface connector IBS OPTOSUB-MA/M/L-LK from Phoenix Contact, you can design your INTERBUS system in fiber optical technique. For different installation positions, the interface connector is available with right or left orientation. 3.2 Serial Interface The front panel of the CPCI INTERBUS 3M G4 features a serial interface X2 (9pin D-SUBconnector) with which the component can be connected to an IBM-compatible PC. The connection to the PC is made via connection cable IBS PRG CAB, as per the following illustration: Front Panel X2 Connecting Cable 2 TxD 2 TxD RxD 2 3 RxD 3 RxD TxD 3 5 GND 5 GND GND 5 7 RTS 7 RTS RTS 7 8 CTS 8 CTS CTS 8 9pin DSUB connector Screen 9pole DSUB counter-plug Diagnosis Interface and Connection Cable for Connection to a PC Screen 9pole DSUB counter-plug Page 14 ( )

15 The serial interface serves as parametring and diagnostic interface, via which the CPCI INTERBUS 3M G4 can be configured, programmed, surveyed and diagnosed with the operating surface IBS CMD G4 (refer below illustration). Also an update of the firmware can be performed via the serial interface. Operating Surface IBS CMD G4 Diagnosis means the judgement of the quality of the installation of a connected INTERBUS network. This is important when first putting into operation, and also for all maintenance work at already existing installations. This will localize transmission errors at wearing-out sensitive media, such as trailing cables, multi-couplings, collector rings, etc., even before a cumulating of transmission errors will cause breakdowns of the whole installation. ( ) Page 15

16 3.3 Bus Connector Page 16 ( )

17 3.4 Diagnosis Elements The diagnosis interface of the IBS USC/4 serves for controlling additional diagnosis displays on the CPCI INTERBUS 3M G4. These are, on the one hand, four LED's, which are required for the visual basis diagnosis of the INTERBUS system. On the other hand, the ISA96 INTERBUS 3M G4 features a diagnosis expansion connector. It is designed as a 10pin header row S10 and allows for connection of an (optional) diagnosis expansion, for example: the LC-display IBS USC/4-DIAG-L. The following table contains an overview of the meanings of the diagnosis LED's on the front panel of the CPCI INTERBUS 3M G4: LED Color Meaning Display RUN green READY ON OFF RUN ON OFF FAIL rot No Error ON OFF Remote Bus-, Local Bus-, Controller-, Watchdog- or Hardware Error ON OFF BSA green Bus Segment disabled ON OFF PF green Periphery Error ON OFF ( ) Page 17

18 4 Front Panel BSA RUN PF FAIL X2 Diagnose X1 Fernbus IBS 3M G4 Page 18 ( )

19 5 Technical Data Dimensions: Design: Installation Position: Cooling: Power consumption: 100mm * 160mm * 20mm 6 layer board FR4 with solder mask and position print. All connectors are gold-covered. preferably upright with 5mm distance to the assembled side. at upright installation convection cooling with at least 1m/min air speed. 0.9A typical, 1.3A maximum at the 5V; ±50mA typical, ±100mA maximum at the ±12V. 6 Environment Conditions Supply voltages: Operating temperature: Storage temperature: Relative humidity: Storage period: +4,75V... +5,25V, max. 100mV Vss Ripple. +11,4V ,6V, max. 300mV Vss Ripple. -11,4V ,6V, max. 300mV Vss Ripple C C % non-condensing. unlimited. ( ) Page 19