Application Note. Multifunction Data Logger

Transcription

1 Application Note AN2xxx Multifunction Data Logger Author: Tsogjavkhlan Tumurbaatar Associated Project: Yes Associated Part Family: CY8C27xxx PSoC Designer Version: 4.00 Summary This project shows how to set up a system for collecting data to through a computer s serial port. Software is also included in the project file for data logging and drawing the incoming signal shape. Introduction This project is to illustrate how to convert analog signals to digital information, convert digital information to analog signals and a data transfer between PC and PSoC write the data bytes, which come from the PC (software) via RS232, and read the data, which are stored to the RAM area on the PSOC. The output of the ADC is taken and displayed on the LCD display. Multifunction Datalogger convert analog signals to digital and digital information to analog signals finally sending the digital code to the PC. The software Datalog gets the digital code and draws the approximate incoming signal shape and controled analog outputs. Datalog software incoming data stores to the text file. These digital code bytes are stored into the RAM area of the PSoC. All stored bytes are sent to the PC at 9600 bps. User Modules This application uses the following PSoC microcontroller resources: Delta ADC User Module PGA User Module 2 DAC User Module 2 Counter User Module PWM User Module UART User module AMUX User module Flash temperature module The Basics LCD user module The schematic in Figure 1 exemplifies the simplicity of the hardware design. Since the PSoC chip has an internal oscillator allows clocking up to 24 MHz, no external crystal is necessary. The serial interface is the CY27c443s internal UART user module connected to the outside world via RS-232 using a Maxim MAX232 interface chip, which derives RS-232 drive voltages from the 5 volt supply and a MAX232 chip to convert the signals from and to RS232 levels for sending and receiving from the PC. The LCD User Module uses a single I/O port to interface to an industry standard Hitachi HD44780A LCD controller. To reduce the number of pins required, the 4-bit interface mode is used. The LCD to PSoC describe the 4-bit interface connections. Delta ADC gets the analog signal from AMUX by using a buffer (PGA, gain=1) and then converts the analog signal to digital code. It uses an Delta ADC User module to convert from analog to digital, DAC User Module convert from digital to analog signal, 8 bit Counter User Module User Modules provide a down counter with a programmable period and pulse width, the UART User module send, receive data to the PC. Multifunction Datalogger offers 4 analog input channels, 4 digital input, 2 analog output channels, 2 digital output, 1 Pulse generator, 1 Pulse width modulator, LCD display, and RS232 interface. 6/11/2004 Revision A - 1 -

2 User Modules AMUX ([Outbyte+1].[Outbyte+4] memory area) in user code inserted into Main.asm This sets the Mux to connect to a pin in Port 0 (Port 0 is the only port connected to the analog inputs.) The number passed to the function is the bit number on the port. * Initialize the AMUXmodule * mov A, [Input] ; specify pin in Port0 call AMUX4_1_InputSelect ; Switch Port0, pin x PGA A Programmable Gain Amplifier (PGA) with unity gain is also incorporated. The gain of the amplifier feeding the input of the ADC is unity, and this is variable from 1/16 to 16. I setup gain settings with a gain of 1.000, * initialize the ADC module * mov A,DELSIG8_1_HIGHPOWER ; Establish ;power setting... call DELSIG8_1_Start ; and initialize call DELSIG8_1_StartAD ;Commence sampling ; process Delta: cmp [DELSIG8_1_bfStatus],0 jz Delta ; spin lock until(data is Available) mov [DELSIG8_1_bfStatus], 0 ; reset the ;data available flag mov A, [DELSIG8_1_cResult] ;grab the data ;now that its valid mov X,[Count] mov [X+Out_byte],A ;load memory address ; ADC value is ;transferred to RAM The software Datalog gets the digital code and draws the approximate incoming signal shape. mov A,PGA_1_HIGHPOWER ;Set Power level of PGA call PGA_1_Start ;Start the PGA module Delta ADC This project has an 8-bit Delta Sigma ADC placed in the middle block of the 1st column of analog PSoC blocks. The gain of the PGA could be adjusted as desired. The output of the ADC is taken and displayed on the LCD display. The 24 MHz system clock is divided by 6 (VC1) to produce a 4 MHz clock and provided as the clock for the ADC. This results in approximately 15.4 ksps. By varying the dividers, different sample rates can be generated. The ADC value is transferred to RAM Figure 1 6/11/2004 Revision A - 2 -

3 DAC The DAC8 User Module translates 8 bit digital codes to output voltages. The DAC8 translates digital codes to output voltages at an update rate of upto 250 k samples per second. Input codes represented in offset-binary form, as a number ranging from 0 to 254. Upon program execution all hardware settings from the device configuration are loaded into the device and main.asm is executed. The DAC outputs a voltage Volts. Counter The 8-bit Counter User Modules provide a down counter with a programmable period and pulse width. I used two 8-bit counters. First counter; the 24 MHz system clock is divided by 12 (VC3) to produce a 2 MHz clock and provided as the clock for the baud rate generating counter module. The counter module further divides VC3 by 26 to provide the TX's required clock rate of 8 times the baud rate of Second counter generating the pulse for the pulse generator. You can free programmable period. The output is provided on P2.1 at 1kHz 125k Hz pulse. * initialize the DAC module * mov A, DAC8_1_HIGHPOWER ; specify ;DAC's amplify power call DAC8_1_Start ; and turn it on. mov A, DAC8_2_HIGHPOWER ; specify ;DAC's amplify power call DAC8_2_Start ; and turn it on. mov A,[Input_byte+5] ; load value from RAM call DAC8_1_WriteStall ; updates the output ; voltage mov A,[Input_byte+6] ; load value from RAM: call DAC8_2_WriteStall ; updates the output ; voltage The software Datalog send the 2 byte to PsoC and DAC updates output voltage. Outputs voltage range V *initialize the Counter module * call Counter8_1_Start ;Start the Counter8_1 call Counter8_2_Start ;Start the Counter8_2 DivideClock: mov A, [Input_byte+4] ; set the period time call Counter8_2_WritePeriod mov A, [Input_byte+3] ; generate duty cycle call Counter8_2_WriteCompareValue call Counter8_2_EnableInt ;enable the Counter ;Interrupt call Counter8_2_Start ; start to count when ;the enable The software Datalog send the 2 byte to PsoC and Counter updates output frequency pulse. Output frequency range 1-125kHz. Figure 2 Figure 3 6/11/2004 Revision A - 3 -

4 UART The UART is set up to operate at a 9.6K Baud Rate by the counter output frequency. Baud Rate is determined by the UART input clock frequency divided by 8 (76.8.6KHz/ 8 = Upon program execution all hardware settings from the device configuration are loaded into the device and main.asm is executed. The output is provided on TX P2.2, RX P2.0 at 9600 baud, no parity, 8 data bits and 1 stop bit. This project is written to be performed in the interrupt processing. dec [Count1] jnz RXdata exit1: mov [Count1],08h TxData: mov X,[Count1] mov A,[X+Out_byte] call UART_1_SendData Notready: call UART_1_bReadTxStatus and A, UART_1_TX_COMPLETE jz Notready dec [Count1] jnz TxData exit: pop X pop A The software Datalog send the 8 byte (Output string) to PsoC and receive the 8 byte (Input string) from to PsoC via serial port. *initialize the UART module * mov A,UART_1_PARITY_NONE ; No parity mov A,(UART_1_ENABLE_ RX_INT UART_1_DISABLE_TX_INT) call UART_1_IntCntl call UART_1_Start *UART RX interrupt area * push A push X mov [Count1],08h RXdata: mov [Row2],ffh mov [Count2],04h Wait: dec [Row2] jnz a1 mov [Row2],ffh dec [Count2] jnz a1 jz exit1 a1: call UART_1_bReadRxStatus and A,UART_1_RX_COMPLETE jz Wait call UART_1_bReadRxData mov X,[Count1] mov [X+Input_byte],A PWM Figure 4 The 24 MHz system clock is divided by 4 (VC1) and 16 (VC2) to produce a 250 khz clock. PWM8_1 drives its clock from the VC2 clock signal. The PWM8 User Module translates two 8 bit digital codes to pulses. The output of PWM8_1 drives GlobalOutEven_0, PSoC Pup board connected to pin P2.3. You can free programmable period and pulse width. The output is provided on P2.3 at 1kHz 100kHz pulse, 0-99% duty cycle. 6/11/2004 Revision A - 4 -

5 *initialize the PWM8_1 module * call PWM8_1_Start ; start the PWM8 - counter PWM: mov [Period1],[Input_byte+7] mov [PulseWidth1],[Input_byte+8] mov A,[Period1] ; set the period time call PWM8_1_WritePeriod mov A, [PulseWidth1] ; set Pulse Width time call PWM8_1_WritePulseWidth call PWM8_1_DisableInt ; ensure that ;interrupts are disabled call PWM8_1_Start ; start the PWM8 - counter ;will start to The software Datalog send the 2 byte to PsoC via serial port and PWM updates output pulse. Pulse freqeuncy range khz Pulse duty cycle range 1-99%. *initialize the Flash temperature module * call FlashTemp_1_Start ; start the analog block call FlashTemp_1_fIsData cmp A,0 ; test for zero jz NoTempYet ; data not ready TempReady: call FlashTemp_1_c GetData ;get the ;temperature data mov [Out_byte+6],A ; save the data to RAM The software Datalog receive the 1 byte from to PsoC via serial port and show temperature value. LCD Figure 6 Flash temperature Figure 5 Flash temperature module where the temperature is collected in the background while the main loop continues to run. The temperature value is transferred to PC. T he LCD User Module uses a single I/O port to interface to an industry standard Hitachi HD44780A LCD controller. To reduce the number of pins required, the 4-bit interface mode is used. The LCD to PSoC describe the 4-bit interface connection s. The ADC value is transferred to RAM and displayed on the LCD display. Decimal value displayed on the LCD display. call bin2bcd8 ; convert hex to ; decimal value mov A,41h call LCD_1_WriteData mov a,30h add a,[input] 6/11/2004 Revision A - 5 -

6 call LCD_1_WriteData mov A,[tBcd1] call LCD_1_PrHexByte mov A,2eh call LCD_1_WriteData mov A,[tBcd0] call LCD_1_PrHexByte mov A,20h call LCD_1_WriteData Digital input output Digital input P2.4-P2.7 Pull Up: This drive looks most like a TTL output. Pull Up can be used as an input or an output. StdCPU Pull Up would be a driver that is pulled up with an internal 5.6K resistor. To be used as an input, you would set the output to one. The pin looks like it was just pulled up with the 5.6K resistor and can be pulled low by the source outside the chip. jmp mask12 mask1: and reg[prt0dr],feh ; set low P0.0 mask12: mov A,[Input_byte+1] ; load value from RAM and A,01h ; check zero jz mask2 or reg[prt0dr],40h ; set high P0.6 jmp next mask2: and reg[prt0dr],bfh ; set low P0.6 Software The Datalog.exe program in Figure 9, which is written in LABVEIW, data send and receive to the PSoC via RS232. Remember LVDEVICE.DLL, SERDRV must be in the same directory as this application. How to Use It The port type should be selected from the Port number section at the upper-left corner of the program window, according to the where the RS232 cable has been connected. Secondly, write path and name of text file empty area at the upper-left corner of program window. Finally, Click the Run button. * Loop area * mov A,reg[PRT2DR] ; load Port2 or A,0fh ; mask MSB mov [Out_byte+5],A ; save the data to RAM ************************************************ Output Digital output P0.0, P0.6 * Loop area * mov A,[Input_byte+2] ; load value from RAM and A,01h ; check zero jz mask1 or reg[prt0dr],01h ; set high P0.0 Figure 7 If you want write data, click WRITE button. 6/11/2004 Revision A - 6 -

7 Schematic Analog in1 Analog in2 Analog in3 Analog in4 Digital in4 Digital in3 PWM out Generator U1 P0[7] AI Vdd P0[5] AIO AI P0[6] P0[3] AIO AIO P0[4] P0[1] AIO AIO P0[2] P2[7] AI P0[0] P2[5] AI REF P2[6] P2[3] AI (asc10) AI AGND P2[4] P2[1]AIasd20asc10 AIasd13asc23P2[2] SMP AI (asc23) P2[0] P1[7] I2C SCL XRES P1[5] I2C SDA P1[6] P1[3] EXTCLK P1[2] P1[1] I2C XTALin P1[2] Vss XTALout, I2C SDA P1[0] CY8C27443 VCC Digit out2 DAC out2 DAC out1 Digit out1 Digital in2 Digital in1 C5 10uF C4 10uF U3 C1+ C1- C2+ C2- T1IN T2IN R1OUT R2OUT MAX232 Vs+ Vs- VCC GND T1OUT T2OUT R1IN R2IN C uF VCC C7 10uF GND Rx2 Tx R1 10k VCC LCD HD44780 Figure 8 6/11/2004 Revision A - 7 -

8 Program panel Figure 9 6/11/2004 Revision A - 8 -

9 About the Author Name: Tsogjavkhlan Tumurbaatar Title: BU international airport, electronic engineer Background: Contact: Interested in design of analog and digital circuits. or BU airport 34, Ulaanbaatar 34, Mongolia Cypress MicroSystems, Inc nd Street SW, Building D Lynnwood, WA Phone: Fax: / / support@cypressmicro.com Copyright 2003 Cypress MicroSystems, Inc. All rights reserved. PSoC (Programmable System-on-Chip ) is a trademark of Cypress MicroSystems, Inc. All other trademarks or registered trademarks referenced herein are property of the respective corporations. The information contained herein is subject to change without notice. 6/11/2004 Revision A - 9 -