Guerrilla 7: Virtual Memory, ECC, IO
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1 Guerrilla 7:, August 4, 2016 Guerrilla 7:,
2 Guerrilla 7:,
3 Why do we need? Guerrilla 7:,
4 Why do we need? Give each program the illusion that it has its own private address space. Provide protection between processes. Add disk to memory hierarchy. Guerrilla 7:,
5 Solution: Paged Memory System Program s view of memory can be broken up into pages Guerrilla 7:,
6 Solution: Paged Memory System Program s view of memory can be broken up into pages Guerrilla 7:,
7 Solution: Paged Memory System Program s view of memory can be broken up into pages Offset bits = log 2 (Page Size) VPN = VA bits - Offset bits PPN = PA bits - Offset bits could possibly be greater than Physical Memory Guerrilla 7:,
8 From VPN To PPN: Page Table Allow storage of program pages non-contiguously! PT resides in main memory: too large to keep in register. Guerrilla 7:,
9 From VPN To PPN: Page Table Allow storage of program pages non-contiguously! PT resides in main memory: too large to keep in register. Guerrilla 7:,
10 From VPN To PPN: Page Table Contains mapping from VA to PA. Guerrilla 7:,
11 From VPN To PPN: Page Table Contains mapping from VA to PA. Guerrilla 7:,
12 From VPN To PPN: Page Table Contains mapping from VA to PA. What is the page is invalid? What if the user does not have right to access a certain page? Guerrilla 7:,
13 PTE: Page Table Entry Guerrilla 7:,
14 Speedup: TLB A cache for Page Table Usually small, entries Guerrilla 7:,
15 Speedup: TLB A cache for Page Table Usually small, entries Usually fully associative cache. Why? Guerrilla 7:,
16 Speedup: TLB A cache for Page Table Usually small, entries Usually fully associative cache. Why? TLB Reach: Amount of virtual address space that can be simultaneouly mapped by TLB TLB Reach = number of TLB entries * page size Guerrilla 7:,
17 Address Translation using TLB Guerrilla 7:,
18 Address Translation walkthrough Guerrilla 7:,
19 Oh I have a Page Fault Guerrilla 7:,
20 Guerrilla 7:,
21 Error Detection/Correction Code Memory system generates errors - accidentally flipped-bits) Guerrilla 7:,
22 Error Detection/Correction Code Memory system generates errors - accidentally flipped-bits) Extra bits are added to each M-bit data chunk to produce an N-bit code word Those extra bits are a function of the real data. Guerrilla 7:,
23 Single-Error Correction: Hamming ECC Guerrilla 7:,
24 Single-Error Correction: Hamming ECC Guerrilla 7:,
25 Memory-mapped IO Program accesses device with control and data register. Guerrilla 7:,
26 Polling Guerrilla 7:,
27 Polling CPU waits until the device is ready Little overhead Good for regular, frequent accesses Guerrilla 7:,
28 Interrupt Guerrilla 7:,
29 Interrupt Device sends interrupt to processor, processor halts program and goes to interrupt handler Large overhead - need to save program state Handler is inaccessible to user program Good for infrequent accesses Guerrilla 7:,
30 RAID Dependency and RAID Guerrilla 7:,
31 Dependability Measures Guerrilla 7:,
32 RAID Summary RAID 0: No redundancy RAID 1: Disk Mirroring/Shadowing RAID 2-4: Data Striping + Parity. (bit-striping, byte-striping, block striping) RAID 5: Interleaved parity. Guerrilla 7:,
33 RAID1 Guerrilla 7:,
34 RAID3 Guerrilla 7:,
35 RAID4 Guerrilla 7:,
36 RAID5 Guerrilla 7:,
37 Disk Access Time Guerrilla 7:,
38 Disk Access Time Guerrilla 7:,
39 Disk Access Time Guerrilla 7:,
40 Disk Access Time Guerrilla 7:,
41 Ending Guerrilla 7:,
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