EDI8G322048C DESCRIPTION FEATURES PIN CONFIGURATION PIN NAMES

Transcription

1 2048K x 32 Static RM CMOS, High Speed Module FETURES n 2048K x 32 bit CMOS Static n Random ccess Memory ccess Times: 20, 25, and 35ns Individual Byte Selects Fully Static, No Clocks TTL Compatible I/O n High Density Package 72 lead SIMM, No. 407 Common Data Inputs and Outputs n Single +5V (±10%) Supply Operation DESCRIPTION The EDI8G322048C is a high speed 64 megabit Static RM module organized as 2048K words by 32 bits. This module is constructed from sixteen 1024K x 4 Static RMs in SOJ packages on an epoxy laminate (FR4) board. Four chip enables (EØ-E3) and the highest order address line are used to independently enable the four bytes as well as the low or high block of addressable memory space. Reading or writing can be executed on individual bytes or any combination of multiple bytes through proper use of selects. The EDI8G322048C is offered in a 72 lead SIMM package, which enables 64 megabits of memory to be placed in less than 1.3 square inches of board space. ll inputs and outputs are TTL compatible and operate from a single 5V supply. Fully asynchronous circuitry requires no clocks or refreshing for operation and provides equal access and cycle times for ease of use. Pins PD1- PD4, are used to identify module memory density in applications where alternate modules can be interchanged. PIN CONFIGURTION PIN NMES Ø- 20 ddress Inputs EØ-E3 Chip Enables W Write Enable G Output Enable DØ-D31 Common Data Input/Output VCC Power (+5V ±10%) VSS Ground NC No Connection February 2002 Rev. 2 ECO # White Electronic Designs Corporation (508)

2 BLOCK DIGRM 0-19 W\ G\ U1 D0-D3 U3 D4-D7 20 E1\ E2\ DECODER U9 U2 D0-D3 D8-D11 U11 U4 D4-D7 D12-D15 U10 D8-D11 U12 D12-D15 U5 D16-D19 U7 D20-D23 20 U13 D16-D19 U15 D20-D23 E3\ E4\ DECODER U6 D24-D27 U8 D28-D31 U14 D24-D27 U16 D28-D31 8G322048C White Electronic Designs Corporation Westborough, M (508)

3 BSOLUTE MXIMUM RTINGS* RECOMMENDED DC OPERTING CONDITIONS Voltage on any pin relative to VSS -0.5V to 7.0V Operating Temperature T (mbient) Commercial 0 C to +70 C Storage Temperature, Plastic -55 C to +125 C Power Dissipation 7.0 Watts Output Current 20 m *Stress greater than those listed under bsolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Parameter Sym Min Typ Max Units Supply Voltage VCC V Supply Voltage VSS V Input High Voltage VIH V Input Low Voltage VIL V C TEST CONDITIONS Input Pulse Levels VSS to 3.0V Input Rise and Fall Times 5ns Input and Output Timing Levels 1.5V Output Load 1TTL, CL = 30pF (NOTE: For tehz, tghz and twlz, CL = 5pF) DC ELECTRICL CHRCTERISTICS Parameter Sym Conditions Min Typ Max Units Operating Power Supply Current ICC1 W, E = VIL, II/O = 0m, Min Cycle 1750 m Standby (TTL) Power Supply Current ICC2 E ³ VIH, VIN VIL or VIN ³ VIH 800 m Full Standby Power Supply Current CMOS ICC3 E ³ VCC -0.2V VIN ³ VCC -0.2V or VIN 0.2V 160 m Input Leakage Current ILI VIN = 0V to VCC ±80 µ Output Leakage Current ILO V I/O = 0V to VCC ±20 µ Output High Voltage VOH IOH = -4.0m 2.4 V Output Low Voltage VOL IOL = 8.0m 0.4 V *Typical: T = 25 C, VCC = 5.0V TRUTH TBLE E0 E1 E2 E3 W G Operational Comments H H H H H H Disabled L L L L H L Read Double Word L L L L L H Write Double Word * * * * L H Write One or More Bytes in Double Word * * * * H L Read One or More Bytes in Double Word *Each enable controls one byte (x8) within the x32 (doubleword) and one or more byte enables may be driven valid during this operation. CPCITNCE (f=1.0mhz, VIN = VCC OR VSS) Parameter Sym Max Unit ddress Lines CI 120 pf Data Lines CD/ 20 pf Chip Enable Line CC 120 pf Write Line CN 120 pf These parameters are sampled, not 100% tested. 3 White Electronic Designs Corporation (508)

4 C CHRCTERISTICS RED CYCLE Symbol 20ns 25ns 35ns Parameter JEDEC lt. Min Max Min Max Min Max Units Read Cycle Time tvv trc ns ddress ccess Time tvv t ns Chip Enable ccess telv tcs ns Chip Enable to Output in Low Z 1 telx tclz ns Chip Disable to Output in High Z 1 tehz tchz ns Output Hold from ddress Change tvx toh ns Output Enable to Output Valid tglv toe ns Output Enable to Output in Low Z 1 tglx tolz ns Output Disable to Output in High Z 1 tghz tohz ns Note 1: Parameter guaranteed, but not tested. RED CYCLE 1 - W HIGH, G, E LOW TVV DDRESS 1 DDRESS 2 TVV TVX DT 1 DT 2 RED CYCLE 2 - W HIGH TVV E TVV TELV TELX TEHZ G TGLV TGLX TGHZ White Electronic Designs Corporation Westborough, M (508)

5 C CHRCTERISTICS WRITE CYCLE Symbol 20ns 25ns 35ns Parameter JEDEC lt. Min Max Min Max Min Max Units Write Cycle Time tvv twc ns Chip Enable to End of Write telwh tcw ns twleh tcw ns ddress Setup Time tvwl ts ns tvel ts ns ddress Valid to End of Write tvwh tw ns tveh TW ns Write Pulse Width twlwh twp ns teleh twp ns Write Recovery Time twhx twr ns tehx twr ns Data Hold Time twhdx tdh ns tehdx tdh ns Write to Output in High Z 1 twlz twhz ns Data to Write Time tdvwh tdw ns tdveh tdw ns Output ctive from End of Write 1 twhx twlz ns Note 1: Parameter guaranteed, but not tested. WRITE CYCLE 1 - W CONTROLLED TVV E TELWH W D TVWL TVWH TWLWH TWHX TDVWH TWHDX DT VLID TWLZ HIGH Z TWHX 5 White Electronic Designs Corporation (508)

6 WRITE CYCLE 2 - E CONTROLLED TVEL TVV TELEH E W D TVEH HIGH Z TWLEH TEHX TDVEH TEHDX DT VLID ORDERING INFORMTION Part Number Speed Package (ns) No. EDI8G322048C20MMC EDI8G322048C25MMC EDI8G322048C35MMC PCKGE DESCRIPTIONS PCKGE NO. 407: 72 LED SIMM LL DIMENSIONS RE IN INCHES White Electronic Designs Corporation Westborough, M (508)