Enabling safer embedded systems

Size: px
Start display at page:

Download "Enabling safer embedded systems"

Transcription

1 Advanced AUTOSAR Profiling and Run-Time Optimization incorporating Operating System, RTE and Network Communication. Enabling safer embedded systems Using Trace for Run-Time Analysis of an AUTOSAR Application isystem, April 2017

2 Agenda Motivation - What needs to be traced? AUTOSAR OS Profiling based on ORTI Advanced AUTOSAR Profiling AURIX TC27x Trace Capabilities isystem Trace Tool Demo Configuration - Visualization - Export

3 Overall Motivation Tool Interfaces AUTOSAR/OS Tool Timing/Modeling Tool Configuration AUTOSAR Configuration Event Signaling Configuration Debug/Trace Tool Trace Data Event Signaling Trace Capture & Display/Analysis

4 What needs to be traced? for Timing Analysis of Tasks, Runnables and RTE Port Communication

5 What needs to be traced? - Tasks / Runnables / RTE Ports / Network DAP2 Core 0 Core 1 Task Task Task Task Task SWC SWC SWC SWC SWC ic5500 IOM CAN COM RTE OS CAN TriCore TC277TF

6 What needs to be traced - Export of Trace Data to Timing Tools Timing Tools, such as TA Toolsuite can import Trace Data in "Best Trace Format" (BTF). BTF defines: Trace Data Exchange File Format Event Types and State Model (e.g. Task, ISRs, Runnables, Signals, ) Sample Event (Task): ,STI_T_1ms,0,T,T_1ms_DataProvider2,0,activate ,CORE_1, 0,T,T_1ms_DataProvider2,0,start ,CORE_1, 0,T,T_1ms_DataProvider2,0,terminate

7 Standard AUTOSAR OS Profiling based on ORTI An ORTI Gap-Analysis

8 AUTOSAR OS - ORTI File ORTI = OSEK Run-Time Interface AUTOSAR OS Generator produces: OS Source Code => ELF File ORTI File ORTI File contains OS Configuration Information for a Debug/Trace Tool User Code (.c) OS Code (.c) Compiler Linker OS Code (.elf) AUTOSAR OS Generator ORTI File (.ort /.orti) Debug/Trace Tool OS maintains static Data Structures that hold OS Status Information. OS Awareness Trace/Profiler OS TC277 { RUNNINGTASK = "OS_taskCurrent"; Debug I/F Micro Controller Trace I/F

9 ORTI Gap Analysis Task Profiling Signaling RUNNINGTASK does not allow to distinguish between Task Termination, Preemption and Waiting. Does not allow for detailed Timing Analysis like Initial Pending Time, Total Response Time, Runnable Profiling RTE Generators support Virtual Function Bus Trace to generate Hook Functions. Not covered by ORTI => Debugger not aware of Runnables SWC Communication (RTE Ports) RTE Generators support Virtual Function Bus Trace to generate Hook Functions. Not covered by ORTI => Debugger not aware of RTE Ports Network Communication Not covered by ORTI => Debugger not aware of Network

10 ORTI - Task Profiling (Example) Profile based on ORTI RUNNINGTASK: Detailed Task State Profile:??

11 Advanced AUTOSAR Profiling Task & ISR2 State Trace Tool Integration isystem Analyzer - EB tresos Studio

12 Task-State Trace - isystem Profiler Plugin for Clever Instrumentation allows relaxing the Trace Requirements while maintaining OS Performance. OS Hooks (Macros) allow Insertion of Instrumentation Code. Instrumentation Macros are defined by Instrumentation Plugin.

13 Task-State Trace - isysprof Plugin tresos Configuration to enable Task State Trace by means of Instrumentation Plugin

14 Advanced AUTOSAR Profiling Runnable & RTE Port Trace Tool Integration isystem Analyzer - EB tresos Studio

15 Runnable Profiling - via Progam Trace Runnable Profiling by means of Program Flow Trace Program Flow Trace Produces much more Data than required for Profiling! => Requires high Trace Bandwidth (parallel Trace Port or AURORA) AURIX Compact Function Trace May not be usable with certain Compiler-Optimizations Still produces more Trace Data than required.

16 Runnable Profiling - via Data Trace Runnable Profiling by means of Data Access Trace Instrumentation to "mark" Entry & Exit of each Runnable. Instrumentation Code writes unique Runnable ID to a global Variable. A Write to this Instrumentation Variable triggers a Data Trace Message TASK(Task_A) { /* Signal Runnable Start. */ grunnableid = RUN_A_ID CoreID; Runnable_A(); /* Signal Runnable Return. */ grunnableid = 0 CoreID; } TerminateTask();

17 Runnable Profiling - tresos / isysprof Plugin EB tresos allows Generation of Runnable Start/Return Hooks ("VFB Tracing"). Plugin generates Instrumentation Code and Header File defining unique Runnable IDs.

18 Runnable Profiling - tresos / isysprof Plugin Generated Rte.c: TASK(T_WritingActuator) { Rte_Runnable_calcBrakeAct_Start(); calcbrakeact (); Rte_Runnable_calcBrakeAct_Return(); } Generated isystemrunnablehooks.c: #include "isystemrunnablehooks.h" void Rte_Runnable_calcBrakeAct_Start(void) { isystem_runnable_trace = ipf_calcbrakeact ( mfcr(cpu_core_id) << 24); }

19 RTE Port Trace - Overview RTE Ports are: Used for Comunication between SWC / Runnables Implemented in (generated) RTE Challenges for Trace: Different Types of Ports (Sender/Receiver, Server/Client) Arbitrary Types of Data can be communicated

20 RTE Port Trace - tresos / isysprof Plugin EB tresos allows Generation of Port Start/Return Hooks ("VFB Tracing"). Plugin generates Instrumentation Code to signal Port ID and Data Contents.

21 RTE Port Trace - tresos / isysprof Plugin <SWC>.c: void calcbrakeact (void) { boolean DataElement1 = FALSE; } /* Do this */ Rte_IWrite_calcBrakeAct_PPort_Data_B_DataElement1(DataElement1); /* Do that */ Note: Port Function Call is acutally a Macro (Start Hook -> Port -> Return Hook) Generated isystemrteporthooks.c: void Rte_IWriteHook_calcBrakeAct_PPort_Data_B_DataElement1_Start(boolean data) { isystem_rte_port_trace.portid = 1 ( mfcr(cpu_core_id) << 24); isystem_rte_port_trace.paramvalue_1 = data; }

22 RTE Port Trace - Trace Options Timing Only Timing & Value

23 On-Chip Trace Capabilities of the AURIX TC27x

24 AURIX Debug / Trace Architecture JTAG DAP On- Chip Debug System CPU 0 (TC1.6E) CPU 1 (TC1.6P) CPU 2 (TC1.6P) SRI SPB TC27x MUX POB 0 POB 1 BOB 0 BOB 1 Multi-Core - Cross Connect Memory Controller Emulation Memory AGBT TC27xED

25 AURIX Trace - Overview Processor Observation Block (POB) Two POBs => two CPUs can be traced Program Flow Trace Data Access Trace Bus Observation Block (BOB) Two BOBs => two Buses can be traced (e.g. SRI & SPB) Data Access Trace Trace Interfaces EMEM - DAP2 (Buffer Mode or Upload-While-Sampling Mode) AGBT (AURORA Gigabit Trace)

26 isystem Trace Tools - Configuration - Visualization - Export

27 System Trace Configuration - Demo Setup Trace Trace Buffer Buffer Trace Synchronization IOM Base DTM CAN2/LIN2 (+Timestamp) DAP AP CAN I/F Trace MSG1 Timestamp Trace MSG2 Timestamp... AURIX (DAP) ic5700

28 AURIX Trace Configuration - Demo Setup Data Objects to be traced are located in DSPR0. DSPR1 CPU1 DSPR2 CPU2 SRI BOB DSPR0 Data Objects CPU0 Program Data FLASH LMU RAM POB

29 Profiler Configuration Profiler Configuration is based on an (isystem-propietary) XML file. Profiler Config XML file is generated by isysprof tresos Plugin.

30 Profile Visualization

31 Profiler Export - BTF Currently supported Event Types Tasks ISR2 Runnables Signals (e.g. RTE Ports) Network Signals (under Development)

32 Profiler Export - Example isystem Trace Recording (Tasks, Runnables, RTE Ports) displayed in TA Inspector. Trace data imported as BTF. Core 1 Core 0 T_5ms_calcB T_1ms_DP2 T_1ms_DP1 R_CalcB R_DP2 R_DP1 RTE

33 Thanks for Listening! Any Questions?

NEWS 2017 CONTENTS HYPERVISOR. Seamless debugging through all software layers. English Edition

NEWS 2017 CONTENTS HYPERVISOR. Seamless debugging through all software layers. English Edition NEWS 2017 English Edition APPLICATION GUEST OS HYPERVISOR HARDWARE Seamless debugging through all software layers CONTENTS Hypervisor Debugging Debug Tools for Intel x86/x64 CombiProbe for TriCore DAP

More information

SIMPLIFYING COMPLEX EMBEDDED DEVELOPMENT PROCESSES WITH MBEDDR

SIMPLIFYING COMPLEX EMBEDDED DEVELOPMENT PROCESSES WITH MBEDDR 29.10.2013 SIMPLIFYING COMPLEX EMBEDDED DEVELOPMENT PROCESSES WITH MBEDDR Stefan Schmierer Markus Völter, Bernd Kolb CONTEXT. WHAT IS MBEDDR? An extensible set of integrated languages for embedded so3ware

More information

This document describes support for OSEK operating system used with winidea.

This document describes support for OSEK operating system used with winidea. _ V1.2 TECHNICAL INFORMATION OSEK operating system Introduction This document describes support for OSEK operating system used with winidea. It assumes that: Hardware is configured properly, An OSEK builder

More information

User Trace Port Trace Port Emulation on Processors without on-chip Trace Hardware

User Trace Port Trace Port Emulation on Processors without on-chip Trace Hardware User Trace Port Trace Port Emulation on Processors without on-chip Trace Hardware How can I verify Functional/Timing Correctness on Processors without on-chip Trace? Armin Stingl, isystem AG 1 Introduction

More information

ETAS RTA-HVR Hypervisor & Multi RTA-OS Profiling

ETAS RTA-HVR Hypervisor & Multi RTA-OS Profiling ETAS RTA-HVR Hypervisor & Multi RTA-OS Profiling Publish Date: 02/01/2018 This document and all documents accompanying it are copyrighted by isystem and all rights are reserved. Duplication of these documents

More information

Predictable hardware: The AURIX Microcontroller Family

Predictable hardware: The AURIX Microcontroller Family Predictable hardware: The AURIX Microcontroller Family Worst-Case Execution Time Analysis WCET 2013, July 9, 2013, Paris, France Jens Harnisch (Jens.Harnisch@Infineon.com), Infineon Technologies AG, Automotive

More information

Dr. Andreas Both / Zhang Enqin Automotive Runtime Software

Dr. Andreas Both / Zhang Enqin Automotive Runtime Software Nov 6, 2008 Getting Started with Freescale's AUTOSAR OS and Microcontroller Abstraction Layer (MCAL) Software Packages PA110 Dr. Andreas Both / Zhang Enqin Automotive Runtime Software owners. Freescale

More information

Infineon DAP Active Probe

Infineon DAP Active Probe Infineon DAP Active Probe User Manual V1.4 This document and all documents accompanying it are copyrighted by isystem and all rights are reserved. Duplication of these documents is allowed for personal

More information

AUTOSAR Method. Webinar

AUTOSAR Method. Webinar AUTOSAR Method Webinar 2013-04-17 V2.1 2013-04-16 Agenda >Introduction AUTOSAR Method Exchange Formats Workflows OEM-TIER1 Workflows TIER1 Webinar Series Slide: 2 Introduction Current Workflow (non-autosar)

More information

AUTOSAR design flow. Yoon-Jin Kim Application Engineer. July mentor.com/automotive

AUTOSAR design flow. Yoon-Jin Kim Application Engineer. July mentor.com/automotive AUTOSAR design flow Yoon-Jin Kim Application Engineer July 2016 mentor.com/automotive Android is a trademark of Google Inc. Use of this trademark is subject to Google Permissions. Linux is the registered

More information

TRACE32 Training... Training AURIX... AURIX Trace Training... 1

TRACE32 Training... Training AURIX... AURIX Trace Training... 1 AURIX Trace Training TRACE32 Online Help TRACE32 Directory TRACE32 Index TRACE32 Training... Training AURIX... AURIX Trace Training... 1 Basic Knowledge... 6 Protocol Description 6 Source for the Recorded

More information

XDS560 Trace. Technology Showcase. Daniel Rinkes Texas Instruments

XDS560 Trace. Technology Showcase. Daniel Rinkes Texas Instruments XDS560 Trace Technology Showcase Daniel Rinkes Texas Instruments Agenda AET / XDS560 Trace Overview Interrupt Profiling Statistical Profiling Thread Aware Profiling Thread Aware Dynamic Call Graph Agenda

More information

SystemDesk - EB tresos Studio - TargetLink Workflow Descriptions

SystemDesk - EB tresos Studio - TargetLink Workflow Descriptions SystemDesk - EB tresos Studio - TargetLink Workflow Descriptions Usable with Versions: dspace SystemDesk 4.1 EB tresos Studio 13 or 14 TargetLink 3.4 or TargetLink 3.5 (with patches) February, 2014 1 /

More information

BlueBox On-Chip Analyzers

BlueBox On-Chip Analyzers BlueBox On-Chip Analyzers Enabling Safer Embedded Systems 2 BlueBox On-Chip Analyzers isystem Enabling Safer Embedded Systems Delivering high-quality embedded products to market is no easy task. Regardless

More information

An introduction to MTV

An introduction to MTV AP32401 An introduction to MTV About this document Scope and purpose This Application Note describes the basic usage of the MCDS (Multi-Core Debug Solution) Trace Viewer (MTV) tool. Non-intrusive, parallel

More information

Implementing AUTOSAR. Zhang Enqin Shanghai Automotive Lab. Aug 27-28, 2009

Implementing AUTOSAR. Zhang Enqin Shanghai Automotive Lab. Aug 27-28, 2009 Aug 27-28, 2009 Implementing AUTOSAR Zhang Enqin Shanghai Automotive Lab service names are the property of their respective owners. Freescale Semiconductor, Inc. 2009. Autosar Introduction Goals and motivation

More information

Support for RISC-V. Lauterbach GmbH. Bob Kupyn Lauterbach Markus Goehrle - Lauterbach GmbH

Support for RISC-V. Lauterbach GmbH. Bob Kupyn Lauterbach Markus Goehrle - Lauterbach GmbH Company Lauterbach Profile Debug Support for RISC-V Lauterbach GmbH Bob Kupyn Lauterbach USA @2016 Markus Goehrle - Lauterbach GmbH Leading Manufacturer of Microprocessor Development Tools Founded in 1979

More information

BlueBox IOM Accessories

BlueBox IOM Accessories BlueBox IOM Accessories Enabling Safer Embedded Systems 2 BlueBox On-Chip Analyzers isystem Enabling Safer Embedded Systems Delivering high-quality embedded products to market is no easy task. Regardless

More information

Handling Challenges of Multi-Core Technology in Automotive Software Engineering

Handling Challenges of Multi-Core Technology in Automotive Software Engineering Model Based Development Tools for Embedded Multi-Core Systems Handling Challenges of Multi-Core Technology in Automotive Software Engineering VECTOR INDIA CONFERENCE 2017 Timing-Architects Embedded Systems

More information

ARM HSSTP Active Probe

ARM HSSTP Active Probe ARM HSSTP Active Probe User Manual V1.6 This document and all documents accompanying it are copyrighted by isystem AG and all rights are reserved. Duplication of these documents is allowed for personal

More information

System Performance Optimization Methodology for Infineon's 32-Bit Automotive Microcontroller Architecture

System Performance Optimization Methodology for Infineon's 32-Bit Automotive Microcontroller Architecture System Performance Optimization Methodology for Infineon's 32-Bit Automotive Microcontroller Architecture Albrecht Mayer, Frank Hellwig Infineon Technologies, Am Campeon 1-12, 85579 Neubiberg, Germany

More information

OS Awareness Manual OSEK/ORTI

OS Awareness Manual OSEK/ORTI OS Awareness Manual OSEK/ORTI TRACE32 Online Help TRACE32 Directory TRACE32 Index TRACE32 Documents... OS Awareness Manuals... OS Awareness for OSEK/ORTI... OS Awareness Manual OSEK/ORTI... 1 History...

More information

TRACE32 Documents... ICD In-Circuit Debugger... Processor Architecture Manuals... TriCore... TriCore Monitor... 1

TRACE32 Documents... ICD In-Circuit Debugger... Processor Architecture Manuals... TriCore... TriCore Monitor... 1 TriCore Monitor TRACE32 Online Help TRACE32 Directory TRACE32 Index TRACE32 Documents... ICD In-Circuit Debugger... Processor Architecture Manuals... TriCore... TriCore Monitor... 1 Brief Overview of Documents

More information

AUTOBEST: A United AUTOSAR-OS And ARINC 653 Kernel. Alexander Züpke, Marc Bommert, Daniel Lohmann

AUTOBEST: A United AUTOSAR-OS And ARINC 653 Kernel. Alexander Züpke, Marc Bommert, Daniel Lohmann AUTOBEST: A United AUTOSAR-OS And ARINC 653 Kernel Alexander Züpke, Marc Bommert, Daniel Lohmann alexander.zuepke@hs-rm.de, marc.bommert@hs-rm.de, lohmann@cs.fau.de Motivation Automotive and Avionic industry

More information

Implementing debug. and trace access. through functional I/O. Alvin Yang Staff FAE. Arm Tech Symposia Arm Limited

Implementing debug. and trace access. through functional I/O. Alvin Yang Staff FAE. Arm Tech Symposia Arm Limited Implementing debug and trace access through functional I/O Alvin Yang Staff FAE Arm Tech Symposia 2017 Agenda Debug and trace access limitations A new approach Protocol based Bare metal vs mission mode

More information

BTF-Specification. Version History. Version Author Datum Description

BTF-Specification. Version History. Version Author Datum Description BTF-Specification Version History Version Author Datum Description V1.0 [Timing-Architects] 2011-07-18 Initial specification approved with thanks by Continental Automotive GmbH, extended by source-entity-instance

More information

RTA-OSEK. fåñáåéçå=qêá`çêé=ñ~ãáäó=ïáíü=íüé=q~ëâáåö=`çãéáäéê. cé~íìêéë=~í=~=dä~ååé. oq^jlpbh. `çãéáäéêl^ëëéãääéêliáåâéê.

RTA-OSEK. fåñáåéçå=qêá`çêé=ñ~ãáäó=ïáíü=íüé=q~ëâáåö=`çãéáäéê. cé~íìêéë=~í=~=dä~ååé. oq^jlpbh. `çãéáäéêl^ëëéãääéêliáåâéê. RTA-OSEK fåñáåéçå=qêá`çêé=ñ~ãáäó=ïáíü=íüé=q~ëâáåö=`çãéáäéê cé~íìêéë=~í=~=dä~ååé OSEK/VDX OS version 2.2 certified OS RTOS overhead: 28 bytes RAM, 192 bytes ROM Category 2 interrupt latency: 33 CPU cycles

More information

ID 025C: An Introduction to the OSEK Operating System

ID 025C: An Introduction to the OSEK Operating System ID 025C: An Introduction to the OSEK Operating System Version 1.0 1 James Dickie Product Manager for Embedded Software Real-time operating systems AUTOSAR software components Software logic analyzer Experience:

More information

Software integration challenge multi-core experience from real world projects

Software integration challenge multi-core experience from real world projects Software integration challenge multi-core experience from real world projects Rudolf Grave 17.06.2015 Agenda About EB Automotive Motivation Constraints for mapping functions to cores AUTOSAR & MultiCore

More information

Measurement Solution for new Radar Microcontroller V

Measurement Solution for new Radar Microcontroller V Measurement Solution for new Radar Microcontroller V1.01 2015-12-03 New Vehicle Architecture Technology Change E-Drive Cloud computing Autonomous driving Connectivity Security ECU less age Some ECU age

More information

Tools and Methods for Validation and Verification as requested by ISO26262

Tools and Methods for Validation and Verification as requested by ISO26262 Tools and for Validation and Verification as requested by ISO26262 Markus Gebhardt, Axel Kaske ETAS GmbH Markus.Gebhardt@etas.com Axel.Kaske@etas.com 1 Abstract The following article will have a look on

More information

Error Detection by Code Coverage Analysis without Instrumenting the Code

Error Detection by Code Coverage Analysis without Instrumenting the Code Error Detection by Code Coverage Analysis without Instrumenting the Code Erol Simsek, isystem AG Exhaustive testing to detect software errors constantly demands more time within development cycles. Software

More information

TASKING Embedded Profiler User Guide

TASKING Embedded Profiler User Guide TASKING Embedded Profiler User Guide MA160-857 (v1.0r3) November 20, 2018 Copyright 2018 TASKING BV. All rights reserved. You are permitted to print this document provided that (1) the use of such is for

More information

Timing and Timing Requirements in Automotive Systems

Timing and Timing Requirements in Automotive Systems Timing and Timing Requirements in Automotive Systems April, 25 th 2017 - Version 2 Peter Gliwa CEO GLIWA embedded systems GLIWA embedded systems Timing analysis and embedded software expertise since 2003

More information

Quick Reference Guide. For CodeWarrior Suites. freescale.com/codewarrior

Quick Reference Guide. For CodeWarrior Suites. freescale.com/codewarrior Quick Reference Guide For CodeWarrior Suites freescale.com/codewarrior ColdFire V2, V3 and V4 Linux Tools ColdFire V2, V3 and V4 Bare Board** 56800/E Digital Signal Controllers** S12(X) IDE Classic Classic

More information

esi-risc Development Suite Getting Started Guide

esi-risc Development Suite Getting Started Guide 1 Contents 1 Contents 2 2 Overview 3 3 Starting the Integrated Development Environment 4 4 Hello World Tutorial 5 5 Next Steps 8 6 Support 10 Version 2.5 2 of 10 2011 EnSilica Ltd, All Rights Reserved

More information

OS timing hooks. Generic trace interface. Specification Version 1.4

OS timing hooks. Generic trace interface. Specification Version 1.4 OS timing hooks Generic trace interface Specification Version 1.4 2 3 GLIWA GmbH embedded systems Pollingerstr. 1 82362 Weilheim i.ob. GERMANY fon +49-881 - 13 85 22-0 fax +49-881 - 13 85 22-99 info@gliwa.com

More information

Guido Sandmann MathWorks GmbH. Michael Seibt Mentor Graphics GmbH ABSTRACT INTRODUCTION - WORKFLOW OVERVIEW

Guido Sandmann MathWorks GmbH. Michael Seibt Mentor Graphics GmbH ABSTRACT INTRODUCTION - WORKFLOW OVERVIEW 2012-01-0962 AUTOSAR-Compliant Development Workflows: From Architecture to Implementation Tool Interoperability for Round-Trip Engineering and Verification & Validation Copyright 2012 The MathWorks, Inc.

More information

XDS560 Trace. Advanced Use Cases for Profiling. Daniel Rinkes Texas Instruments

XDS560 Trace. Advanced Use Cases for Profiling. Daniel Rinkes Texas Instruments XDS560 Trace Advanced Use Cases for Profiling Daniel Rinkes Texas Instruments Agenda AET / XDS560Trace Overview Interrupt Profiling Statistical Profiling Thread Aware Profiling Thread Aware Dynamic Call

More information

April 4, 2001: Debugging Your C24x DSP Design Using Code Composer Studio Real-Time Monitor

April 4, 2001: Debugging Your C24x DSP Design Using Code Composer Studio Real-Time Monitor 1 This presentation was part of TI s Monthly TMS320 DSP Technology Webcast Series April 4, 2001: Debugging Your C24x DSP Design Using Code Composer Studio Real-Time Monitor To view this 1-hour 1 webcast

More information

_ V Renesas R8C In-Circuit Emulation. Contents. Technical Notes

_ V Renesas R8C In-Circuit Emulation. Contents. Technical Notes _ V9.12. 225 Technical Notes Renesas R8C In-Circuit Emulation This document is intended to be used together with the CPU reference manual provided by the silicon vendor. This document assumes knowledge

More information

TRACE32 Getting Started... ICD In-Circuit Debugger Getting Started... ICD Introduction... 1

TRACE32 Getting Started... ICD In-Circuit Debugger Getting Started... ICD Introduction... 1 ICD Introduction TRACE32 Online Help TRACE32 Directory TRACE32 Index TRACE32 Getting Started... ICD In-Circuit Debugger Getting Started... ICD Introduction... 1 Introduction... 2 What is an In-Circuit

More information

RTA-OSEK Infineon TriCore with the Green Hills Software Compiler

RTA-OSEK Infineon TriCore with the Green Hills Software Compiler RTA-OSEK Infineon TriCore with the Green Hills Software Compiler Features at a Glance OSEK/VDX OS v2.2 Certified OS RTOS overhead: 30 bytes RAM, 150 bytes ROM Category 2 interrupt latency: 29 CPU cycles

More information

Achieving Predictable Multicore Execution of Automotive Applications Using the LET Paradigm

Achieving Predictable Multicore Execution of Automotive Applications Using the LET Paradigm Achieving Predictable Multicore Execution of Automotive Applications Using the LET Paradigm Alessandro Biondi and Marco Di Natale Scuola Superiore Sant Anna, Pisa, Italy Introduction The introduction of

More information

)8-,768'HY.LW 2YHUYLHZ. )XMLWVX0LNURHOHNWURQLN*PE+ Am Siebenstein Dreieich-Buchschlag, Germany

)8-,768'HY.LW 2YHUYLHZ. )XMLWVX0LNURHOHNWURQLN*PE+ Am Siebenstein Dreieich-Buchschlag, Germany )8-,768'HY.LW 2YHUYLHZ )XMLWVX0LNURHOHNWURQLN*PE+ Am Siebenstein 6-10 63303 Dreieich-Buchschlag, Germany Revision: V1.0 Date: 05.08.1999 Introduction to FUJITSU Development Kit for 16LX CPU family DevKit16

More information

IAR C-SPY Hardware Debugger Systems User Guide

IAR C-SPY Hardware Debugger Systems User Guide IAR C-SPY Hardware Debugger Systems User Guide for the Renesas SH Microcomputer Family CSSHHW-1 COPYRIGHT NOTICE Copyright 2010 IAR Systems AB. No part of this document may be reproduced without the prior

More information

All information, including contact information, is available on our web site Feel free also to explore our alternative products.

All information, including contact information, is available on our web site  Feel free also to explore our alternative products. _ V2.9 Hardware Reference ic6000 On-Chip Analyzer with Aurora protocol support Thank you for purchasing this product from isystem. This product has been carefully crafted to satisfy your needs. Should

More information

Current and Prospective High-speed Measurement Systems

Current and Prospective High-speed Measurement Systems Current and Prospective High-speed Measurement Systems Vector Congress 2010, Stuttgart V0.01 2010-11-29 Agenda > Definition: Measurement and Calibration Hardware Customer Requirements Vector Product Strategy

More information

Porting applications over the various conformance classes of Erika Enterprise

Porting applications over the various conformance classes of Erika Enterprise Porting applications over the various conformance classes of Erika Enterprise Quick guide version: 1.0.1 December 11, 2012 About Evidence S.r.l. Evidence is a spin-off company of the ReTiS Lab of the Scuola

More information

AMDC 2017 Liviona Multi-Core in Automotive Powertrain and Next Steps Towards Parallelization

AMDC 2017 Liviona Multi-Core in Automotive Powertrain and Next Steps Towards Parallelization Bitte decken Sie die schraffierte Fläche mit einem Bild ab. Please cover the shaded area with a picture. (24,4 x 11,0 cm) AMDC 2017 Liviona Multi-Core in Automotive Powertrain and Ralph Mader, 25. April

More information

10 th AUTOSAR Open Conference

10 th AUTOSAR Open Conference 10 th AUTOSAR Open Conference Dr. Moritz Neukirchner Elektrobit Automotive GmbH Building Performance ECUs with Adaptive AUTOSAR AUTOSAR Nov-2017 Major market trends and their impact Trends Impact on E/E

More information

Evaluation board for NXP LPC2103. User Guide. Preliminary Version updated 27 th Aug TechToys Company All Rights Reserved

Evaluation board for NXP LPC2103. User Guide. Preliminary Version updated 27 th Aug TechToys Company All Rights Reserved Evaluation board for NXP LPC2103 User Guide 1 SOFTWARE Download from KEIL web site at http://www.keil.com/demo/ for ARM evaluation software. Limitations to this evaluation copy have been summarized on

More information

Software Design Challenges for heterogenic SOC's

Software Design Challenges for heterogenic SOC's Software Design Challenges for heterogenic SOC's René Janssen, Product manager Logic Technology 1 Agenda 1. Advantages of heterogenous devices 2. How to manage inter-processor communication 3. Example

More information

Real and Virtual Development with SystemDesk

Real and Virtual Development with SystemDesk Real and Virtual Development with SystemDesk Joe Fairchild Project Manager Software Development and Validation dspace, Inc. Goals of AUTOSAR Create libraries of software components Reusable Hardware-independent

More information

NIOS II Instantiating the Off-chip Trace Logic

NIOS II Instantiating the Off-chip Trace Logic NIOS II Instantiating the Off-chip Trace Logic TRACE32 Online Help TRACE32 Directory TRACE32 Index TRACE32 Documents... ICD In-Circuit Debugger... Processor Architecture Manuals... NIOS... NIOS II Application

More information

The Challenges of System Design. Raising Performance and Reducing Power Consumption

The Challenges of System Design. Raising Performance and Reducing Power Consumption The Challenges of System Design Raising Performance and Reducing Power Consumption 1 Agenda The key challenges Visibility for software optimisation Efficiency for improved PPA 2 Product Challenge - Software

More information

TRACE32 Glossary Terms, Abbreviations, and Definitions... 2

TRACE32 Glossary Terms, Abbreviations, and Definitions... 2 TRACE32 Glossary TRACE32 Online Help TRACE32 Directory TRACE32 Index TRACE32 Glossary... 1 Terms, Abbreviations, and Definitions... 2 Terms with Explanations and Examples... 4 Access Classes 4 Build Path

More information

Benefits of Collecting Code Coverage Metrics during HIL/ECU Testing

Benefits of Collecting Code Coverage Metrics during HIL/ECU Testing Benefits of Collecting Code Coverage Metrics during HIL/ECU Testing Jeffrey Fortin Product Manager VectorCAST V0.1 2018-10-30 Agenda 1. How VectorCAST fits into HIL/ECU Testing 2. Demo 3. Questions and

More information

Chapter. Overview. Tornado BSP Training Workshop Copyright Wind River Systems 1-1 Wind River Systems

Chapter. Overview. Tornado BSP Training Workshop Copyright Wind River Systems 1-1 Wind River Systems Chapter 1 Overview Tornado BSP Training Workshop Copyright 1-1 Overview 1.1 Integration Issues VxWorks Boot Sequence Tornado Directory Structure Conventions and Validation Tornado BSP Training Workshop

More information

1. Introduction Document organization and format Technical support Software Installation...3

1. Introduction Document organization and format Technical support Software Installation...3 CONTENTS 1. Introduction...2 1.1 Document organization and format...2 1.2 Technical support...2 2 Software Installation...3 2.1 Installation Instructions...3 3 Getting started...3 3.1 OSEK / VDX control

More information

RTA-OSEK Texas Instruments TMS570 with the TI Compiler

RTA-OSEK Texas Instruments TMS570 with the TI Compiler RTA-OSEK Texas Instruments TMS570 with the TI Compiler Features at a Glance OSEK/VDX OS v2.2 Certified OS RTOS overhead: 28 bytes RAM, 176 bytes ROM Category 2 interrupt latency: 214 CPU cycles Applications

More information

Release Notes for Device Access Server (DAS)

Release Notes for Device Access Server (DAS) Release Notes for Device Access Server (DAS) 2018-03-27 Hints: 1. Upgrading DAS: If you upgrade from an older DAS version, please check your setup with the old version directly before the installation

More information

Nexus Instrumentation architectures and the new Debug Specification

Nexus Instrumentation architectures and the new Debug Specification Nexus 5001 - Instrumentation architectures and the new Debug Specification Neal Stollon, HDL Dynamics Chairman, Nexus 5001 Forum neals@hdldynamics.com nstollon@nexus5001.org HDL Dynamics SoC Solutions

More information

Multi-core microcontroller design with Cortex-M processors and CoreSight SoC

Multi-core microcontroller design with Cortex-M processors and CoreSight SoC Multi-core microcontroller design with Cortex-M processors and CoreSight SoC Joseph Yiu, ARM Ian Johnson, ARM January 2013 Abstract: While the majority of Cortex -M processor-based microcontrollers are

More information

UAD2 + Universal Access Device2 plus

UAD2 + Universal Access Device2 plus UAD2 + Universal Access Device2 plus The access to the whole choice of C166, XC166, XC2000, XE166, C166CBC, C166S V2, TriCore, PowerPC, ST30, STR7, ARM7, ARM9, ARM11, XScale, SH-2A derivatives is supported

More information

RTA-OSEK Texas Instruments TMS470R1x with the TI Compiler

RTA-OSEK Texas Instruments TMS470R1x with the TI Compiler RTA-OSEK Texas Instruments TMS470R1x with the TI Compiler Features at a Glance OSEK/VDX OS v2.2 Certified OS RTOS overhead: 30 bytes RAM, 144 bytes ROM Category 2 interrupt latency: 87 CPU cycles Applications

More information

System Level Instrumentation using the Nexus specification

System Level Instrumentation using the Nexus specification System Level Instrumentation using the Nexus 5001-2012 specification Neal Stollon, HDL Dynamics Chairman, IEEE 5001 Nexus Forum neals@hdldynamics.com nstollon@nexus5001.org HDL Dynamics SoC Solutions System

More information

Coping with Immutable Data in a JVM for Embedded Real-Time Systems. Christoph Erhardt, Simon Kuhnle, Isabella Stilkerich, Wolfgang Schröder-Preikschat

Coping with Immutable Data in a JVM for Embedded Real-Time Systems. Christoph Erhardt, Simon Kuhnle, Isabella Stilkerich, Wolfgang Schröder-Preikschat The final Frontier Coping with Immutable Data in a JVM for Embedded Real-Time Systems Christoph Erhardt, Simon Kuhnle, Isabella Stilkerich, Wolfgang Schröder-Preikschat https://www4.cs.fau.de/research/keso/

More information

_ V NEC V850ES/Fx3 Family In-Circuit Emulation. Contents. Technical Notes

_ V NEC V850ES/Fx3 Family In-Circuit Emulation. Contents. Technical Notes _ V9.12. 225 Technical Notes NEC V850ES/Fx3 Family In-Circuit Emulation This document is intended to be used together with the CPU reference manual provided by the silicon vendor. This document assumes

More information

Product Information Embedded Operating Systems

Product Information Embedded Operating Systems Product Information Embedded Operating Systems Table of Contents 1 Operating Systems for ECUs... 3 2 MICROSAR.OS The Real-Time Operating System for the AUTOSAR Standard... 3 2.1 Overview of Advantages...

More information

Wireless M-Bus Suite for Panasonic Evaluation Boards. Quick Start Guide

Wireless M-Bus Suite for Panasonic Evaluation Boards. Quick Start Guide Wireless M-Bus Suite for Panasonic Evaluation Boards January 16, 2012 page 2 Document History 1.0 2011-07-20 First release dj 1.1 2011-07-25 Review dj 1.2 2011-07-27 Quick start changed dj 1.3 2011-09-13

More information

IAR Embedded Workbench for 8051 Version 7.30A

IAR Embedded Workbench for 8051 Version 7.30A IAR Embedded Workbench for 8051 Version 7.30A 1 Highlights in version 7.30 More efficient banked memory model Support files for many new devices added - complete list at www.iar.com/ew8051 Supportfiles

More information

EMUL-PPC-PC. Getting Started Guide. Version 1.0

EMUL-PPC-PC. Getting Started Guide. Version 1.0 EMUL-PPC-PC Getting Started Guide Version 1.0 EMUL PowerPC Getting Started Guide Edition1 ICE Technology. All rights reserved worldwide. Contents Warranty Information European CE Requirements User Responsibility

More information

Scalable and Flexible Software Platforms for High-Performance ECUs. Christoph Dietachmayr Sr. Engineering Manager, Elektrobit November 8, 2018

Scalable and Flexible Software Platforms for High-Performance ECUs. Christoph Dietachmayr Sr. Engineering Manager, Elektrobit November 8, 2018 Scalable and Flexible Software Platforms for High-Performance ECUs Christoph Dietachmayr Sr. Engineering Manager, November 8, Agenda A New E/E Architectures and High-Performance ECUs B Non-Functional Aspects:

More information

All information, including contact information, is available on our web site Feel free also to explore our alternative products.

All information, including contact information, is available on our web site  Feel free also to explore our alternative products. _ V1.7 Hardware Reference ic5000 On-Chip Analyzer Thank you for purchasing this product from isystem. This product has been carefully crafted to satisfy your needs. Should any questions arise, do not hesitate

More information

AUTOSAR - Challenges and Solutions from a Software Vendor s Perspective

AUTOSAR - Challenges and Solutions from a Software Vendor s Perspective AUTOSAR - Challenges and Solutions from a Software Vendor s Perspective Thomas M. Galla and Roman Pallierer Elektrobit Austria GmbH Kaiserstrasse 45/2 A-1070 Vienna, Austria E-mail: {thomas.galla, roman.pallierer}@elektrobit.com

More information

High-Performance 32-bit

High-Performance 32-bit High-Performance 32-bit Microcontroller with Built-in 11-Channel Serial Interface and Two High-Speed A/D Converter Units A 32-bit microcontroller optimal for digital home appliances that integrates various

More information

TRACE32. Product Overview

TRACE32. Product Overview TRACE32 Product Overview Preprocessor Product Portfolio Lauterbach is the world s leading manufacturer of complete, modular microprocessor development tools with 35 years experience in the field of embedded

More information

ASCET V6.3 AUTOSAR User s Guide

ASCET V6.3 AUTOSAR User s Guide ASCET V6.3 AUTOSAR User s Guide Copyright The data in this document may not be altered or amended without special notification from ETAS GmbH. ETAS GmbH undertakes no further obligation in relation to

More information

Debugging code snippets in IDA Pro 5.6 using QEMU emulator Copyright 2010 Hex-Rays SA

Debugging code snippets in IDA Pro 5.6 using QEMU emulator Copyright 2010 Hex-Rays SA Debugging code snippets in IDA Pro 5.6 using QEMU emulator Copyright 2010 Hex-Rays SA Introduction IDA Pro 5.6 has a new feature: automatic running of the QEMU emulator. It can be used to debug small code

More information

Fredrick M. Cady. Assembly and С Programming forthefreescalehcs12 Microcontroller. шт.

Fredrick M. Cady. Assembly and С Programming forthefreescalehcs12 Microcontroller. шт. SECOND шт. Assembly and С Programming forthefreescalehcs12 Microcontroller Fredrick M. Cady Department of Electrical and Computer Engineering Montana State University New York Oxford Oxford University

More information

Course Syllabus [1/2]

Course Syllabus [1/2] Course Syllabus [1/2] Instructor 逄愛君, acpang@csie.ntu.edu.tw Office Number: 417, Office Hour: 15:00~17:00 (Thursday) Textbook Assembly Language for Intel-Based Computers, Kip R. Irvine, Pearson Education,

More information

Application Note: AN00152 xscope - Bi-Directional Endpoint

Application Note: AN00152 xscope - Bi-Directional Endpoint Application Note: AN00152 xscope - Bi-Directional Endpoint This application note shows how to create a simple example which uses the XMOS xscope application trace system to provide bi-directional communication

More information

The board contains the connector for SWD bus to implement SWD method of programming. Fig. K190 VDD 2 GND 4

The board contains the connector for SWD bus to implement SWD method of programming. Fig. K190 VDD 2 GND 4 3. Programming Once the machine code containing the user program is prepared on a personal computer, the user must load the code into the memory of the processor. Several methods for loading are available.

More information

FPGA Adaptive Software Debug and Performance Analysis

FPGA Adaptive Software Debug and Performance Analysis white paper Intel Adaptive Software Debug and Performance Analysis Authors Javier Orensanz Director of Product Management, System Design Division ARM Stefano Zammattio Product Manager Intel Corporation

More information

Getting Started with STK200 Dragon

Getting Started with STK200 Dragon Getting Started with STK200 Dragon Introduction This guide is designed to get you up and running with main software and hardware. As you work through it, there could be lots of details you do not understand,

More information

RTA-RTE V6.7.1 Toolchain Integration Guide

RTA-RTE V6.7.1 Toolchain Integration Guide Copyright The data in this document may not be altered or amended without special notification from ETAS GmbH. ETAS GmbH undertakes no further obligation in relation to this document. The software described

More information

A Model-based Approach for Conditioning Software to Multi-Core using AUTOSAR

A Model-based Approach for Conditioning Software to Multi-Core using AUTOSAR Model Based Development Tools for Embedded Multi-Core Systems A Model-based Approach for Conditioning Software to Multi-Core using AUTOSAR 9 th AUTOSAR Open Conference in Gothenburg Timing-Architects Embedded

More information

Choosing a Micro for an Embedded System Application

Choosing a Micro for an Embedded System Application Choosing a Micro for an Embedded System Application Dr. Manuel Jiménez DSP Slides: Luis Francisco UPRM - Spring 2010 Outline MCU Vs. CPU Vs. DSP Selection Factors Embedded Peripherals Sample Architectures

More information

XMC4800 EtherCAT APP SSC Firmware Update Slave Example. Getting Started Version 3.0

XMC4800 EtherCAT APP SSC Firmware Update Slave Example. Getting Started Version 3.0 XMC4800 EtherCAT APP SSC Firmware Update Slave Example Getting Started Version 3.0 1 2 3 4 5 6 7 Overview and requirements Setup Short overview boot modes Architecture Implementation of the application

More information

Installation and Quick Start of isystem s winidea Open in DAVE. Tutorial Version 1.0, May, 2014

Installation and Quick Start of isystem s winidea Open in DAVE. Tutorial Version 1.0, May, 2014 Installation and Quick Start of isystem s winidea Open in DAVE Tutorial Version.0, May, 0 About winidea Open isysytem provides a free version of its debugger IDE called winidea Open; it can use the Segger

More information

WS_CCESBF7-OUT-v1.00.doc Page 1 of 8

WS_CCESBF7-OUT-v1.00.doc Page 1 of 8 Course Name: Course Code: Course Description: System Development with CrossCore Embedded Studio (CCES) and the ADSP-BF70x Blackfin Processor Family WS_CCESBF7 This is a practical and interactive course

More information

Palm Platform Hardware Intro to the Palm OS and application programming

Palm Platform Hardware Intro to the Palm OS and application programming Palm Platform Hardware Intro to the Palm OS and application programming Total memory (RAM/ROM) originals had only 128 Kb currently average is 4 Mb (max. 8Mb) 32 bit addresses 8, 16 & 32 bit data types

More information

RTA-OSEK Renesas SH2A with the WindRiver Compiler

RTA-OSEK Renesas SH2A with the WindRiver Compiler RTA-OSEK Renesas SH2A with the WindRiver Compiler Features at a Glance OSEK/VDX OS v2.2 Certified OS RTOS overhead: 30 bytes RAM, 150 bytes ROM Category 2 interrupt latency: 83 CPU cycles Applications

More information

SPACE: SystemC Partitioning of Architectures for Co-design of real-time Embedded systems

SPACE: SystemC Partitioning of Architectures for Co-design of real-time Embedded systems September 29, 2004 SPACE: Partitioning of Architectures for Co-design of real-time Embedded systems Jérome Chevalier 1, Maxime De Nanclas 1, Guy Bois 1 and Mostapha Aboulhamid 2 1. École Polytechnique

More information

Model Based Development of Embedded Control Software

Model Based Development of Embedded Control Software Model Based Development of Embedded Control Software Part 5: Portable TDL Run-time System Claudiu Farcas Credits: MoDECS Project Team, Giotto Department of Computer Science cs.uni-salzburg.at Contents

More information

Functional Safety on Multicore Microcontrollers for Industrial Applications

Functional Safety on Multicore Microcontrollers for Industrial Applications Functional Safety on Multicore Microcontrollers for Industrial Applications Thomas Barth Department of Electrical Engineering Hochschule Darmstadt University of Applied Sciences Darmstadt, Germany thomas.barth@h-da.de

More information

Converting Firmware Projects to CoIde and IAR Embedded Workbench for ARM

Converting Firmware Projects to CoIde and IAR Embedded Workbench for ARM APPLICATION NOTE Converting Firmware Projects to CoIde and IAR Embedded Workbench for ARM TM Marc Sousa Senior Manager, Systems and Firmware www.active-semi.com Copyright 2015 Active-Semi, Inc. TABLE OF

More information

Implementation of Automotive Unified Diagnostic Services Based on AUTOSAR. Yue-yin XIE, Chao ZHOU and Feng LUO

Implementation of Automotive Unified Diagnostic Services Based on AUTOSAR. Yue-yin XIE, Chao ZHOU and Feng LUO 2017 2nd International Conference on Information Technology and Management Engineering (ITME 2017) ISBN: 978-1-60595-415-8 Implementation of Automotive Unified Diagnostic Services Based on AUTOSAR Yue-yin

More information

A Multi-Core Basic Software as Key Enabler of Application Software Distribution

A Multi-Core Basic Software as Key Enabler of Application Software Distribution A Multi-Core Basic Software as Key Enabler of Application Software Distribution André Göbel Continental Automotive GmbH, P.O. Box 100943 D-93009 Regensburg Germany Email: andre.goebel@continental-corporation.com

More information