Chapter 1. and Technology

Transcription

1 Chapter 1 Computer Abstractions Computer Abstractions and Technology

2 The Computer Revolution Progress in computer technology Underpinned by Moore s Law Makes novel applications feasible Computers in automobiles Cell phones Human genome project World Wide Web Search Engines Computers are pervasive 1.1 Int roduction Chapter 1 Computer Abstractions and Technology 2

3 Classes of Computers Desktop computers General purpose, variety of software Subject to cost/performance tradeoff Server computers Network based High capacity, performance, reliability Range from small servers to building sized Embedded computers Hidden as components of systems Stringent power/performance/cost constraints Chapter 1 Computer Abstractions and Technology 3

4 The Processor Market Chapter 1 Computer Abstractions and Technology 4

5 What You Will Learn How programs are translated into the machine language And how the hardware executes them The hardware/software interface What determines program performance And how it can be improved How hardware designers improve performance What is parallel processing Chapter 1 Computer Abstractions and Technology 5

6 Understanding Performance Algorithm Determines number of operations executed Programming language, compiler, architecture Determine number of machine instructions executed per operation Processor and memory system Determine how fast instructions are executed I/O system (including OS) Determines how fast I/O operations are executed Chapter 1 Computer Abstractions and Technology 6

7 Below Your Program Application software Written in high-level language System software Compiler: translates HLL code to machine code Operating System: service code Handling input/output Managing memory and storage Scheduling tasks & sharing resources Hardware Processor, memory, I/O controllers 1.2 Be elow Your Program Chapter 1 Computer Abstractions and Technology 7

8 Levels of Program Code High-level language Level of abstraction ti closer to problem domain Provides for productivity and portability Assembly language g Textual representation of instructions Hardware representation Binary digits (bits) Encoded instructions and data Chapter 1 Computer Abstractions and Technology 8

9 Components of a Computer The BIG Picture Same components for all kinds of computer Desktop, server, embedded d Input/output includes User-interface devices Display, keyboard, mouse Storage devices Hard disk, CD/DVD, flash Network adapters For communicating with other computers 1.3 Un nder the Covers Chapter 1 Computer Abstractions and Technology 9

10 Anatomy of a Computer Output device Network cable Input device Input device Chapter 1 Computer Abstractions and Technology 10

11 Anatomy of a Mouse Optical mouse LED illuminates desktop Small low-res camera Basic image processor Looks for x, y movement Buttons & wheel Supersedes roller-ball mechanical mouse Chapter 1 Computer Abstractions and Technology 11

12 Through the Looking Glass LCD screen: picture elements (pixels) Mirrors content of frame buffer memory Chapter 1 Computer Abstractions and Technology 12

13 Opening the Box Chapter 1 Computer Abstractions and Technology 13

14 Processor Architecture As programmers, we use the instruction set architecture (ISA) as a useful abstraction to understand the processor s internal details. Chapter 1 Computer Abstractions and Technology 14

15 How Do the Pieces Fit Together? Application Operating System Memory system Compiler Firmware Instr. Set Proc. I/O system Datapath th & Control Digital Design Circuit Design Instruction Set Architecture t Coordination of many levels of abstraction Under a rapidly changing set of forces Design, measurement, and evaluation Chapter 1 Computer Abstractions and Technology 15

16 CISC vs. RISC CISC emphasizes hardware complexity. RISC emphasizes compiler complexity Chapter 1 Computer Abstractions and Technology 16

17 CISC A microprogram is a small run-time interpreter that takes the complex instruction and generates a sequence of simple instructions that can be executed by the hardware. Chapter 1 Computer Abstractions and Technology 17

18 RISC RISC systems s use only simple instructions. RISC systems stems assume that the required operands are in the processor s internal registers, not in the main memory. RISC designs, on the other hand, eliminate the microprogram layer and use the hardware to directly execute instructions. Chapter 1 Computer Abstractions and Technology 18

19 1.1 The RISC design philosophy The RISC philosophy is implemented with four major design rules: 1. Instructions RISC processors have a reduced number of instruction classes. 2. Pipelines The processing of instructions is broken down into smaller units that can be executed in parallel by pipelines. 3. Registers RISC machines have a large general-purpose register set. 4. Load-store architecture The processor operates on data held in registers. Separate load and store instructions transfer data between the register bank and external memory. Chapter 1 Computer Abstractions and Technology 19

20 (vonneumann) Processor Organization Control needs to 1. input instructions from Memory CPU Memory Devices 2. issue signals to control the information flow between the Datapath components and to control what operations they perform 3. control instruction sequencing Control Datapath Fetch Input Output Datapath needs to have the Exec components the functional units and storage (e.g., register file) needed to execute instructions Decode interconnects - components connected so that the instructions can be accomplished and so that data can be loaded from and stored to Memory Chapter 1 Computer Abstractions and Technology 20

21 Inside the Processor (CPU) Datapath: performs operations on data Control: sequences datapath, memory,... Cache memory Small fast SRAM memory for immediate access to data Chapter 1 Computer Abstractions and Technology 21

22 Inside the Processor AMD Barcelona: 4 processor cores Chapter 1 Computer Abstractions and Technology 22

23 Abstractions The BIG Picture Abstraction helps us deal with complexity Hide lower-level detail Instruction set architecture (ISA) The hardware/software interface Application binary interface The ISA plus system software interface Implementation The details underlying and interface Chapter 1 Computer Abstractions and Technology 23

24 A Safe Place for Data Volatile main memory Loses instructions and data when power off Non-volatile secondary memory Magnetic disk Flash memory Optical disk (CDROM, DVD) Chapter 1 Computer Abstractions and Technology 24

25 Networks Communication and resource sharing Local area network (LAN): Ethernet Within a building Wide area network (WAN: the Internet Wireless network: WiFi, Bluetooth Chapter 1 Computer Abstractions and Technology 25

26 Technology Trends Electronics technology continues to evolve Increased capacity and performance Reduced d cost DRAM capacity Year Technology Relative performance/cost 1951 Vacuum tube Transistor Integrated circuit (IC) Very large scale IC (VLSI) 2,400, Ultra large scale IC 6,200,000, Chapter 1 Computer Abstractions and Technology 26

27 DRAM Capacity Growth Chapter 1 Computer Abstractions and Technology 27

28 Processor Performance Increase Int) Perfo ormance (SPEC DEC Alpha 4/266 DEC AXP/500 DEC Alpha 21264A/667 DEC Alpha 21264/600 HP 9000/750 IBM RS6000 MIPS M2000 SUN-4/260 MIPS M/120 IBM POWER 100 DEC Alpha 5/500 DEC Alpha 5/300 Intel Pentium 4/3000 Intel Xeon/ Year Chapter 1 Computer Abstractions and Technology 28

29 Impacts of Advancing Technology Processor logic capacity: increases about 30% per year performance: 2x every 1.5 years Memory DRAM capacity: 4x every 3 years, now 2x every 2 years memory speed: 1.5x every 10 years cost per bit: decreases about 25% per year Disk capacity: increases about 60% per year Chapter 1 Computer Abstractions and Technology 29

30 Defining Performance Which airplane has the best performance? Boeing 777 Boeing Pe erformanc ce Boeing 747 BAC/Sud Concorde Douglas DC-8-50 Boeing 747 BAC/Sud Concorde Douglas DC Passenger Capacity Cruising Range (miles) Boeing 777 Boeing 777 Boeing 747 BAC/Sud Concorde Douglas DC-8-50 Boeing 747 BAC/Sud Concorde Douglas DC Cruising Speed (mph) Passengers x mph Chapter 1 Computer Abstractions and Technology 30

31 Response Time and Throughput Response time How long it takes to do a task Throughput Total work done per unit time e.g., tasks/transactions/ per hour How are response time and throughput affected by Replacing the processor with a faster version? Adding more processors? We ll focus on response time for now Chapter 1 Computer Abstractions and Technology 31

32 Relative Performance Define Performance = 1/Execution Time X is n time faster than Y Performance Performance X Y = Execution time Y Execution time X = n Example: time taken to run a program 10s on A, 15s on B Execution Time B / Execution Time A = 15s / 10s = 1.5 So A is 1.5 times faster than B Chapter 1 Computer Abstractions and Technology 32

33 Measuring Execution Time Elapsed time Total response time, including all aspects Processing, I/O, OS overhead, idle time Determines system performance CPU time Time spent processing a given job Discounts I/O time, other jobs shares Comprises user CPU time and system CPU time Different programs are affected differently by CPU and system performance Chapter 1 Computer Abstractions and Technology 33

34 CPU Clocking Operation of digital hardware governed by a constant-rate t t clock Clock period Clock (cycles) Data transfer and computation Update state Clock period: duration of a clock cycle e.g., 250ps = 0.25ns = s Clock frequency (rate): cycles per second e.g., 4.0GHz = 4000MHz = Hz Chapter 1 Computer Abstractions and Technology 34

35 CPU Time CPU Time = CPU Clock Cycles Clock Cycle Time = CPU Clock Cycles Clock Rate Performance improved by Reducing number of clock cycles Increasing clock rate Hardware designer must often trade off clock rate against cycle count Chapter 1 Computer Abstractions and Technology 35

36 CPU Time Example Computer A: 2GHz clock, 10s CPU time Designing i Computer B Aim for 6s CPU time Can do faster clock, but causes 1.2 clock cycles How fast must Computer B clock be? Clock Rate Clock Cycles B A = = Clock Cycles CPU Time CPU Time A B B Clock Cycles = 6s Clock Rate A A = 10s 2GHz = Clock Rate s s 9 9 B = = = 4GHz Chapter 1 Computer Abstractions and Technology 36

37 Instruction Count and CPI Clock Cycles = Instruction Count Cycles per Instruction CPU Time = Instruction Count CPI Clock Cycle Time = Instructio n Count Clock Rate CPI Instruction Count for a program Determined by program, ISA and compiler Average cycles per instruction Determined by CPU hardware If different instructions have different CPI Average CPI affected by instruction mix Chapter 1 Computer Abstractions and Technology 37

38 CPI Example Computer A: Cycle Time = 250ps, CPI = 2.0 Computer B: Cycle Time = 500ps, CPI = 1.2 Same ISA Which is faster, and by how much? CPU Time = Instruction Count CPI Cycle Time A A A = I ps = I 500ps CPU Time B CPU Time B CPU Time A = Instruction Count CPI B = I ps = I 600ps I 600ps I 500ps = 1.2 Cycle Time B A is faster = by this much Chapter 1 Computer Abstractions and Technology 38

39 CPI in More Detail If different instruction classes take different numbers of cycles Clock Cycles = n i= 1 (CPIi Instruction Counti) Weighted average CPI CPI = Clock Cycles Instruction Count = n i CPIi i = 1 Instruction Count Instruction Count Relative frequency Chapter 1 Computer Abstractions and Technology 39

40 CPI Example Alternative compiled code sequences using instructions in classes A, B, C Class Cass A B C CPI for class IC in sequence IC in sequence Sequence 1: IC = 5 Sequence 2: IC = 6 Clock Cycles Clock Cycles = = = 10 = 9 Avg. CPI = 10/5 = 2.0 Avg. CPI = 9/6 = 1.5 Chapter 1 Computer Abstractions and Technology 40

41 Performance Summary The BIG Picture Instructions Clock cycles CPU Time = Program Instruction Seconds Clock cycle Performance depends on Algorithm: affects IC, possibly CPI Programming language: affects IC, CPI Compiler: affects IC, CPI Instruction set architecture: affects IC, CPI, T c Chapter 1 Computer Abstractions and Technology 41

42 Power Trends 1.5 The Power Wall In CMOS IC technology Power = Capacitive load Voltage 2 Frequency 30 5V 1V 1000 Chapter 1 Computer Abstractions and Technology 42

43 Reducing Power Suppose a new CPU has 85% of capacitive load of old CPU 15% voltage and 15% frequency reduction Pnew 4 = Pold old old old 2 Cold 0.85 (Vold 0.85) Fold 0.85 = = C V F The power wall We can t reduce voltage further We can t remove more heat How else can we improve performance? Chapter 1 Computer Abstractions and Technology 43

44 Uniprocessor Performance 1.6 The Sea Change: The Switch to Multiprocessors Constrained by yp power, instruction-level parallelism, memory latency Chapter 1 Computer Abstractions and Technology 44

45 Multiprocessors Multicore microprocessors More than one processor per chip Requires explicitly parallel programming Compare with instruction level parallelism Hardware executes multiple instructions at once Hidden from the programmer Hard to do Programming for performance Load balancing Optimizing communication and synchronization Chapter 1 Computer Abstractions and Technology 45

46 Manufacturing ICs 1.7 Real Stuff: The AMD Opteron X4 Yield: proportion of working dies per wafer Chapter 1 Computer Abstractions and Technology 46

47 ipad A4 Processor Clock = 1 GHz 4 Cortex-A8 cores Each Cortex core is based on ARM mwatt consumption Chapter 1 Computer Abstractions and Technology 47

48 AMD Opteron X2 Wafer X2: 300mm wafer, 117 chips, 90nm technology X4: 45nm technology gy Chapter 1 Computer Abstractions and Technology 48

49 Integrated Circuit Cost Cost per die = Cost per wafer Dies per wafer Yield Dies per wafer Wafer area Die area Yield = 1 (1 + (Defects per area Die area/2)) 2 Nonlinear relation to area and defect rate Wafer cost and area are fixed Defect rate determined by manufacturing process Die area determined by architecture and circuit design Chapter 1 Computer Abstractions and Technology 49

50 SPEC CPU Benchmark Programs used to measure performance Supposedly typical of actual workload Standard Performance Evaluation Corp (SPEC) Develops benchmarks for CPU, I/O, Web, SPEC CPU2006 Elapsed time to execute a selection of programs Negligible I/O, so focuses on CPU performance Normalize relative to reference machine Summarize as geometric mean of performance ratios CINT2006 (integer) and CFP2006 (floating-point) n n Execution time ratio i i=1 Chapter 1 Computer Abstractions and Technology 50

51 CINT2006 for Opteron X Name Description IC 10 9 CPI Tc (ns) Exec time Ref time SPECratio perl Interpreted string processing 2, , bzip2 Block-sorting compression 2, , gcc GNU C Compiler 1, , mcf Combinatorial optimization ,345 9, go Go game (AI) 1, , hmmer Search gene sequence 2, , sjeng Chess game (AI) 2, , libquantum Quantum computer simulation 1, ,047 20, h264avc Video compression 3, , omnetpp Discrete event ent simulation , astar Games/path finding 1, , xalancbmk XML parsing 1, ,143 6, Geometric mean 11.7 High cache miss rates Chapter 1 Computer Abstractions and Technology 51

52 SPEC Power Benchmark Power consumption of server at different workload levels Performance: ssj_ops/sec Power: Watts (Joules/sec) Overall ssj_ops per Watt ssj_ops i power i= 0 = i = 0 = 0 i Chapter 1 Computer Abstractions and Technology 52

53 SPECpower_ssj2008 for X4 Target Load % Performance (ssj_ops/sec) Average Power (Watts) 100% 231, % 211, % 185, % 163, % 140, % 118, % 920, % 70, % 47, % 23, % Overall sum 1,283,590 2,605 ssj_ops/ power 493 Chapter 1 Computer Abstractions and Technology 53

54 Fallacy: Low Power at Idle Look back at X4 power benchmark At 100% load: 295W At 50% load: 246W (83%) At 10% load: 180W (61%) Google data center Mostly operates at 10% 50% load At 100% load less than 1% of the time Consider designing processors to make power proportional to load Chapter 1 Computer Abstractions and Technology 54

55 Concluding Remarks Cost/performance is improving Due to underlying technology development Hierarchical layers of abstraction In both hardware and software Instruction set architecture The hardware/software interface Execution time: the best performance measure Power is a limiting factor Use parallelism to improve performance 1.9 Co oncluding Remark ks Chapter 1 Computer Abstractions and Technology 55