מבנה המחשב. Architecture?? The art or science or building...the art or practice of designing and building structures...

Transcription

1 מבנה המחשב Architecture?? The art or science or building...the art or practice of designing and building structures...» Webster 9th New College Dictionary including plan, design, construction and decorative treatment...» American College Dictionary

2 Computer Architecture - the word coined by Fred Brooks Computer Architecture Computer architecture is the computer as seen by the user - Amdhal et al, (64)...by architecture, we mean the structure of the modules as they are organized in a computer system... - Stone, H. (1987) The architecture of a computer is the interface between the machine and the software - Andris Padges IBM 360/370 Architect Computer Architecture cont d Structure: static arrangement of the parts (plan) Organization: dynamic interaction of these parts and their management (design) Implementation: the design of specific building blocks (construction)

3 Architecture (from architect s point of view) Instruction set architecture Implementation Organization: high-level aspects - memory system - bus structure - internal CPU design Hardware: - logic design - packaging tech. Levels in Computer Organization Concepts of multi-level machine Concepts of virtual machine Architecture Disciplines Hardware/software structure Algorithms and their implementation Language Issues

4 The Big Picture Both hardware and software consist of hierarchical layers, with each lower layer hiding details from the level above. This principle of abstraction is the way both hardware designers and software designers cope with the complexity of computer systems. One key interface between the levels of abstraction is the instruction set architecture: the interface between the hardware and low-level software. This abstract interface enables many implementations of varying cost and performance to run identical software. John L. Hennessy David A. Patterson Early Calculating Machines 1623: Wilhelm Schickard s mechanical counter. 1642: Blaise Pascal s mechanical adder with carry.

5 Early Computing Machines : Charles Babbage built the Difference Engine to tabulate polynomial functions for math tables, with plans for a more general Analytical Engine (assisted by Augusta Ada King, Countess of Lovelace) First Electronic Computers Konrad Zuse (1938) Z1 mechanical computer with binary arithmetic (program-controlled Z3 in 1941) John Atanasoff (1942) ABC electronic digital computer to solve linear equations John Mauchly/J. Presper Eckert ENIAC ( ) first operational large-scale computing machine, Maurice Wilkes EDSAC (1949) 1st operational storedprogram computer Howard Aiken Harvard Mark I ( ) built by IBM Jon Von Neumann/Eckert/Mauchly EDVAC (1945) 1st published stored-program computer, Von Neumann ( ) IAS Computer Mauchly/Eckert ( ) - UNIVAC First General-Purpose Computer Electronic Numerical Integrator and Calculator (ENIAC) built in World War II was the first general purpose computer For computing artillery firing tables 80 feet long by 8.5 feet high and several feet wide Twenty 10 digit accumulators, each 2 feet long 18,000 vacuum tubes relays 5,000 additions/second 2800 us multiply Weight: 30 tons Power consumption: 140kW Data from card reader (800 cards/min) 2004 Morgan Kaufman Publishers

6 The Atanasoff Story John Vincent Atanasoff, a professor of physics at Iowa State College (now University), and his technical assistant, Clifford Berry, built a working electronic computer in The First Electronic Computer, the Atanasoff Story, by Alice R. Burks and Arthur W. Burks, Ann Arbor, Michigan: The University of Michigan Press, History Continues : Von Neumann built the IAS computer at the Institute of Advanced Studies, Princeton A prototype for most future computers : Eckert-Mauchly Computer Corp. built UNIVAC I, used in the 1950 census. 1949: Maurice Wilkes built EDSAC, the first stored-program computer EDVAC Electronic Discrete Variable Computer (1945) Jon von Neumann First published stored-program computer (program & data in same memory - von Neumann architecture ) 1024 words mercury delay-line memory, 20K words magnetic wire secondary memory 44-bit binary numbers & serial arithmetic Instruction format: A1 A2 A3 A4 OP A1 OP A2 -> A3, next instruction at A4 Cond. Jump: if A1 <= A2 goto A3 else goto A4 I/O between main & secondary memory

7 1. Big Iron Computers: Used vacuum tubes, electric relays and bulk magnetic storage devices. No microprocessors. No memory. Example: ENIAC (1945), IBM Mark 1 (1944) First-Generation Computers Late 1940s and 1950s Stored-program computers Programmed in assembly language Used magnetic devices and earlier forms of memories Examples: IAS, ENIAC, EDVAC, UNIVAC, Mark I, IBM 701

8 A Puzzle nwhat does the following mean? nok, then, this? Translation nand this? nhow about this? add $8,$1,$2 add $9,$3,$4 sub $5,$8,$9 More Translation nbecoming clear? $8 = $1 + $2 $9 = $3 + $4 $5 = $8 - $9 nsurely OK now? u = a +b v = c+d; x = u - v nor, obviously: x = (a+b) - (c+d)

9 Levels of Representation High Level Language Program (e.g., C) Compiler Assembly Language Program (e.g.,mips) Assembler Machine Language Program (MIPS) Machine Interpretation Hardware Architecture Description (e.g., Verilog Language) Architecture Implementation Logic Circuit Description (Verilog Language) temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; lw $t0, 0($2) lw $t1, 4($2) sw $t1, 0($2) sw $t0, 4($2) wire [31:0] databus; regfile registers (databus); ALU ALUBlock (ina, inb, databus); wire w0; XOR (w0, a, b); AND (s, w0, a); Computer Architecture What are Machine Structures? Software Hardware Application (ex: browser) Compiler Assembler Operating System (Mac OS X) Processor Memory I/O system Datapath & Control Digital Design Circuit Design transistors Instruction Set Architecture *Coordination of many levels (layers) of abstraction

10 Anatomy: 5 components of any Computer Personal Computer Computer Processor Control ( brain ) Datapath ( brawn ) Memory (where programs, data live when running) Devices Input Output Keyboard, Mouse Disk (where programs, data live when not running) Display, Printer Overview of Physical implementations The hardware out of which we make systems. Integrated Circuits (ICs) Combinational logic circuits, memory elements, analog interfaces. Printed Circuits (PC) boards substrate for ICs and interconnection, distribution of CLK, Vdd, and GND signals, heat dissipation. Power Supplies Converts line AC voltage to regulated DC low voltage levels. Chassis (rack, card case,...) holds boards, power supply, provides physical interface to user or other systems. Connectors and Cables. Integrated Circuits Bare Die Chip in Package Primarily Crystalline Silicon 1mm - 25mm on a side feature size ~ 0.13µm = 0.13 x 10-6 m M transistors (25-100M logic gates") 3-10 conductive layers CMOS (complementary metal oxide semiconductor) - most common. Package provides: spreading of chip-level signal paths to board-level heat dissipation. Ceramic or plastic with gold wires.

11 Printed Circuit Boards fiberglass or ceramic 1-20 conductive layers 1-20in on a side IC packages are soldered down. Technology Trends: Memory Capacity (Single-Chip DRAM) size Year Now 1.4X/yr, or 2X every 2 years. 8000X since 1980! year size (Mbit) Technology Trends: Microprocessor Complexity Itanium 2: 410 Million Athlon (K7): 22 Million Moore s Law i80386 i80486 Pentium Alpha 21264: 15 million Pentium Pro: 5.5 million PowerPC 620: 6.9 million Alpha 21164: 9.3 million Sparc Ultra: 5.2 million i i8086 2X transistors/chip Every 1.5 years i8080 i Year Called Moore s Law

12 Trends: Processor Performance Sun -4/ 260 MIPS M 2000 IBM MIPS RS/ M/ x/year DEC HP AXP/ 9000/ Intel (Pentium IV, 3.0 GHz) DEC Alpha 5/500 DEC Alpha 5/300 DEC Alpha 4/266 IBM POWER 100 Performance with respect to performance of VAX-11/780 Processor Performance (SPEC) performance now improves ~60% per year (2x every 1.5 years) RISC Performance RISC introduction Intel x %/yr Year Did RISC win the technology battle and lose the market war? OLD PICTURE BUT THE STORY IS THE SAME Processor Performance - Capacities

13 Processor Performance - Capacities Technology --> Dramatic Changes Processor logic capacity: 2 in performance every 1.5 years; clock rate: about 30% per year overall performance: 1000 in last decade Main Memory DRAM capacity: 2 / 2 years; 1000 size in last decade memory speed: about 10% per year cost / bit: improves about 25% per year Disk capacity: > 2 in capacity every 1.5 years cost / bit: improves about 60% per year 120 capacity in last decade Network Bandwidth Bandwidth: increasing more than 100%per year! Your PC in 2006 State-of-the-art PC(on your desk) Processor clock speed: 8000 MegaHertz (8.0 GigaHertz) Memory capacity: 2048 MegaBytes (2.0 GigaBytes) Disk capacity: 800 GigaBytes (0.8 TeraBytes) Will need new units! Mega Giga Tera

14 Technology in the News BIG LaCie the first to offer consumer-level 1.6 Terabyte disk! ~$2,000 Weighs 11 pounds! 5 1/4 form-factor SMALL Pretec is soon offering a 12GB CompactFlash card Size of a silver dollar Cost? > New Honda!

15 Learn some of the big ideas in CS & engineering: 5 Classic components of a Computer Data can be anything (integers, floating point, characters): a program determines what it is Stored program concept: instructions just data Principle of Locality, exploited via a memory hierarchy (cache) Greater performance by exploiting parallelism Principle of abstraction, used to build systems as layers Compilation v. interpretation thru system layers Principles/Pitfalls of Performance Measurement Text Computer Organization and Design: The Hardware/Software Interface, Third Edition, Patterson and Hennessy (COD). The second edition is far inferior, and is not suggested. Your final grade Grading (could change) 25% Homework 75% Test

16 Course Problems Cheating What is cheating? Studying together in groups is encouraged. Turned-in work must be completely your own. Both giver and receiver are equally culpable Every offense will be referred to the Office of Student Judicial Affairs. Continued rapid improvement in computing 2X every 2.0 years in memory size; every 1.5 years in processor speed; every 1.0 year in disk capacity; Moore s Law enables processor (2X transistors/chip ~1.5 yrs) 5 classic components of all computers Control Datapath Memory Input Output } Processor What is "Computer Architecture" Computer Architecture = Instruction Set Architecture (ISA) + Machine Organization (MO) ISA \ Definition of What the Machine Does, Logical View MO \ How Machine Implements ISA, Physical Implementation

17 The Instruction Set: a (the?) Critical Interface software instruction set hardware Example ISAs (Instruction Set Architectures) Digital Alpha v3) HP PA-RISC v2.0) (v1, (v1.1, Sun Sparc (v8, v9, v10, v11) SGI MIPS (MIPS I, II, III, IV, V) Intel (8086,80286, ,Pentium, Pentium ) Intel + HP EPIC Impact of changing an ISA Early 1990 s Apple switched instruction set architecture of the Macintosh From Motorola based machines To PowerPC architecture Upside? Downside? Intel 80x86 Family: many implementations of same architecture Upside: program written in 1978 for 8086 can be run on latest Pentium chip Downside?

18 The Big Picture Since 1946 all computers have had 5 components Processor ``CPU'' Datapath Control + Control Unit Datapath Memory Input Output Interconnection Structures (buses) What is ``Computer Architecture''? Software Hardware Application (Netscape) Operating System Compiler (Unix; Windows 2000) Assembler Processor Memory I/O system Datapath & Control Digital Design Circuit Design transistors, IC layout Instruction Set Architecture Co-ordination of many levels of abstraction hide unnecessary implementation details helps us cope with enormous complexity of real systems Under a rapidly changing set of forces Design, Measurement, and Evaluation Forces Acting on Computer Architecture R-a-p-i-d Improvement in Implementation Technology: IC: integrated circuit; invented 1959 SSI MSI LSI VLSI: dramatic growth in number transistors/chip ability to create more (and bigger) Functional Units per processor; bigger memory more sophisticated applications, larger databases Ubiquitous computing

19 Execution Cycle Instruction Fetch Instruction Decode Operand Fetch Execute Result Store Next Instruction Obtain instruction from program storage Determine required actions and instruction size Locate and obtain operand data Compute result value or status Deposit results in storage for later use Determine successor instruction Overview: Processor Front Side Bus These pieces implement the instruction cycles Overview: PCI Bus and Devices Bus Controller

20 All computers consist of five components Processor: (1) datapath and (2) control (3) Memory (4) Input devices and (5) Output devices Not all "memories" are created equally Cache: fast (expensive) memory are placed closer to the processor Main memory: less expensive memory--we can have more Interfaces are where the problems are - between functional units and between the computer and the outside world Need to design against constraints of performance, power, area and cost Integrated Circuits Costs IC cost = Die cost + Testing cost + Packaging cost Final test yield Die cost = Wafer cost Dies per Wafer * Die yield Dies per wafer = š * ( Wafer_diam / 2) 2 š * Wafer_diam Test dies Die Area 2 * Die Area Die Yield = Wafer yield * 1 + { Defects_per_unit_area * Die_Area α } α Die Cost goes roughly with die area 4 DAP.S98 1 How to Quantify Performance? Plane DC to Paris Speed Passengers Throughput (pmph) Boeing hours 610 mph ,700 BAD/Sud Concodre 3 hours 1350 mph ,200 Time to run the task (ExTime) Execution time, response time, latency Tasks per day, hour, week, sec, ns (Performance) Throughput, bandwidth

21 The Bottom Line: Performance and Cost or Cost and Performance? "X is n times faster than Y" means ExTime(Y) Performance(X) = ExTime(X) Performance(Y) Speed of Concorde vs. Boeing 747 Throughput of Boeing 747 vs. Concorde Cost is also an important parameter in the equation which is why concordes are being put to pasture! Measurement Tools Benchmarks, Traces, Mixes Hardware: Cost, delay, area, power estimation Simulation (many levels) ISA, RT, Gate, Circuit Queuing Theory Rules of Thumb Fundamental Laws /Principles Understanding the limitations of any measurement tool is crucial. Metrics of Performance Application Programming Language Compiler ISA Datapath Control Function Units Transistors Wires Pins Answers per month Operations per second (millions) of Instructions per second: MIPS (millions) of (FP) operations per second: MFLOP/s Megabytes per second Cycles per second (clock rate)

22 Cases of Benchmark Engineering The motivation is to tune the system to the benchmark to achieve peak performance. At the architecture level Specialized instructions At the compiler level (compiler flags) Blocking in Spec89 factor of 9 speedup Incorrect compiler optimizations/reordering. Would work fine on benchmark but not on other programs I/O level Spec92 spreadsheet program (sp) Companies noticed that the produced output was always out put to a file (so they stored the results in a memory buffer) and then expunged at the end (which was not measured). One company eliminated the I/O all together. After putting in a blazing performance on the benchmark test, Sun issued a glowing press release claiming that it had outperformed Windows NT systems on the test. Pendragon president Ivan Phillips cried foul, saying the results weren't representative of real-world Java performance and that Sun had gone so far as to duplicate the test's code within Sun's Just-In-Time compiler. That's cheating, says Phillips, who claims that benchmark tests and real-world applications aren't the same thing. Did Sun issue a denial or a mea culpa? Initially, Sun neither denied optimizing for the benchmark test nor apologized for it. "If the test results are not representative of real-world Java applications, then that's a problem with the benchmark," Sun's Brian Croll said. After taking a beating in the press, though, Sun retreated and issued an apology for the optimization.[excerpted from PC Online 1997] Issues with Benchmark Engineering Motivated by the bottom dollar, good performance on classic suites more customers, better sales. Benchmark Engineering Limits the longevity of benchmark suites Technology and Applications Limits the longevity of benchmark suites.

23 SPEC: System Performance Evaluation Cooperative First Round programs yielding a single number ( SPECmarks ) Second Round 1992 SPECInt92 (6 integer programs) and SPECfp92 (14 floating point programs) - Compiler Flags unlimited. March 93 - new set of programs: SPECint95 (8 integer programs) and SPECfp95 (10 floating point) benchmarks useful for 3 years Single flag setting for all programs: SPECint_base95, SPECfp_base95 SPEC CPU2000 (11 integer benchmarks CINT2000, and 14 floating-point benchmarks CFP2000 SPEC 2000 (CINT 2000)Results

24 SPEC 2000 (CFP 2000)Results Reporting Performance Results Reproducability Apply them on publicly available benchmarks. Pecking/Picking order Real Programs Real Kernels Toy Benchmarks Synthetic Benchmarks How to Summarize Performance Arithmetic mean (weighted arithmetic mean) tracks execution time: sum(t i )/n or sum(w i *T i ) Harmonic mean (weighted harmonic mean) of rates (e.g., MFLOPS) tracks execution time: n/sum(1/r i ) or 1/sum(W i /R i ) Normalized execution time is handy for scaling performance (e.g., X times faster than SPARCstation 10) But do not take the arithmetic mean of normalized execution time, use the geometric mean = (Product(R i )^1/n)

25 Performance Evaluation For better or worse, benchmarks shape a field Good products created when have: Good benchmarks Good ways to summarize performance Given sales is a function in part of performance relative to competition, investment in improving product as reported by performance summary If benchmarks/summary inadequate, then choose between improving product for real programs vs. improving product to get more sales; Sales almost always wins! Execution time is the measure of computer performance! Simulations When are simulations useful? What are its limitations, I.e. what real world phenomenon does it not account for? The larger the simulation trace, the less tractable the post-processing analysis. Queueing Theory What are the distributions of arrival rates and values for other parameters? Are they realistic? What happens when the parameters or distributions are changed?

26 Quantitative Principles of Computer Design Make the Common Case Fast Amdahl s Law CPU Performance Equation Clock cycle time CPI Instruction Count Principles of Locality Take advantage of Parallelism CPU Performance Equation CPU CPU time time = Seconds = Instructions x Cycles x Seconds Program Program Instruction Cycle Amdahl's Law Speedup due to enhancement E: ExTime w/o E Performance w/ E Speedup(E) = = ExTime w/ E Performance w/o E Suppose that enhancement E accelerates a fraction F of the task by a factor S, and the remainder of the task is unaffected DAP.S98 32

27 Amdahl s Law ExTime new = ExTime old x (1 - Fraction enhanced ) + Fraction enhanced Speedup enhanced Speedup overall = ExTime 1 old = (1 - Fraction ExTime enhanced ) + Fraction enhanced new Speedup enhanced Amdahl s Law Floating point instructions improved to run 2X; but only 10% of actual instructions are FP = Amdahl s Law (answer) Floating point instructions improved to run 2X; but only 10% of actual instructions are FP ExTime new = ExTime old x ( /2) = 0.95 x ExTime old Speedup overall = = 1.053

28 Example: Calculating CPI Base Machine (Reg / Reg) Op Freq Cycles CPI(i) (% Time) ALU 50% 1.5 (33%) Load 20% 2.4 (27%) Store 10% 2.2 (13%) Branch 20% 2.4 (27%) 1.5 Typical Mix Chapter Summary, #1 Designing to Last through Trends Capacity Speed Logic 2x in 3 years 2x in 3 years DRAM 4x in 3 years 2x in 10 years Disk 4x in 3 years 2x in 10 years 6yrs to graduate => 16X CPU speed, DRAM/Disk size Time to run the task Execution time, response time, latency Tasks per day, hour, week, sec, ns, Throughput, bandwidth X is n times faster than Y means ExTime(Y) Performance(X) = ExTime(X) Performance(Y) Amdahl s Law: Speedup overall = ExTime old ExTime new = CPI Law: Execution time is the REAL measure of computer performance! Good products created when have: Good benchmarks, good ways to summarize performance Die Cost goes roughly with die area 4 1 (1 - Fraction enhanced ) + Fraction enhanced Speedup enhanced CPU CPU time time = Seconds = Instructions x Cycles x Seconds Program Program Instruction Cycle

29 Food for thought Two companies reports results on two benchmarks one on a Fortran benchmark suite and the other on a C++ benchmark suite. Company A s product outperforms Company B s on the Fortran suite, the reverse holds true for the C++ suite. Assume the performance differences are similar in both cases. Do you have enough information to compare the two products. What information will you need? Food for Thought II In the CISC vs. RISC debate a key argument of the RISC movement was that because of its simplicity, RISC would always remain ahead. If there were enough transistors to implement a CISC on chip, then those same transistors could implement a pipelined RISC If there was enough to allow for a pipelined CISC there would be enough to have an on-chip cache for RISC. And so on. After 20 years of this debate what do you think? Hint: Think of commercial PC s, Moore s law and some of the data in the first chapter of the book (and on these slides)