Stellaris Robotic Evaluation Board and Micriµm µc/os-iii

Transcription

1 Introductions Stellaris Robotic Evaluation Board and Micriµm µc/os-iii Jean J. Labrosse Founder, President and CEO of Micriµm Dexter Travis Stellaris ARM Cortex -M3 Applications Engineering Dexter Travis, Stellaris ARM Cortex -M3 Applications Engineering Jean J. Labrosse, Founder, President and CEO of Micriµm 1 2 Find the right ARM Solution for you Software support 32-bit ARM MCU for Safety-Critical Applications TMS57 ARM Cortex-R4 Up to 25 DMIPS/ 16 MHz 2 MB Flash, 16 KB RAM FPU, ECC, Timer/PWM Co-Proc, 12bit ADCs, CAN, EMIF, LIN, SPI, Flexray Transportation, Motor Control, Certified for use in safety critical (SIL3) systems $7. to $18. Comprehensive developer ecosystem 32-bit ARM Cortex -M3 MCUs Stellaris ARM Cortex-M3 Up to 8 MHz Flash 8 KB to 256 KB USB, ENET MAC+PHY CAN, ADC, PWM, SPI Connectivity,Security, Motion Control, HMI, Industrial Automation $1. to $8. ARM Cortex-A8 & ARM9 MPUs Sitara ARM Cortex-A8 & ARM9 375MHz to >1GHz Cache, RAM, ROM USB, CAN, SATA, SPI, PCIe, EMAC Industrial automation, POS & portable data terminals $5. to $25. Responsive design support DSP DSP+ARM C6 Integra DaVinci Digital Media processors 3MHz to >1Ghz +Accelerator Cache RAM, ROM USB, ENET, PCIe, SATA, SPI Floating/Fixed Point Video, Audio, Voice, Security, Conferencing $5. to $2. Development tools Agenda RTOSs and Real-Time Kernels A brief introduction Micriµm - µc/os-iii Summary of features Scheduling and Context Switching Synchronization Message Passing Other Services Texas Instruments - EVALBOT Features Examples Demo

2 RTOS vs Real-Time Kernels What is a Real-Time Kernel? Keyboard Keyboard Interrupt Timer CPU Ethernet (MAC/PHY) USB (Host) (Device) Real-Time Kernel TCP/IP Stack USB Stacks Application RTOS TCP/IP Apps Other (Shell) (Clk) (CRC) (etc.) Graphical User Interface File System Audio CAN Modbus Display Touch Screen Media I 2 S CAN RS-232C RS-485 Display with optional Touch Interface Media (SD) (MMC) (NAND Flash) (NOR Flash) (CF) (RAM Disk) Other! Software that manages the time of a CPU! Performs multitasking Switches the CPU between tasks Highest priority task runs on the CPU Round-robins tasks of equal priority! Provides valuable services to an application: management Synchronization Mutual exclusion management Message passing Memory management Time management Soft-timer management Other What is a Real-Time Kernel? Preemptive Kernels High Priority Interrupt occurs Via a kernel call, the ISR makes the high priority task ready Importance Each Event Event ISR High-priority task ISR ISR completes and the kernel switches to the high-priority task The kernel switches to the low-priority task Low Priority Infinite Loop Low-priority task Time 29, 21, Micriµm, Micriµm, All Rights Reserved All Rights Reserved

3 What is µc/os-iii? µc/os-iii Summary of Key Features! A third generation Real-Time Kernel Has roots in µc/os-ii, the world s most popular Real-Time Kernel! µc/os-ii s internals were described in the book: MicroC/OS-II, The Real-Time Kernel (1998)! A new 85+ page book: µc/os-iii, The Real-Time Kernel Describes µc/os-iii s internals The book comes with:! A Cortex-M3 based evaluation board Featuring TI s LM3S9B92! Links to download: Sample code to run µc/os-iii IAR s 32K KickStart tools A trial version of µc/probe Companion EVALBOT! 5 Example projects! Preemptive Multitasking Round-robin scheduling of equal-priority tasks! ROMable! Scalable Adjustable footprint Compile-time and run-time configurable! Portable All µc/os-ii ports can be adapted to µc/os-iii! Rich set of services Management, Time Management, Semaphores, Mutexes, Message Queues, Soft Timers, Memory Management, Event Flags and more µc/os-iii Summary of Key Features Typical µc/os-iii s! Real-Time, Deterministic Reduced interrupt and task latency! Built-in Performance Measurement Measures interrupt disable time on a per-task basis Measures stack usage for each task Keeps track of the number of context switches for each task Measures the ISR-to- and -to- response time And more! Cleanest source code in the industry! Consistent API! Run-Time argument checking void My (void *p_arg) { Do something with argument p_arg; initialization; for (;;) { Wait for event; /* Time to expire... */ /* Signal/Msg from ISR... */ /* Signal/Msg from task... */ /* Processing (Your Code) */ } } CPU Registers (Priority) Variables Arrays Structures Stack (RAM) I/O Devices (Optional)

4 Creating a The µc/os-iii Scheduler Using Count Leading Zeros (CLZ)! You create a task by calling a service provided by the kernel: Control Block! The Cortex-M3 has a CLZ instruction Makes scheduling much faster ex. with 64 priorities OSCreate(OS_TCB *p_tcb, CPU_CHAR *p_name, OS_TASK_PTR p_task, void *p_arg, OS_PRIO prio, CPU_STK *p_stk_base, CPU_STK *p_stk_limit, OS_STK_SIZE stk_size, OS_MSG_QTY q_size, OS_TICK time_slice, void *p_ext, OS_OPT opt, OS_ERR *p_err); Name Start Address Priority Stack Stack Limit Stack Size Time Slice Options [] [1] ReadyTbl[] Ready Priority = 37 if (ReadyTbl[] == ) Prio = CLZ(ReadyTbl[1]) + 32; else Prio = CLZ(ReadyTbl[]); #Zeros The µc/os-iii Ready List Context Switch ARM Cortex-M3 for µc/os-iii Highest Priority ReadyList[MAX_PRIO] [] [1] [2] [3] [4] TCB Prev Next - Other Fields - TCB Prev Next - Other Fields - TCB Prev Next - Other Fields - Multiple s At Same Priority! (1): Current task s CPU registers are saved on current task s stack! (2): CPU s SP register is saved in current task s TCB Lowest Priority [5] Idle 's TCB! (3): New task s SP is restored from the new task s TCB [MAX_PRIO-1] 1 Prev Next - Other Fields -! (4): CPU registers are restored from the new task s stack

5 Resource Management (Mutual Exclusion Semaphore) Synchronization (Semaphores) Delta TS Delta TS Synchronization (Event Flags) Message Passing (Message Queues) Delta TS Delta TS

6 Other µc/os-iii Features! Management Suspend/Resume a task Delete a task! Time Management! Software Timers µc/probe! Fixed-Size Memory Partitions! Pending on Multiple Objects! And more. What is µc/probe? µc/probe µc/os-iii Awareness! Windows application to display/change target data: ANY variable ANY memory location ANY I/O port! Works with ANY processor 8-, 16-, 32-, 64-bit or DSP! Works with ANY compiler Compiler/linker needs to generate an ELF/DWARF file such as Embedded Workbench! Supports many interfaces RS-232C USB TCP/IP (Ethernet) J-Link SWD (Cortex-M3) NO target resident coded needed! Others! Target doesn t need an RTOS Works with or without an RTOS Name Max Interrupt Disable Time Priority Stack Usage % CPU Usage #Context Switches ISR to Response

7 To run the book examples you will need: Texas Instruments EVALBOT unassembled The µc/os-iii book The TI EVALBOT Download and install the IAR 32K edition of Embedded Workbench for the ARM (V5.5) You will need to install the J-Link driver Download and unzip the µc/os-iii book examples: Download and install the non-time limited TRIAL version of µc/probe: 26 Texas Instruments EVALBOT Examples Bumpers (2) User Switches (2) Speaker Stellaris LM3S9B92 USB-Device Connector Example 1: Simple Display Rotates a series of messages on the Display Blinks LEDS on the board Example 2: Using Audio 96x6 OLED Display USB-Host Connector Bump sensors select next or previous wav track SWITCH2 begins audio playback, SWITCH1 stops playback ON/OFF Switch RJ45 1/1 Ethernet Example 3: Simple Control Manual start/stop of the motor via SWITCH1, SWITCH2 and bump sensors Example 4: Autonomous Control MicroSD Socket EVALBOT moves randomly and reacts to sensor inputs. Motor/Wheel (2) In-Circuit Debug Interface Batteries (3 AA) 28

8 Autonomous EVALBOT Control Control queues commands to motor tasks Motor s receives command, interprets and posts to PID If Timer expires a random turn is initiated PID closes motor control loop based on feedback from speed sensor interrupt handlers Input Monitor posts flags to Control speed sensor interrupts relay data back to PID buttons and Bump Sensor trigger Input monitor task 29