Computer Structure Lab. RESA b1monitor PROGRAM USER GUIDE

Size: px
Start display at page:

Download "Computer Structure Lab. RESA b1monitor PROGRAM USER GUIDE"

Transcription

1 Computer Structure Lab RESA b1monitor PROGRAM USER GUIDE Text Editor Compiler Hardware Monitor Simulator Graph Generator Hardware interface Software-hardware communication protocol FPGA Department of Systems School of Electrical Engineering, Tel Aviv University 2005

2 1 Orientation Text editor Orientation The Editor screen Auto Syntax Colorizing and Stylizing Label completion Line numbering The Results screen Compilation succeeded Compilation failed User options The assembly language rules Assembly program example Source code Compilation results (dump file) Simulator Orientation Use of the simulator Run the simulator Load programs (source or cod) into the simulator Screen areas of the simulator Run functions of the simulator Memory watch and Memory dump options Save memory values into a file Change memory values during simulation Change register values during simulation Reset the simulator Jump to address (change PC) function Save the simulator screen into a file Print the simulator screen Hardware monitor Orientation The Configuration Wizard Lab selection screen Labels Configuration FPGA Configuration Memory Configuration The Hardware monitor main window Slave and memory labels Memory Dump Registers Commands Buttons and controls Menus Configuration ii

3 4.4.2 Graphics Run Test Graph Generator Orientation Modes Screens A sample screen shot Table Entry Measure line and measured values Selecting signals Changing the order of signals Combining signals Spreading a bus Reversing a bus Zooming in and out Toggling grid Changing a signal name Naming the Graph Printing the Graph Load/Save option iii

4 1 Orientation The RESA B1 monitor program is a suite of programs. Student use them to write, compile and simulate programs in assembly language, setup the RESA-2 and debug hardware projects, designed by Xilinx ISE Foundation software. Block diagram of the program is presented on figure 1.1. The main parts of the RESA B1 program are: Text editor with compiler, DLX simulator, Hardware monitor with graph generator. Figure 1.1 Block diagram of RESA b1 program. 1

5 2 Text editor 2.1 Orientation The text editor/compiler screen consists of 2 main parts: the editor, and the results. The editor screen is the place the user should write the DLX assembly program in; it provides the user with all the necessary functionality (which will be described). The results screen is where the user, after compiling a program, sees the results of the compiling process, including errors and their locations. 2.2 The Editor screen The editor is used to enter the DLX assembly program into. The user can click on the window and start writing the DLX assembly program. The editor supports Auto Syntax Colorizing and Stylizing The editor will colorize and stylize the program, while the user is writing it: Legal line labels will be automatically colored blue and bold Legal line labels, that are defined more than once, will be colored purple and bold Illegal line labels will be colored red and bold Lines that contain a syntax error will be colored red and underlined Remarks will be colored green Labels inside commands, which point to a specific line label in the program, will be colored red, blue or purple: red if they point to a label which does not currently exist, blue if they point to an existing and valid line label, and purple if they point to a label which is defined more than once Label completion The user can right click the text editor screen, and select a label from a list of existing line labels. The selection causes the label to be inserted into the text. 2

6 2.2.3 Line numbering The line number is always shown in the status bar (bottom of window). 2.3 The Results screen After the user selects the Compile option (using the button or the menu option), the compiling results screen will show the results of the compiling process. The screen will show either the Compilation succeeded message followed by a list of used labels, or the Compilation failed message followed by a list of errors Compilation succeeded If the compilation succeeded, the.cod and.lst files will be created at the same directory of the.s file the user is working on. List of used labels is added at the end of.lst file and includes name of the label, line of definition and destination lines Compilation failed If the Compilation failed no.cod and.lst files will be created. List of errors is presented. Each error includes the line number in which it occurred, and the error reason double clicking an error will scroll the text editor to the line the error occurred in. The user should fix all errors and re-compile. 2.4 User options File->Open/Save: Opens and saves.s files. Last saved location of.s file will be the location of the compiled.lst and.cod files File->Compile: Compiles the file, creating the.lst and.cod files if compilation succeeded, and displaying the compilation errors list if compilation failed. Double click an error to scroll directly to it. Options->Colorizing: Check/uncheck this box in order to enable/disable syntax highlighting and colorizing. It is better to disable 3

7 colorizing when viewing large.s files, such as the EPROM program, which don t require corrections 2.5 The assembly language rules 1. Everything that appears in a line after a "*" is a comment. 2. The line pc= 0x12345 means that next translated line will be mapped to address 0x A label is defined by placing its name at the beginning of a line followed by a ":". (in the example: adr1:). A label is a shortcut for an address. The address that corresponds to a label is the address of the line in which it is defined. Every occurrence of a label (even before the place in which the label is defined) is replaced with the address that corresponds to the label. 4. dc x means place the constant x in the address that corresponds to the current line. 5. ds y means "reserve y words in memory". The address of the next line is y plus the address of the current line. 6. Instructions are given the mnemonics used in the description of the instruction sets. 7. Do not to use TAB button in order to align your programs. If you do so, remember to end every field with space. 2.6 Assembly program example Source code pc = 0x0 * address of the program in main memory *Instructions start: lw R1 R0 data1 lw R2 R0 data2 lw R3 R0 data3 lw R4 R0 data4 sw R1 R0 adr1 sw R2 R0 adr2 sw R3 R0 adr3 *R1=M(data1)=0x1 *R2=M(data2)=0x *R3=M(data3)=0xfedec987 *R4=M(data4)=0xabcdef01 *M(adr1)=R1 *M(adr2)=R2 *M(adr3)=R3 4

8 sw R4 R0 adr4 sw R4 R0 adr1 sw R3 R0 adr2 sw R2 R0 adr3 sw R1 R0 adr4 halt *M(adr4)=R4 *M(adr1)=R4 *M(adr2)=R3 *M(adr3)=R2 *M(adr4)=R1 *HALT instruction * destination area adr1: ds 1 adr2: ds 1 adr3: ds 1 adr4: ds 1 * constant data data1: dc 0x1 data2: dc 0x data3: dc 0xfedec987 data4: dc 0xabcdef Compilation results (dump file) *Instructions 0x : 0x8C start: lw R1 R0 data1 *R1=M(data1)=0x1 0x : 0x8C lw R2 R0 data2 *R2=M(data2)=0x x : 0x8C lw R3 R0 data3 *R3=M(data3)=0xfedec987 0x : 0x8C lw R4 R0 data4 *R4=M(data4)=0xabcdef01 0x : 0xAC01000D sw R1 R0 adr1 *M(adr1)=R1 0x : 0xAC02000E sw R2 R0 adr2 *M(adr2)=R2 0x : 0xAC03000F sw R3 R0 adr3 *M(adr3)=R3 0x : 0xAC sw R4 R0 adr4 *M(adr4)=R4 0x : 0xAC04000D sw R4 R0 adr1 *M(adr1)=R4 0x : 0xAC03000E sw R3 R0 adr2 *M(adr2)=R3 0x A: 0xAC02000F sw R2 R0 adr3 *M(adr3)=R2 0x B: 0xAC sw R1 R0 adr4 *M(adr4)=R1 0x C: 0xFC halt *HALT instruction * destination area 0x D: 0x adr1: ds 1 0x E: 0x adr2: ds 1 0x F: 0x adr3: ds 1 5

9 0x : 0x adr4: ds 1 * constant data 0x : 0x data1: dc 0x1 0x : 0x data2: dc 0x x : 0xFEDEC987 data3: dc 0xfedec987 0x : 0xABCDEF01 data4: dc 0xabcdef01 Label Report: start: 4 D: adr1: 24 D: 9, 15 adr2: 25 D: 10, 16 adr3: 26 D: 11, 17 adr4: 27 D: 12, 18 data1: 30 D: 4 data2: 31 D: 5 data3: 32 D: 6 data4: 33 D: 7 6

10 3 Simulator 3.1. Orientation The simulator is a software tool that simulates the DLX. Using the simulator the user can see how the DLX should behave on different DLX programs. The simulator knows to read the programs from 2 different file types:.s: A file that contain a program in the DLX assembly language. If the program is not a legal DLX assembly program the simulator will give an error message. The simulator will not tell you where the error is and is not a tool to check your programs. For this you should use the DLX assembly text editor..cod: This file contains the DLX program in a code format. It is your responsibility to give the simulator a legal code file. The output of the compiler is a code file. So you can use it in the simulator. It is possible to load several files into the simulator one after the other. If there is aliasing in some memory address the last program loaded value will be the value in this address Use of the simulator The simulator is very easy to use and can be learnt simply by using it. But here is some overview on its different options Run the simulator Run the main program and in the opening window choose the simulator view. If the main program is already running, you can open the simulator by clicking "file->new" in the menu and choose simulator view Load programs (source or cod) into the simulator.s: After the simulator view is open, in the menu click "file->open Source..." and chooses the wanted text file..cod: After the simulator view is open, in the menu click "file->open Code " and chooses the wanted code file. 7

11 3.2.3 Screen areas of the simulator. In the simulator screen there are 3 areas: Commands area: In this area the current place in the program is shown. Command, to be executed next, is marked by a yellow arrow. You see also the 4 commands in addresses before the current command and 5 commands in addresses after the current command. For each command 3 fields are shown: Its address, its binary value and its disassembly command. Registers area: In this area you can see and change the value of each of the 32 registers. Memory watch area: In this area you can see the address and see and change the value of selected memory addresses Run functions of the simulator The simulator gives several running options: Single step: The simulator will run one command and will stop at the next command address. In the menu click "Run->Step" or press the "Step" button. Run N steps: Run selected number of commands and stops in the next command address. In the menu click "Run->Run N steps..." and in the opened window click the wanted number of steps. Run until PC condition: Run until PC (the current address) has the selected address. In the menu click "Run->Run until PC=..." and in the opened window click the wanted stop PC value. Run until register condition: Run until the selected register has the selected value. In the menu click "Run->Run until Reg=..." and in the opened window click the register num and the wanted stop value. Run until memory condition: Run until the selected memory address has the selected value. In the menu click "Run->Run until Memory=..." and in the opened window click the memory address and the wanted stop value. 8

12 Run until HALT: Run until the DLX is in halt state. In the menu click "Run->Run until Halt". Note that in every one of the functions "run until", if the defined condition is not reached within number of steps, predefined in the parameters file, you will get message with choice to stop the running or continue Memory watch and Memory dump options. The simulator tool gives you 2 different ways to monitor the memory: Memory watch: In order to bring a selected address into the memory watch area click "Simulator- >Add Watch..." and write the selected address. The memory value of this value will be updated after every command. Memory Dump: In order to watch the values of range of memory addresses click "Simulator- >Memory Dump..." and select the wanted range. In the opened dialog you will see the addresses and values of the selected memory area Save memory values into a file In the opened dialog of the memory dump you can click the "Save to Dump File " button and select the file to save the memory range into. The file is type.txt with simple Structure as follows: " Address Value(address) Address Value(address) " Change memory values during simulation Using the memory area you can watch an address and change its value simply by clicking another value in its textbox. In order to set the same value to a range of addresses you can click "Simulator->set memory->with Value " and select the range and the value. You can load the memory to values from DLX assembly program or from code file like was explained before. You can also load it from text file with the structure of the "Memory dump saved file": 9

13 " Address Value(address) Address Value(address) " You can do that by click "Simulator->set memory->from Dump File " And select the wanted file Change register values during simulation Using the register area you can watch an address and change its value simply by clicking another value in its textbox Reset the simulator Reset will bring the current PC address to 0x0 and will exit every DLX state including halt state. Click "Simulator->Reset" Jump to address (change PC) function Click "Simulator->Jump To " and write the target address. The simulator also will exit halt state Save the simulator screen into a file Click "File->Save State..." and select file to save into Print the simulator screen Click "File->Print " and the print dialog will be open.the print preview option is also available. Remark: In all dialog in the simulator and in all text box you can write values in decimal or hexadecimal format. 10

14 4. Hardware monitor 4.1 Orientation The Hardware Monitor screen is the main window the user will interact with, while using the program. This screen supplies all the necessary functionality to communicate with the RESA-2 hardware, and provides the information in a convenient way. The Hardware Monitor screen is based on 2 stages the Configuration Wizard, in which the user sets all parameters needed for the lab work he is going to do, and the main window which displays all information from the hardware and allows communication with it. The user must configure the program using the wizard before starting the lab work (through the main window). 4.2 The Configuration Wizard The wizard consists of 4 stages: Lab selection, Labels configuration, FPGA configuration and Memory configuration. Every stage is represented by a screen in the configuration wizard. The user passes through all these screens when activating the wizard, using the "next" and "previous" buttons Lab selection screen Here the user must choose the lab he is currently working on: "A simple slave device" "Built in self monitoring" "A Read/Write Machine" "A load store machine + A simplified DLX" The lab that the user chooses affects the actions he can take later, and the information that the program displays. For example, if the user is doing the "Built in self monitoring" lab, he will not be able to upload a.cod file to memory, and the program will not display the commands disassembly. 11

15 4.2.2 Labels Configuration In this screen the user sets up "labels": constant addresses that the user wants to monitor during the lab work. Each label consists of a name and an address that will be read in order to get the label's value. There are 3 types of labels: Slave labels: Addresses that belong to the slave address space and will appear on the main Hardware Monitor screen. There are a few slave labels that are required in order for some monitoring functions to work, described later. Graphics labels: These are labels that represent a bit index which goes into the monitor RAM therefore, they are between 0x0 and 0x1f. These labels are used inside the "Graphics Signals" window to describe the various signals. Memory labels: Addresses that belong to the RAM memory address space, and will appear on the main Monitor screen. These are used only on labs that read/write from the RAM: Read/Write machine, Load/Store machine and the simplified DLX. In addition to labels, this screen allows the user to enter the start addresses of the GPR and the LA RAM, required so the main program will know what addresses to read for register display and graphic display. These addresses are required if the user wants the appropriate display, and the program will notify the user if he attempts to continue to the next stage without entering the addresses. The addresses must also be dividable by 0x20 (32 decimal), and the program will correct unaligned addresses (and notify the user about it). The user can enter a label name and address using the appropriate fields: Name, Address and Label Type. After the user enters the label's details, pressing "Insert/Edit label" will insert the label to the correct list. The user can also select an existing label from one of the lists, change its address and press the "Insert/Edit label" to update the address. In order to delete an existing label, the user should select it and press the appropriate "Delete Selected Label" button. The program checks all entered labels' addresses, and makes sure they are in the correct range (for their type). The address ranges are defined in the XML settings file (described later). The user can save and load.lbl files using the "Load labels from file" / "Save labels to file" buttons. The files include all the labels that the user created, as well as the 2 addresses. As said before, there are several special labels which must be defined in order for specific monitoring functions to work (of course this depends on the lab that was chosen). These include (in capital letters): 12

16 PC this label should indicate the address of the DLX PC counter, and is required in order for the commands part to work STATUS this label should contain, after each slave operation, the number of clock cycles that the LA RAM had monitored and captured. This is required for the graphics window. COMMAND this label is not required for any specific function in the main Hardware Monitor Window, but is special because it is the only label a write function is permitted into FPGA Configuration This screen allows the user to configure the RESA hardware with a specific.bit file, containing a design for the FPGA. The user should press the "Browse " button, select the.bit file (created by Xilinx) and continue. The lab administrator can prevent the user from uploading a file by entering the correct option in the XML settings file Memory Configuration This screen allows the user to configure the RESA-2 hardware with a specific.cod file, containing memory segments to upload to the RAM. The user should press the "Browse " button, select the.cod file (assembled by the text editor) and then "Finish". This option will only be available on labs that upload commands to the RAM. 4.3 The Hardware monitor main window After the user has passed through all 4 wizard stages, the program does some preliminary actions and then presents the user with the main Hardware Monitor window. These actions are: Configuring the RESA with the.bit file (if entered) Uploading the.cod file to the RAM memory Reading all required addresses for the first time The main Hardware Monitor window (named "the main window" from now on) contains several important parts. Not all parts always appear it depends on the lab the user had chosen in the first wizard screen (for example, the memory dump part will not appear in the "simple slave device" lab. 13

17 The main parts of the main window are: Slave and memory labels Display the labels that were defined in the "label configuration" part of the wizard, and the value that was read from the label's address (that was read from the hardware) Memory Dump In this part are displayed 32 addresses, read from the RAM memory. The user can choose what addresses to watch using the "Mem dump from:" edit box. The address will be aligned to the closest address divisible by 0x8, and the 4 lines will display 32 addresses starting for the (aligned) address the user has entered Registers This window displays the first 32 addresses starting from the GPR Start Address that was specified in the labels configuration screen in the configuration wizard, with appropriate register numbers (R0-R31). This can be used to watch data of any 32x32 RAM. In the Load/Store and DLX labs is used to watch and debug results of DLX assembly commands that relate to registers. This part requires the GPR address to be set in the label configuration part of the configuration wizard, or else registers will not be displayed Commands This window is active in the Load/Store and DLX labs only and displays values in 3 columns Address, Hexadecimal value and disassembly of the DLX commands. These are displayed for the current command, which will be executed in the next step (its address taken from the value of the program counter, read from the PC label), and for a few commands before and after the current one. If a value does not disassemble (this can happen, for example, when the monitor tries to disassemble a value which is part of a data segment and not a code segment), no disassembly will be shown in that specific line. This part requires the PC label to be set in the slave labels list, in the label configuration part of the configuration wizard, or else commands will not be displayed Buttons and controls The user can interact with the hardware using 2 methods: the buttons on the Hardware Monitor window, or the commands inside the menus. An error might occur when issuing any command (due to an incorrect design, or a hardware failure). In case of an error, a message box with details about it will open. 14

18 Step gives the hardware 1 STEP_EN signal, and refreshes the display (re-reads all necessary addresses). Reset this button has 2 modes. When RESET=1 is displayed, pressing this button will move the RESET signal to high. When RESET=0 is displayed, pressing this button will move the RESET signal to low and refresh the display. Refresh Data this button will re-read all addresses displayed on screen (including labels, memory dump, registers and commands views). In case of an error in a read from a specific address, a message box with the failed address will be displayed and the user will have an option to stop reading addresses (causing all failed addresses to display 0xeeeeeeee) Continuous Mode / Stop this button has 2 modes. When Continuous mode is displayed, pressing this button will cause the STEP_EN signal to be high and the button to change to Stop, until one of 2 things have happened: the Stop button has been pressed, or the DLX processor has reached the halt state (in this case a message box will pop informing the user about it). When one of these happens the button will return to be Continuous mode and the display will be refreshed. Notice that when in continuous mode, the user can t press any of the other buttons (to prevent interruptions to the DLX). Write to selected label This text box and Write button allow the user to select a memory label from the memory labels list, enter a value and then request the Hardware to write that value to the address of that label. Notice that you can t write to a slave label, with the special exception of the COMMAND label. Signals Waveforms this opens the ACTIVE signal waveforms window, described in the Graphics section. There is always just 1 active graphics window which is updated when the display is refreshed. The activation of the active signal waveforms window required the STATUS label to be defined and its value in the 8 LSB to be legal (0x0 0x1f). 4.4 Menus (default Windows menus not described) Configuration This menu allows the user to re-start the entire lab setup process by reactivating the configuration wizard, or to configure specific things by accessing single stages from inside the wizard. These include: - Labels config: allows the user to change the labels configuration; add/delete labels, change names and addresses etc. - FPGA config: allows the user to configure the hardware with a new.bit file - Memory config: allows the user to upload a new.cod file into the Hardware s RAM memory 15

19 4.4.2 Graphics This menu allows the user to open the active signal waveforms window (same as the Signal Waveforms button), and to open a reference signal waveforms window which can only be used to load previously saved waveform files Run This menu gives the user various run options (when running the load/store machine, or the simplified DLX). If a run condition hasn t been met and a specific number of steps had passed (that number is set in the XML settings file), the user will get a message asking whether to continue waiting). The run options are: - Step: same as the Step button - Run N steps: opens a dialog window which asks for number of steps (N), and then issues N step commands. - Run until PC= : opens a dialog window which asks for a specific PC register value, then runs in step mode until the PC reaches that value - Run until Reg= : opens a dialog window which asks for a specific Register number (0-31), and a register value, then runs in step mode until that specific register reaches that value. - Run until Memory= : opens a dialog window which asks for a specific memory address, and a value, then runs step mode until the value stored in the entered memory address reaches that value - Run until halt: activates the continuous mode until the processor reaches the halt state. Note that in every one of the run functions except Run until halt, if the defined condition is not reached within number of steps, predefined in the parameters file, you will get message with choice to stop the running or continue. In the Run until halt function you will get this message, if 30 seconds after activating the continuous mode the halt state is not reached Test - Test Port: tests the FPGA, if it s configuration includes valid IO_LOGIC - Test FPGA: executes the GXSTEST program of XESS - Test Board: configures the RESA-2 with a valid DLX file, then runs a flying bit test on the parallel bus and address to data memory test on first page of the RAM. The range of read/write address is set in the XML configuration file. If the RAM test is successful, a test.cod file is uploaded to memory and is run until the DLX reaches halt. The user get a message notifying that all the tests were done and passed successfully, except the test.cod file test the user needs to check the PC value after the run of the test program in order to see whether the DLX has reached the correct address. 16

20 5. Graph Generator 5.1 Orientation The Graph Generator module is purely UI: it has no background computation and is strictly about graphical representation of externally computed information. A graph displays the waveforms of binary signal passed to it from the RESA-2 hardware through the Hardware Monitor. Signals can be displayed separately (as binary signals) or combined to a bus with hexadecimal value. Communication with the user is done through buttons, keyboard and mouse. 5.2 Modes The Graph Generator module has two modes of work: active and reference. Active mode is open from the Signal Waveforms button or graphic menu of the Hardware monitor. In this mode data for the graphics are received from the Hardware monitor and every step updates them. Reference mode can be open only from the graphic menu of the Hardware monitor. In this mode the Graph Generator works as graph editor only on previously saved.wf files 5.3 Screens This module has only one screen, on which the waveforms are displayed A sample screen shot A sample screen shot is presented on figure 5.1.The screen consists of two main areas: 1.The top area is the toolbar. It contains the buttons that handle most of the actions that can be performed by the user in this module. 2.The bottom area is a table of entries, each of them displays one signal Table Entry A table entry displays one signal on the screen. It consists of the signal's name (leftmost box), the signal's measured value (middle box), and the waveforms, which show the signal's values in every step. Steps are numbered at the top and at the bottom of the table. A signal in an entry can be either binary or bus. Binary signal appear as a square wave, which is high when the value is 1, and low when the value is 0. Bus signals are displayed as two horizontal line that cross whenever the buses value changes. Bus signals have their values explicitly stated on the graph. 17

21 Figure 5.1 A sample screen shot Measure line and measured values The measure line (see screen shot) is a vertical line that can be placed anywhere on the graph by clicking the left mouse button in the desired place, above or beneath the table. The line will cross all the entries in a specific step, causing their value at that step to appear in the box beside their name (see screen shot) Selecting signals Left-clicking an (unmarked) entry will cause it to be marked in black (see screen shot). A marked signal is a selected signal. Selecting a signal this way will automatically unselect all previously selected signals. Holding the Ctrl button while selecting will 18

22 disable the automatic unselection, and therefore can be used to select a group of signals, one by one. Holding Ctrl while clicking a selected signal will unselect it. The Shift button can be used to select a group of adjacent signals by clicking the first signal in the group, and then clicking the last signal in the group while holding it down Changing the order of signals Selecting a signal and then pressing the up and down arrows will move it up and down in the table. This only works if exactly one signal is selected Combining signals Selecting a group of binary signals and pressing the Combine button (second icon from the left), will remove all selected signals from the table, and add a new bus signal to the table. The order in which the signals appeared in the table is the order that is used to compute the bus' values in every step. For example, for a bus made of 4 signals, that have the following values in a certain step, in the following order (MSB to LSB): 1, 0, 1, 0 the bus' value in that step will be: 0xA. The bus' position in the table will be at the index of the first (highest in the table) signal that was used to create it (the bus). A bus will get a default name, which can be changed by the user with the change name button (see further) Spreading a bus Spreading is an action opposite to combining. When pressing the Spread button (third icon from the left) the selected bus (there must be exactly one selected bus) will be removed from the table, replaced by all the binary signals it was made of. The signals will appear at the bus' index, in the same order they had in the bus Reversing a bus Selecting a bus and pressing the Reverse button (arrows icon) will reverse the order bits in the computation of the bus' values. For example, suppose a bus of size 4 has the value of 0xA in a certain step, which means its bits are 1, 0, 1, 0, then after pressing reverse the order of the bits is 0, 1, 0, 1, which is 0x5, the new value of the bus for that certain step Zooming in and out The fifth and the sixth buttons from the left are the zoom in/zoom out buttons (+ for zoom in, - for zoom out). Pressing them will change the size of the graph. Zooming in and out is not unlimited, and when reaching maximum or minimum size the will have no effect. 19

23 Toggling grid The grid is a gray net of squares that appear in the area of the signals' values (not measured values). They mark the boundaries of steps and entries. Pressing the Toggle grid button (the # icon) will turn the grid on and off Changing a signal name Pressing the Change Signal Name icon on the toolbar will cause a dialog box to appear prompting the user to insert a new name for a selected signal (exactly one signal must be selected). Once the name is inserted the new name will appear in the spot for signal name in the signal's entry. 5.4 Naming the Graph While choosing to change the name (p ), but no signal is marked, the function name the graph is activated. Edit name function can t be performed. Every new name overwrites the old one. 5.5 Printing the Graph Printing the graph can done by pressing the printer icon in the toolbar. Before accept printer options have to be set. 5.6 Load/Save option Buttons in the toolbar handle loading and saving of the graph. Save to file can be done only in the active mode, it s a text file and his extension is.wf. Only signal information and graph name is saved to the file. Load file can be performed only in reference mode. After that all the screen functions can be done, but they not change the file data. 20

NEW CEIBO DEBUGGER. Menus and Commands

NEW CEIBO DEBUGGER. Menus and Commands NEW CEIBO DEBUGGER Menus and Commands Ceibo Debugger Menus and Commands D.1. Introduction CEIBO DEBUGGER is the latest software available from Ceibo and can be used with most of Ceibo emulators. You will

More information

UNIVERSITY OF CALIFORNIA, DAVIS Department of Electrical and Computer Engineering. EEC180A DIGITAL SYSTEMS I Winter 2015

UNIVERSITY OF CALIFORNIA, DAVIS Department of Electrical and Computer Engineering. EEC180A DIGITAL SYSTEMS I Winter 2015 UNIVERSITY OF CALIFORNIA, DAVIS Department of Electrical and Computer Engineering EEC180A DIGITAL SYSTEMS I Winter 2015 LAB 1: Introduction to Quartus II Schematic Capture and ModelSim Simulation This

More information

The following content has been imported from Legacy Help systems and is in the process of being checked for accuracy.

The following content has been imported from Legacy Help systems and is in the process of being checked for accuracy. Processor Debug Old Content - visit altium.com/documentation Modified by Admin on Nov 6, 2013 The following content has been imported from Legacy Help systems and is in the process of being checked for

More information

NiceForm User Guide. English Edition. Rev Euro Plus d.o.o. & Niceware International LLC All rights reserved.

NiceForm User Guide. English Edition. Rev Euro Plus d.o.o. & Niceware International LLC All rights reserved. www.nicelabel.com, info@nicelabel.com English Edition Rev-0910 2009 Euro Plus d.o.o. & Niceware International LLC All rights reserved. www.nicelabel.com Head Office Euro Plus d.o.o. Ulica Lojzeta Hrovata

More information

EE261 Computer Project 1: Using Mentor Graphics for Digital Simulation

EE261 Computer Project 1: Using Mentor Graphics for Digital Simulation EE261 Computer Project 1: Using Mentor Graphics for Digital Simulation Introduction In this project, you will begin to explore the digital simulation tools of the Mentor Graphics package available on the

More information

and 32 bit for 32 bit. If you don t pay attention to this, there will be unexpected behavior in the ISE software and thing may not work properly!

and 32 bit for 32 bit. If you don t pay attention to this, there will be unexpected behavior in the ISE software and thing may not work properly! This tutorial will show you how to: Part I: Set up a new project in ISE 14.7 Part II: Implement a function using Schematics Part III: Simulate the schematic circuit using ISim Part IV: Constraint, Synthesize,

More information

1 Introduction to MARS

1 Introduction to MARS 1 Introduction to MARS 1.1 Objectives After completing this lab, you will: Get familiar with the MARS simulator Learn how to assemble, run, and debug a MIPS program 1.2 The MARS Simulator MARS, the MIPS

More information

2 Getting Started. Getting Started (v1.8.6) 3/5/2007

2 Getting Started. Getting Started (v1.8.6) 3/5/2007 2 Getting Started Java will be used in the examples in this section; however, the information applies to all supported languages for which you have installed a compiler (e.g., Ada, C, C++, Java) unless

More information

TLL5000 Electronic System Design Base Module

TLL5000 Electronic System Design Base Module TLL5000 Electronic System Design Base Module The Learning Labs, Inc. Copyright 2007 Manual Revision 2007.12.28 1 Copyright 2007 The Learning Labs, Inc. Copyright Notice The Learning Labs, Inc. ( TLL )

More information

ECSE-323 Digital System Design. Lab #1 Using the Altera Quartus II Software Fall 2008

ECSE-323 Digital System Design. Lab #1 Using the Altera Quartus II Software Fall 2008 1 ECSE-323 Digital System Design Lab #1 Using the Altera Quartus II Software Fall 2008 2 Introduction. In this lab you will learn the basics of the Altera Quartus II FPGA design software through following

More information

CHAPTER 1 GETTING STARTED

CHAPTER 1 GETTING STARTED GETTING STARTED WITH EXCEL CHAPTER 1 GETTING STARTED Microsoft Excel is an all-purpose spreadsheet application with many functions. We will be using Excel 97. This guide is not a general Excel manual,

More information

Impress Guide Chapter 11 Setting Up and Customizing Impress

Impress Guide Chapter 11 Setting Up and Customizing Impress Impress Guide Chapter 11 Setting Up and Customizing Impress This PDF is designed to be read onscreen, two pages at a time. If you want to print a copy, your PDF viewer should have an option for printing

More information

Quick Start Guide. ARIS Architect. Version 9.8 Service Release 2

Quick Start Guide. ARIS Architect. Version 9.8 Service Release 2 ARIS Architect Version 9.8 Service Release 2 October 2015 This document applies to ARIS Version 9.8 and to all subsequent releases. Specifications contained herein are subject to change and these changes

More information

The first time you open Word

The first time you open Word Microsoft Word 2010 The first time you open Word When you open Word, you see two things, or main parts: The ribbon, which sits above the document, and includes a set of buttons and commands that you use

More information

Tutorial on Quartus II Introduction Using Verilog Code

Tutorial on Quartus II Introduction Using Verilog Code Tutorial on Quartus II Introduction Using Verilog Code (Version 15) 1 Introduction This tutorial presents an introduction to the Quartus II CAD system. It gives a general overview of a typical CAD flow

More information

Using Synplify Pro, ISE and ModelSim

Using Synplify Pro, ISE and ModelSim Using Synplify Pro, ISE and ModelSim VLSI Systems on Chip ET4 351 Rene van Leuken Huib Lincklaen Arriëns Rev. 1.2 The EDA programs that will be used are: For RTL synthesis: Synplicity Synplify Pro For

More information

Tutorial: Working with Verilog and the Xilinx FPGA in ISE 9.2i

Tutorial: Working with Verilog and the Xilinx FPGA in ISE 9.2i Tutorial: Working with Verilog and the Xilinx FPGA in ISE 9.2i This tutorial will show you how to: Use Verilog to specify a design Simulate that Verilog design Define pin constraints for the FPGA (.ucf

More information

IT Essentials v6.0 Windows 10 Software Labs

IT Essentials v6.0 Windows 10 Software Labs IT Essentials v6.0 Windows 10 Software Labs 5.2.1.7 Install Windows 10... 1 5.2.1.10 Check for Updates in Windows 10... 10 5.2.4.7 Create a Partition in Windows 10... 16 6.1.1.5 Task Manager in Windows

More information

User s Manual CAP 531*1.5 Configuration and Programming tool

User s Manual CAP 531*1.5 Configuration and Programming tool User s Manual CAP 531*1.5 Configuration and Programming tool This manual belongs to: Contents Chapter Page About this manual 1 Introduction 3 Technical descriptions 81 References 177 Customer feedback

More information

Getting Started Guide. Chapter 3 Using Styles and Templates

Getting Started Guide. Chapter 3 Using Styles and Templates Getting Started Guide Chapter 3 Using Styles and Templates Copyright This document is Copyright 2005 2009 by its contributors as listed in the section titled Authors. You may distribute it and/or modify

More information

Océ Engineering Exec. Advanced Import and Index

Océ Engineering Exec. Advanced Import and Index Océ Engineering Exec Advanced Import and Index Océ-Technologies B.V. Copyright 2004, Océ-Technologies B.V. Venlo, The Netherlands All rights reserved. No part of this work may be reproduced, copied, adapted,

More information

University of Massachusetts Amherst Computer Systems Lab 1 (ECE 354) LAB 1 Reference Manual

University of Massachusetts Amherst Computer Systems Lab 1 (ECE 354) LAB 1 Reference Manual University of Massachusetts Amherst Computer Systems Lab 1 (ECE 354) LAB 1 Reference Manual Lab 1: Using NIOS II processor for code execution on FPGA Objectives: 1. Understand the typical design flow in

More information

Tools Basics. Getting Started with Renesas Development Tools R8C/3LX Family

Tools Basics. Getting Started with Renesas Development Tools R8C/3LX Family Getting Started with Renesas Development Tools R8C/3LX Family Description: The purpose of this lab is to allow a user new to the Renesas development environment to quickly come up to speed on the basic

More information

Getting Started (1.8.7) 9/2/2009

Getting Started (1.8.7) 9/2/2009 2 Getting Started For the examples in this section, Microsoft Windows and Java will be used. However, much of the information applies to other operating systems and supported languages for which you have

More information

EE 367 Logic Design Lab #1 Introduction to Xilinx ISE and the ML40X Eval Board Date: 1/21/09 Due: 1/28/09

EE 367 Logic Design Lab #1 Introduction to Xilinx ISE and the ML40X Eval Board Date: 1/21/09 Due: 1/28/09 EE 367 Logic Design Lab #1 Introduction to Xilinx ISE and the ML40X Eval Board Date: 1/21/09 Due: 1/28/09 Lab Description Today s lab will introduce you to the Xilinx Integrated Software Environment (ISE)

More information

Introduction. About this tutorial. How to use this tutorial

Introduction. About this tutorial. How to use this tutorial Basic Entry & not About this tutorial This tutorial consists of an introduction to creating simple circuits on an FPGA using a variety of methods. There are two ways to create the circuit: using or by

More information

_ V Intel 8085 Family In-Circuit Emulation. Contents. Technical Notes

_ V Intel 8085 Family In-Circuit Emulation. Contents. Technical Notes _ V9.12. 225 Technical Notes Intel 8085 Family In-Circuit Emulation This document is intended to be used together with the CPU reference manual provided by the silicon vendor. This document assumes knowledge

More information

Using Microsoft Word. Text Editing

Using Microsoft Word. Text Editing Using Microsoft Word A word processor is all about working with large amounts of text, so learning the basics of text editing is essential to being able to make the most of the program. The first thing

More information

Area Access Manager User Guide

Area Access Manager User Guide Area Access Manager User Guide Area Access Manager User Guide Table of Contents Chapter 1: Introduction...9 Conventions Used in this Documentation... 9 Getting Started... 10 Licensing Requirements...

More information

StarTeam File Compare/Merge StarTeam File Compare/Merge Help

StarTeam File Compare/Merge StarTeam File Compare/Merge Help StarTeam File Compare/Merge 12.0 StarTeam File Compare/Merge Help Micro Focus 575 Anton Blvd., Suite 510 Costa Mesa, CA 92626 Copyright 2011 Micro Focus IP Development Limited. All Rights Reserved. Portions

More information

2 Working with a Database

2 Working with a Database 2 Working with a Database In this chapter Working with a database: Overview 14 Creating a new database 15 Opening an existing database 19 Editing the setup of a database 21 Saving and deleting a database

More information

Quartus II Tutorial. September 10, 2014 Quartus II Version 14.0

Quartus II Tutorial. September 10, 2014 Quartus II Version 14.0 Quartus II Tutorial September 10, 2014 Quartus II Version 14.0 This tutorial will walk you through the process of developing circuit designs within Quartus II, simulating with Modelsim, and downloading

More information

5 Setting Preferences 15 Preferences 15 Configure Chart Colors 16

5 Setting Preferences 15 Preferences 15 Configure Chart Colors 16 CRITERION Vantage 3 Acquire Training Manual Contents 1 Introduction 3 Collecting Data 3 2 Starting the Program 3 Logging In and Logging Out 3 Logging In 3 Logging in as an Administrator 3 Logging in as

More information

Engineering 1630 Fall Simulating XC9572XL s on the ENGN1630 CPLD-II Board

Engineering 1630 Fall Simulating XC9572XL s on the ENGN1630 CPLD-II Board Engineering 1630 Fall 2016 Simulating XC9572XL s on the ENGN1630 CPLD-II Board You will use the Aldec Active-HDL software for the required timing simulation of the XC9572XL CPLD programmable logic chips

More information

Using the ispxpga Floorplanner

Using the ispxpga Floorplanner Using the ispxpga Floorplanner Table of Contents USING THE ISPXPGA FLOORPLANNER...3 Task 1: Open the Design...4 Task 2: Open a Floorplanner Design File...5 Task 3: Tour the Graphical User Interface - The

More information

Access 2003 Introduction to Report Design

Access 2003 Introduction to Report Design Access 2003 Introduction to Report Design TABLE OF CONTENTS CREATING A REPORT IN DESIGN VIEW... 3 BUILDING THE REPORT LAYOUT... 5 SETTING THE REPORT WIDTH... 5 DISPLAYING THE FIELD LIST... 5 WORKING WITH

More information

CROMWELLSTUDIOS. Content Management System Instruction Manual V1. Content Management System. V1

CROMWELLSTUDIOS. Content Management System Instruction Manual V1.   Content Management System. V1 Content Management System Instruction Manual V1 www.cromwellstudios.co.uk Cromwell Studios Web Services Content Management System Manual Part 1 Content Management is the system by which you can change

More information

EXCEL BASICS: MICROSOFT OFFICE 2007

EXCEL BASICS: MICROSOFT OFFICE 2007 EXCEL BASICS: MICROSOFT OFFICE 2007 GETTING STARTED PAGE 02 Prerequisites What You Will Learn USING MICROSOFT EXCEL PAGE 03 Opening Microsoft Excel Microsoft Excel Features Keyboard Review Pointer Shapes

More information

TLL5000 Electronic System Design Base Module. Getting Started Guide, Ver 3.4

TLL5000 Electronic System Design Base Module. Getting Started Guide, Ver 3.4 TLL5000 Electronic System Design Base Module Getting Started Guide, Ver 3.4 COPYRIGHT NOTICE The Learning Labs, Inc. ( TLL ) All rights reserved, 2008 Reproduction in any form without permission is prohibited.

More information

MockupScreens - User Guide

MockupScreens - User Guide MockupScreens - User Guide Contents 1. Overview...4 2. Getting Started...5 Installing the software... 5 Registering... 9 3. Understanding the Interface...11 Menu Bar... 11 Tool bar... 14 Elements... 14

More information

The Fundamentals. Document Basics

The Fundamentals. Document Basics 3 The Fundamentals Opening a Program... 3 Similarities in All Programs... 3 It's On Now What?...4 Making things easier to see.. 4 Adjusting Text Size.....4 My Computer. 4 Control Panel... 5 Accessibility

More information

SCHEMATIC DESIGN IN QUARTUS

SCHEMATIC DESIGN IN QUARTUS SCHEMATIC DESIGN IN QUARTUS Consider the design of a three-bit prime number detector. Figure 1 shows the block diagram and truth table. The inputs are binary signals A, B, and C while the output is binary

More information

Actel Libero TM Integrated Design Environment v2.3 Structural Schematic Flow Design Tutorial

Actel Libero TM Integrated Design Environment v2.3 Structural Schematic Flow Design Tutorial Actel Libero TM Integrated Design Environment v2.3 Structural Schematic Flow Design Tutorial 1 Table of Contents Design Flow in Libero TM IDE v2.3 Step 1 - Design Creation 3 Step 2 - Design Verification

More information

Word - Basics. Course Description. Getting Started. Objectives. Editing a Document. Proofing a Document. Formatting Characters. Formatting Paragraphs

Word - Basics. Course Description. Getting Started. Objectives. Editing a Document. Proofing a Document. Formatting Characters. Formatting Paragraphs Course Description Word - Basics Word is a powerful word processing software package that will increase the productivity of any individual or corporation. It is ranked as one of the best word processors.

More information

Introduction. Key features and lab exercises to familiarize new users to the Visual environment

Introduction. Key features and lab exercises to familiarize new users to the Visual environment Introduction Key features and lab exercises to familiarize new users to the Visual environment January 1999 CONTENTS KEY FEATURES... 3 Statement Completion Options 3 Auto List Members 3 Auto Type Info

More information

Quartus II Introduction Using Verilog Design

Quartus II Introduction Using Verilog Design Quartus II Introduction Using Verilog Design This tutorial presents an introduction to the Quartus R II CAD system. It gives a general overview of a typical CAD flow for designing circuits that are implemented

More information

Xilinx Tutorial Basic Walk-through

Xilinx Tutorial Basic Walk-through Introduction to Digital Logic Design with FPGA s: Digital logic circuits form the basis of all digital electronic devices. FPGAs (Field Programmable Gate Array) are large programmable digital electronic

More information

Introduction to MS Word XP 2002: An Overview

Introduction to MS Word XP 2002: An Overview Introduction to MS Word XP 2002: An Overview Sources Used: http://www.fgcu.edu/support/office2000/word/files.html Florida Gulf Coast University Technology Skills Orientation Word 2000 Tutorial The Computer

More information

This chapter introduces how to use the emulator of TOPICE quickly.

This chapter introduces how to use the emulator of TOPICE quickly. Quick Starting Summarization This chapter introduces how to use the emulator of TOPICE quickly. Compiling Source and Debugging Creating a New Project Select main menu Project, then choose the submenu New

More information

Bold, Italic and Underline formatting.

Bold, Italic and Underline formatting. Using Microsoft Word Character Formatting You may be wondering why we have taken so long to move on to formatting a document (changing the way it looks). In part, it has been to emphasise the fact that

More information

Forms/Distribution Acrobat X Professional. Using the Forms Wizard

Forms/Distribution Acrobat X Professional. Using the Forms Wizard Forms/Distribution Acrobat X Professional Acrobat is becoming a standard tool for people and businesses to use in order to replicate forms and have them available electronically. If a form is converted

More information

Learning Worksheet Fundamentals

Learning Worksheet Fundamentals 1.1 LESSON 1 Learning Worksheet Fundamentals After completing this lesson, you will be able to: Create a workbook. Create a workbook from a template. Understand Microsoft Excel window elements. Select

More information

Included with the system is a high quality speech synthesizer, which is installed automatically during the SymWord setup procedure.

Included with the system is a high quality speech synthesizer, which is installed automatically during the SymWord setup procedure. Introduction to SymWord SymWord is a simple to use, talking, symbol-word processor. It has the basic functionality of a word processor. SymWord can also be configured to produce speech and/or display text

More information

Introductory Excel Walpole Public Schools. Professional Development Day March 6, 2012

Introductory Excel Walpole Public Schools. Professional Development Day March 6, 2012 Introductory Excel 2010 Walpole Public Schools Professional Development Day March 6, 2012 By: Jessica Midwood Agenda: What is Excel? How is Excel 2010 different from Excel 2007? Basic functions of Excel

More information

OU EDUCATE TRAINING MANUAL

OU EDUCATE TRAINING MANUAL OU EDUCATE TRAINING MANUAL OmniUpdate Web Content Management System El Camino College Staff Development 310-660-3868 Course Topics: Section 1: OU Educate Overview and Login Section 2: The OmniUpdate Interface

More information

PART 7. Getting Started with Excel

PART 7. Getting Started with Excel PART 7 Getting ed with Excel When you start the application, Excel displays a blank workbook. A workbook is a file in which you store your data, similar to a three-ring binder. Within a workbook are worksheets,

More information

Project Debugging with MDK-ARM

Project Debugging with MDK-ARM Project Debugging with MDK-ARM Notes: This document assumes MDK-ARM Version 5.xx (µvision5 ) is installed with the required ST-Link USB driver, device family pack (STM32F4xx for STM32F4-Discovery board;

More information

ARIS Architect QUICK START GUIDE. Version Service Release 7

ARIS Architect QUICK START GUIDE. Version Service Release 7 ARIS Architect QUICK START GUIDE Version 9.8 - Service Release 7 December 2016 This document applies to ARIS Version 9.8 and to all subsequent releases. Specifications contained herein are subject to change

More information

Introducing Gupta Report Builder

Introducing Gupta Report Builder Business Reporting Chapter 1 Introducing Gupta Report Builder You can use Report Builder to design reports. This chapter describes: Our approach to building reports. Some of the reports you can build.

More information

Quartus II Version 14.0 Tutorial Created September 10, 2014; Last Updated January 9, 2017

Quartus II Version 14.0 Tutorial Created September 10, 2014; Last Updated January 9, 2017 Quartus II Version 14.0 Tutorial Created September 10, 2014; Last Updated January 9, 2017 This tutorial will walk you through the process of developing circuit designs within Quartus II, simulating with

More information

Contents. Launching Word

Contents. Launching Word Using Microsoft Office 2007 Introduction to Word Handout INFORMATION TECHNOLOGY SERVICES California State University, Los Angeles Version 1.0 Winter 2009 Contents Launching Word 2007... 3 Working with

More information

Sample A2J Guided Interview & HotDocs Template Exercise

Sample A2J Guided Interview & HotDocs Template Exercise Sample A2J Guided Interview & HotDocs Template Exercise HotDocs Template We are going to create this template in HotDocs. You can find the Word document to start with here. Figure 1: Form to automate Converting

More information

ECE 3610 Microprocessing Systems Lab #1 Verilog Design of the TOC Using Quartus II

ECE 3610 Microprocessing Systems Lab #1 Verilog Design of the TOC Using Quartus II ECE 3610 Microprocessing Systems Lab #1 Verilog Design of the TOC Using Quartus II This lab manual presents an introduction to the Quartus II Computer Aided Design (CAD) system. This manual gives step-by-step

More information

EET2141 Project 2: Binary Adder Using Xilinx 7.1i Due Friday April 25

EET2141 Project 2: Binary Adder Using Xilinx 7.1i Due Friday April 25 EET2141 Project 2: Binary Adder Using Xilinx 7.1i Due Friday April 25 Introduction This Xilinx project introduces the characteristics of the ripple carry adder. From the last project, you learned that

More information

Using the KD30 Debugger

Using the KD30 Debugger ELEC3730 Embedded Systems Tutorial 3 Using the KD30 Debugger 1 Introduction Overview The KD30 debugger is a powerful software tool that can greatly reduce the time it takes to develop complex programs

More information

Tutorial: Pattern Wizard

Tutorial: Pattern Wizard University of Pennsylvania Department of Electrical and Systems Engineering Digital Design Laboratory Tutorial: Pattern Wizard When assigning values to a bus in Xilinx during the behavioral simulation,

More information

Section 1 AVR Studio User Guide

Section 1 AVR Studio User Guide Section 1 AVR Studio User Guide 1.1 Introduction Welcome to AVR Studio from Atmel Corporation. AVR Studio is a Development Tool for the AVR family of microcontrollers. This manual describes the how to

More information

WELCOME TO ALL-TECH SYSTEMS & CO INTRODUCTION TO MICROSOFT WORD TUTORIAL

WELCOME TO ALL-TECH SYSTEMS & CO INTRODUCTION TO MICROSOFT WORD TUTORIAL WELCOME TO ALL-TECH SYSTEMS & CO INTRODUCTION TO MICROSOFT WORD TUTORIAL 1 Microsoft Office Word 2010 allows you to create and edit personal and business documents, such as letters, reports, invoices,

More information

TECH-NOTE. The Keyboard Macro Editor. The Keyboard Macro Editor Dialog Box

TECH-NOTE. The Keyboard Macro Editor. The Keyboard Macro Editor Dialog Box The Keyboard Macro Editor The Keyboard Macro Editor is a feature in the Designer TM for Windows TM software package that allows the user to associate specific functions with keys or touchcells on a UniOP

More information

Open Book Format.docx. Headers and Footers. Microsoft Word Part 3 Office 2016

Open Book Format.docx. Headers and Footers. Microsoft Word Part 3 Office 2016 Microsoft Word Part 3 Office 2016 Open Book Format.docx Headers and Footers If your document has a page number, you already have a header or footer (and can double click on it to open it). If you did not

More information

Computer Essentials Session 1 Lesson Plan

Computer Essentials Session 1 Lesson Plan Note: Completing the Mouse Tutorial and Mousercise exercise which are available on the Class Resources webpage constitutes the first part of this lesson. ABOUT PROGRAMS AND OPERATING SYSTEMS Any time a

More information

Autodesk Inventor Design Exercise 2: F1 Team Challenge Car Developed by Tim Varner Synergis Technologies

Autodesk Inventor Design Exercise 2: F1 Team Challenge Car Developed by Tim Varner Synergis Technologies Autodesk Inventor Design Exercise 2: F1 Team Challenge Car Developed by Tim Varner Synergis Technologies Tim Varner - 2004 The Inventor User Interface Command Panel Lists the commands that are currently

More information

Exhibitor Software User s Manual. Exhibitor Software V

Exhibitor Software User s Manual. Exhibitor Software V Exhibitor Software User s Manual Exhibitor Software V1.0.1 090908 1 Contents 1. Exhibitor Software 2. Installation 3. Using Exhibitor Program 3.1 Starting the Program 3.2 Logging in to the Program 3.3

More information

Creating Reports in Access 2007 Table of Contents GUIDE TO DESIGNING REPORTS... 3 DECIDE HOW TO LAY OUT YOUR REPORT... 3 MAKE A SKETCH OF YOUR

Creating Reports in Access 2007 Table of Contents GUIDE TO DESIGNING REPORTS... 3 DECIDE HOW TO LAY OUT YOUR REPORT... 3 MAKE A SKETCH OF YOUR Creating Reports in Access 2007 Table of Contents GUIDE TO DESIGNING REPORTS... 3 DECIDE HOW TO LAY OUT YOUR REPORT... 3 MAKE A SKETCH OF YOUR REPORT... 3 DECIDE WHICH DATA TO PUT IN EACH REPORT SECTION...

More information

Getting Started Guide. Chapter 3 Using Styles and Templates

Getting Started Guide. Chapter 3 Using Styles and Templates Getting Started Guide Chapter 3 Using Styles and Templates Copyright This document is Copyright 2010 by its contributors as listed below. You may distribute it and/or modify it under the terms of either

More information

3 TUTORIAL. In This Chapter. Figure 1-0. Table 1-0. Listing 1-0.

3 TUTORIAL. In This Chapter. Figure 1-0. Table 1-0. Listing 1-0. 3 TUTORIAL Figure 1-0. Table 1-0. Listing 1-0. In This Chapter This chapter contains the following topics: Overview on page 3-2 Exercise One: Building and Running a C Program on page 3-4 Exercise Two:

More information

13-1. This chapter explains how to use different objects.

13-1. This chapter explains how to use different objects. 13-1 13.Objects This chapter explains how to use different objects. 13.1. Bit Lamp... 13-3 13.2. Word Lamp... 13-5 13.3. Set Bit... 13-10 13.4. Set Word... 13-13 13.5. Function Key... 13-21 13.6. Toggle

More information

Getting started with the Xilinx Project Navigator and the Digilent BASYS 2 board.

Getting started with the Xilinx Project Navigator and the Digilent BASYS 2 board. Getting started with the Xilinx Project Navigator and the Digilent BASYS 2 board. This lab is based on: Xilinx Project Navigator, Release Version 14.6 Digilent Adept System Rev 2.7, Runtime Rev 2.16 Digilent

More information

Introduction. SSH Secure Shell Client 1

Introduction. SSH Secure Shell Client 1 SSH Secure Shell Client 1 Introduction An SSH Secure Shell Client is a piece of software that allows a user to do a number of functions. Some of these functions are: file transferring, setting permissions,

More information

Quick Start Guide. ARIS Architect. Version 9.7

Quick Start Guide. ARIS Architect. Version 9.7 ARIS Architect Version 9.7 October 2014 This document applies to ARIS Version 9.7 and to all subsequent releases. Specifications contained herein are subject to change and these changes will be reported

More information

Tutorial on Quartus II Introduction Using Schematic Designs

Tutorial on Quartus II Introduction Using Schematic Designs Tutorial on Quartus II Introduction Using Schematic Designs (Version 15) 1 Introduction This tutorial presents an introduction to the Quartus II CAD system. It gives a general overview of a typical CAD

More information

SolidWorks Intro Part 1b

SolidWorks Intro Part 1b SolidWorks Intro Part 1b Dave Touretzky and Susan Finger 1. Create a new part We ll create a CAD model of the 2 ½ D key fob below to make on the laser cutter. Select File New Templates IPSpart If the SolidWorks

More information

Microsoft Word Part I Reference Manual

Microsoft Word Part I Reference Manual Microsoft Word 2002 Part I Reference Manual Instructor: Angela Sanderson Computer Training Coordinator Updated by: Angela Sanderson January 11, 2003 Prepared by: Vi Johnson November 20, 2002 THE WORD SCREEN

More information

Aurora Multi-image System Control Software. User Manual

Aurora Multi-image System Control Software. User Manual Aurora Multi-image System Control Software User Manual Product Information Model: Aurora Controller Software Version: V010200 Release Date: January 18th, 2017 Company OSEE TECHNOLOGY CO., LTD. Contact

More information

CHAPTER 1 COPYRIGHTED MATERIAL. Getting to Know AutoCAD. Opening a new drawing. Getting familiar with the AutoCAD and AutoCAD LT Graphics windows

CHAPTER 1 COPYRIGHTED MATERIAL. Getting to Know AutoCAD. Opening a new drawing. Getting familiar with the AutoCAD and AutoCAD LT Graphics windows CHAPTER 1 Getting to Know AutoCAD Opening a new drawing Getting familiar with the AutoCAD and AutoCAD LT Graphics windows Modifying the display Displaying and arranging toolbars COPYRIGHTED MATERIAL 2

More information

U90 Ladder Software Manual. Version 3.50, 6/03

U90 Ladder Software Manual. Version 3.50, 6/03 U90 Ladder Software Manual Version 3.50, 6/03 Table Of Contents Welcome to U90 Ladder... 1 Program Editors... 1 Project Navigation Tree...1 Browse Sequences...1 Printing Documentation...2 Interface Language...

More information

An Introduction to Komodo

An Introduction to Komodo An Introduction to Komodo The Komodo debugger and simulator is the low-level debugger used in the Digital Systems Laboratory. Like all debuggers, Komodo allows you to run your programs under controlled

More information

Guide to User Interface 4.3

Guide to User Interface 4.3 Datatel Colleague Guide to User Interface 4.3 Release 18 June 24, 2011 For corrections and clarifications to this manual, see AnswerNet page 1926.37. Guide to User Interface 4.3 All Rights Reserved The

More information

Lesson 2 Quick Tour and Features

Lesson 2 Quick Tour and Features Lesson 2 Quick Tour and Features Objectives Students will format a document page. Students will use a spell-checker. Students will copy, cut, and paste text. Students will adjust paragraph indentations.

More information

NiceLabel Designer Standard User Guide

NiceLabel Designer Standard User Guide NiceLabel Designer Standard User Guide English Edition Rev-1112 2012 Euro Plus d.o.o. All rights reserved. Euro Plus d.o.o. Poslovna cona A 2 SI-4208 Šenčur, Slovenia tel.: +386 4 280 50 00 fax: +386 4

More information

Access Intermediate

Access Intermediate Access 2013 - Intermediate 103-134 Advanced Queries Quick Links Overview Pages AC124 AC125 Selecting Fields Pages AC125 AC128 AC129 AC131 AC238 Sorting Results Pages AC131 AC136 Specifying Criteria Pages

More information

GraphWorX64 Productivity Tips

GraphWorX64 Productivity Tips Description: Overview of the most important productivity tools in GraphWorX64 General Requirement: Basic knowledge of GraphWorX64. Introduction GraphWorX64 has a very powerful development environment in

More information

Start by launching Mozilla To start making a web page, go to File -> New -> Composer Page

Start by launching Mozilla To start making a web page, go to File -> New -> Composer Page Creating a Web Page using Mozilla Composer- A Free Open Source Application Emily Hebard IT Lab School of Information University of Texas at Austin Spring 2003 Objectives Orient to the Mozilla Composer

More information

Area Access Manager User Guide

Area Access Manager User Guide Area Access Manager User Guide PERPETUAL INNOVATION Lenel OnGuard 2012 Area Access Manager User Guide, product version 6.5 This guide is part 2 of a 2-document suite, item number DOC-800, revision 2.003,

More information

Netlist Viewer User's Guide

Netlist Viewer User's Guide Netlist Viewer User's Guide 1 Netlist Viewer User's Guide Table Of Contents Viewing Your Netlist...3 Starting NetlistViewer...3 NetlistViewer...4 Navigation...6 Menu Commands...7 Starting MultiView Navigator...9

More information

Calendar & Buttons Dashboard Menu Features My Profile My Favorites Watch List Adding a New Request...

Calendar & Buttons Dashboard Menu Features My Profile My Favorites Watch List Adding a New Request... remitview User Guide 1 TABLE OF CONTENTS INTRODUCTION... 3 Calendar & Buttons... 3 GETTING STARTED.... 5 Dashboard.... 7 Menu Features... 8 PROFILE.... 10 My Profile... 10 My Favorites... 12 Watch List...

More information

How to Get Started. Figure 3

How to Get Started. Figure 3 Tutorial PSpice How to Get Started To start a simulation, begin by going to the Start button on the Windows toolbar, then select Engineering Tools, then OrCAD Demo. From now on the document menu selection

More information

PCB List Panel. Contents

PCB List Panel. Contents PCB List Panel Contents Function Content and Use Defining Panel Display Scope Working with Filtered Objects Displaying Workspace Selection Displaying Filtering Results Using the Panel to Select Objects

More information

Word 2013 Beginning. Technology Integration Center

Word 2013 Beginning. Technology Integration Center Word 2013 Beginning Getting Started... 2 Quick Access Toolbar... 3 The Ribbon... 3 Help... 4 Compatibility Mode... 4 Document Views... 4 Navigating the Document... 5 Moving Around in the Document... 5

More information

Impress Guide. Chapter 11 Setting Up and Customizing Impress

Impress Guide. Chapter 11 Setting Up and Customizing Impress Impress Guide Chapter 11 Setting Up and Customizing Impress Copyright This document is Copyright 2007 2013 by its contributors as listed below. You may distribute it and/or modify it under the terms of

More information