Technical Note. Booting from Embedded MMC (e.mmc) Introduction. TN-FC-06: Booting from Embedded MMC. Introduction

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1 Technical Note Booting from Embedded MMC (e.mmc) Introduction Introduction This technical note describes the features of booting a system (such as a wireless or embedded platform) from an embedded MultiMediaCard (e.mmc) device. In particular, this document discusses the boot capabilities of the emmc 4.41 and above, and it explains how to: Configure an e.mmc device to have the required booting features Program and verify boot code on an e.mmc device Perform a boot operation to send boot data to the host Configure the boot area parameters using emmcparm 1 Products and specifications discussed herein are subject to change by Micron without notice.

2 e.mmc Boot Features e.mmc Boot Features The e.mmc enables the MMC host to boot a system (read boot code and data) by sending a special command sequence to the device at the right time. This section describes the boot features provided by the e.mmc specification and the correct sequence of steps for implementing them. Boot Partitions The e.mmc specifications provide two basic logical areas, called boot partitions, dedicated to boot operations. Boot partition size is calculated as follows: Boot partition size = 128KB x BOOT_SIZE_MULT where BOOT_SIZE_MULT is the value in EXT_CSD register byte [226]. Therefore: Minimum boot partition size = 128KB x 1 = 128KB Maximum boot partition size = 128KB x 255 = 32,640KB BOOT_SIZE_MULT = 0x00: No boot partition available/boot mode not supported Figure 1: Boot Partitions 0x x Boot area partition 1 User area Maximum boot partition size 0x Boot area partition 2 Maximum boot partition size The host can also choose to boot the device from the user area; however, note that: Saving boot data in the user area reduces the space dedicated to the user. Wear leveling works on boot data saved in the user area together with other user area data. Boot partitions are pslc, and the user area is MLC (even if it is configurable as pslc). Latency is lower when booting from the boot partition than from the user area. The partition from which the host will read the boot data can be selected in advance using the PARTITION_CONFIG register by setting bits [5:3] (see the PARTITION_CON- FIG register (EXT_CSD [179]) section). 2

3 Pre-Boot and Boot State e.mmc Boot Features The boot operation can be started only if the device is in pre-boot state, which is entered after the device has gone through pre-idle state. Figure 2: MultiMediaCard State Diagram (Boot Mode) Powerup RST signal From all states except inactive state (ina) Pre-idle state (preidle) CMD0 with argument = 0xF0F0F0F0 From all states except inactive state (ina) BOOT_PARTITION_ENABLE bit set Pre-boot state (preboot) Boot sequence not supported or BOOT_PARTITION_ENABLE bit clear CMD signal LOW for 74 or more clock cycles, or CMD0 with argument = 0xFFFFFFFA CMD signal LOW for fewer than 74 clock cycles Boot state (boot) Boot mode CMD signal HIGH with argument = 0x or completion of the boot operation (data in the whole boot area has been read out) Boot bus conditions retained if RESET_BOOT_BUS_CONDITIONS is set to retain Default bus conditions SDR, x1 Card identification mode Device is busy or host omitted voltage range Idle state (idle) CMD1 CMD0 with argument = 0x Inactive state (ina) From all states except inactive state (ina) CMD15 Default bus conditions SDR, x1 3

4 The device can be set in pre-idle state by: Powering-on Asserting the RST_n signal (hardware reset) Issuing the GO_PRE_IDLE_STATE command (CMD0 with argument 0xF0F0F0F0 the software reset command) After one of these points, the card s output bus drivers are in high impedance state, and the card is initialized with a default relative card address (0x0001). When the device is in pre-idle state: e.mmc Boot Features If the e.mmc does not support boot mode, or its BOOT_PARTITION_ENABLE bit is cleared, the e.mmc moves immediately to the idle state. If the BOOT_PARTITION_ENABLE bit is set, the e.mmc moves to the pre-boot state. The e.mmc enters the boot state if the device is in pre-boot state and, before issuing CMD1: The CMD line is held low for 74 clock cycles or more (boot operation), or The host issues a CMD0 with argument 0xFFFFFFFA (alternative boot operation). The two kinds of boot operations are described in detail in the Booting a System from an e.mmc Device section. If the CMD line is held LOW for fewer than 74 clock cycles after power-up before issuing CMD1, or the host sends any normal MMC command other than CMD1 and CMD0 with argument 0xFFFFFFFA before initiating boot mode, the slave will not respond, will be locked out of boot mode until the next power-cycle or hardware reset, and will enter the idle state. When BOOT_PARTITION_ENABLE bits are set, and the host sends CMD1 (SEND_OP_COND), the device must enter e.mmc identification mode and respond to the command. Boot Bus Width The bus width during the boot operation can be configured by setting nonvolatile bits [1:0] in the BOOT_BUS_CONDITIONS (before BOOT_BUS_WIDTH) register EXT_CSD [177]. This register is used to: Set up the bus width (x1, x4, x8) Reset bus width to x1 after boot operation Choose between single data rate (two possible timings) and dual data rate If the boot operation in not executed, the device will be configured in normal bus width x1, single data rate operation, and backward-compatible timing, regardless of the register settings. 4

5 Boot Partition Write Protection The e.mmc supports two levels of protection against erase or write for the boot area: Permanently write-protected Power-on write-protected e.mmc Boot Features These protections can be enabled/disabled by setting the BOOT_WP register (see the BOOT_WP Register (EXT_CSD [173]) section). If boot-area protections are not required, they should be disabled in order to prevent malicious or unintentional protection. When using power-on write protection for the boot area, the host must be aware of the following: After a power-failure event that causes the device to reboot occurs, or a hardware reset occurs, the boot area returns to the unprotected state, and, if required, the poweron write protection must be set again. Setting both protections permanently protects the boot area. Therefore, if permanent protection is not required, the BOOT_WP register should be set in order to avoid malicious or unintentional permanent protection. 5

6 Configuring e.mmc Boot Features The e.mmc registers can be configured to implement the specific boot features required by the host. PARTITION_CONFIG Register (EXT_CSD [179]) Table 1: Boot Configuration Byte This register defines the configuration for partitions. Bit Configuring e.mmc Boot Features Reserved BOOT_ACK BOOT_PARTITION_ENABLE PARTITION_ACCESS R/W/E R/W/E R/W/E_P Notes: 1. Bit[7]: Reserved 2. Bit[6]: BOOT_ACK Enables boot acknowledgement 0x0: No boot acknowledge sent (default) 0x1: Boot acknowledge sent during boot operation 3. Bit[5:3]: BOOT_PARTITION_ENABLE Selects the partition from which the host will read the boot data 0x0: Device is not boot-enabled (default). 0x1: Boot from boot partition 1 0x2: Boot from boot partition 2 0x3 0x6: Reserved 0x7: Boot from user area 4. Bit[2:0]: PARTITION_ACCESS Selects boot partition for read/write accesses while in the transfer state 0x0: No access to boot partition (default) 0x1: R/W boot partition 1 0x2: R/W boot partition 2 0x3: R/W replay-protected memory block (RPMB) 0x4: Access to general-purpose partition 1 0x5: Access to general-purpose partition 2 0x6: Access to general-purpose partition 3 0x7: Access to general-purpose partition 4 6

7 BOOT_INFO Register (EXT_CSD [228]) Table 2: Boot Information This register provides information about boot operations. Bit Notes: Reserved Configuring e.mmc Boot Features HS_BOOT_ MODE DDR_BOOT_ MODE ALT_BOOT_ MODE 1. Bit[7:3]: Reserved 2. Bit[2]: HS_BOOT_MODE Information about high-speed timing during boot operations 0x0: Device does not support high-speed timing during boot. 0x1: Device supports high-speed timing during boot. 3. Bit[1]: DDR_BOOT_MODE Information about DDR during boot operations 0x0: Device does not support dual data rate during boot. 0x1: Device supports dual data rate during boot. 4. Bit[0]: ALT_BOOT_MODE Information about the alternate boot method 0x0: Device does not support alternative boot method (obsolete). 0x1: Device supports alternative boot method. Per the JEDEC v4.41 and above specifications, Bit[0] must be set to 1. The only currently valid values for this register are 0x0, 0x1, 0x05, and 0x07. A device that supports dual data rate mode during boot must also have bit 2 set. 7

8 BOOT_BUS_CONDITIONS (Before BOOT_BUS_WIDTH) Register (EXT_CSD [177]) Table 3: Boot Bus Configuration This register defines the bus width for boot operation. Bit Reserved BOOT_MODE RESET_BOOT_ BUS_CONDI- TIONS (before RESET_BOOT_ BUS_WIDTH) Configuring e.mmc Boot Features BOOT_BUS_WIDTH Notes: 1. Bit[7:5]: Reserved 2. Bit[4:3]: BOOT_MODE (nonvolatile) Sets single/dual date rate 0x0: Use single data rate + backward-compatible timings in boot operation (default) 0x1: Use single data rate + high-speed timings in boot operation mode 0x2: Use dual data rate in boot operation 0x3: Reserved 3. Bit[2]: RESET_BOOT_BUS_CONDITIONS (before RESET_BOOT_BUS_WIDTH) (nonvolatile) Resets bus width to x1 0x0: Reset bus width to x1, single data rate and backward-compatible timings after boot operation (default) 0x1: Retain BOOT_BUS_WIDTH and BOOT_MODE after boot operation (relevant to push-pull mode operation only) 4. Bit[1:0]: BOOT_BUS_WIDTH (nonvolatile) Configures bus width during boot operation 0x0: x1 (SDR) or x4 (DDR) bus width in boot operation mode (default) 0x1: x4 (SDR/DDR) bus width in boot operation mode 0x2: x8 (SDR/DDR) bus width in boot operation mode 0x3: Reserved 8

9 BOOT_WP Register (EXT_CSD [173]) Table 4: Boot Area Write Protection This register allows the host to apply permanent or power-on write protection to the boot area. Also, the register allows the master to disable either power-on or permanent write protection or both. The default state of the bits is 0. Bit See notes 1, 2 B_PWR_WP_ DIS Reserved B_PERM_WP_ DIS Configuring e.mmc Boot Features See notes 6, 7 B_PERM_WP_ EN See notes 9, 10 B_PWR_WP_ EN R/W/C_P R/W R/W R/W/C_P Notes: 1. Bit[7]: Reserved (e.mmc 4.41) 2. Bit[7]: B_SEC_WP_SEL (R/W/C_P) (e.mmc 4.51 and above) Enables/disables a mix of permanent protect and power on protected boot partitions. 0x0: B_PERM_WP_EN (bit2) and B_PWR_WP_EN (bit 0) apply to both boot partitions, and B_PERM_WP_SEC_SEL (bit 3) and B_PWR_WP_SEC_SEL (bit 1) have no impact. 0x1: B_PERM_WP_EN (bit2) and B_PWR_WP_EN (bit 0) apply to only boot partitions selected by B_PERM_WP_SEC_SEL (bit 3) and B_PWR_WP_SEC_SEL (bit 1) respectively. 3. Bit[6]: B_PWR_WP_DIS Enables/disables use of B_PWR_WP_EN (bit 0). 0x0: The host can set B_PWR_WP_EN. 0x1: Disables use of B_PWR_WP_EN. Must be 0 if B_PWR_WP_EN is set. 4. Bit[5]: Reserved 5. Bit[4]: B_PERM_WP_DIS Enables/disables use of B_PERM_WP_EN (bit 2). 0x0: The host can set B_PERM_WP_EN. 0x1: Disables use of B_PERM_WP_EN. Must be 0 if B_PERM_WP_EN is set. This bit has no impact on the setting of the CSD[13] bit (PERM_WRITE_PROTECT), which if set, permanently protects the whole card (boot, RPMB, and user area) content against overwriting or erasing. 6. Bit[3]: Reserved (e.mmc 4.41) 7. Bit[3]: B_PERM_WP_SEC_SEL(R/W/C_P) (e.mmc 4.51 and above) - Selects which boot partition the bit B_PERM_WP_EN applies to. 0x0: B_PERM_WP_EN (bit 2) applies to boot area 1 only, if B_SEC_WP_SEL (bit 7 is set). 0x1: B_PERM_WP_EN (bit 2) applies to boot area 2 only, if B_SEC_WP_SEL (bit 7 is set). 8. Bit[2]: B_PERM_WP_EN Sets permanent write protection 0x0: Boot region is not permanently write-protected. 0x1: Boot region is permanently write-protected. Must be 0 if B_PERM_WP_DIS is set. Indicates if permanent protection has been set specifically for the boot region. This bit may be 0 if the whole card is permanently protected using CSD[13]. 9. Bit[1]: Reserved (e.mmc 4.41) 10. Bit[1]: B_PWR_WP_SEC_SEL(R/W/C_P) (e.mmc 4.51 and above) Selects which boot partition the bit B_PWR_WP_EN applies to. 0x0: B_PWR_WP_EN(Bit 0) applies to boot area 1 only, if B_SEC_WP_SEL (bit 7 is set). 0x1: B_PWR_WP_EN(Bit 0) applies to boot area 2 only, if B_SEC_WP_SEL (bit 7 is set). 11. Bit[0]: B_PWR_WP_EN Sets power-on write protection: 9

10 Configuring e.mmc Boot Features 0x0: Boot region is not power-on write-protected. 0x1: Boot region is write-protected during power-on period. Must be 0 if B_PWR_WP_DIS (bit 6) is set. Indicates only if power-on protection has been set specifically for a boot region. How power-on protection is applied depends on the setting of bits 7 and 1. To verify boot region protection, read BOOT_WP_STA- TUS[174]. Attempting to set both the disable and enable bit for a given protection mode (permanent or power-on) in a single SWITCH command will have no impact. If both permanent and power-on protection are applied to the same partition(s), permanent protection will take precedence and the partition(s) will be permanently protected. If the host enables power-on write protection to a boot partition after enabling permanent write protection to the other boot area, the host shall set bit 3 to the same value as set for permanent write protection for the other boot partition. 10

11 Accessing e.mmc Boot Partitions The host accesses the boot partitions to program and then verify the boot code. To do this, the host implements the following steps: 1. Put the device into transfer state. 2. Send CMD6 (the SWITCH command) to set the PARTITION_ACCESS bits (see the PARTITION_CONFIG Register (EXT_CSD [179]) section). 3. Use normal e.mmc READ/WRITE commands to access a boot partition. After data access to the boot partition is finished, implement these steps to permit the device to read data from the boot partition during boot operation: 1. Clear the PARTITION_ACCESS bits. 2. Set the nonvolatile BOOT_PARTITION_ENABLE bits to indicate from which partition the host will read the boot data. Issue a hardware or software RESET command. Accessing e.mmc Boot Partitions By clearing the PARTITION_ACCESS bits, the host can also access the user area using e.mmc READ/WRITE commands. If the user area is locked and enabled for boot, data will not be sent out to the host during boot operation mode. However, if the user area is locked, and one of the two boot partitions is enabled, data will be sent out to the host during boot operation mode. 11

12 Booting a System From an e.mmc Device Booting a System From an e.mmc Device Two kinds of boot operations are possible for e.mmc devices boot operation and alternative boot operation. Boot Operation To start a boot operation, the host must hold the CMD line low for 74 clock cycles or more after power-up or reset operation before CMD1 is issued; the device then recognizes the sequence and starts preparing boot data internally. The system must start the boot operation within one second after the CMD line has gone LOW. The boot operation consists of sending boot data to the host on the DAT line(s). The host must keep the CMD line LOW to read all boot data; it must use pushpull mode until boot operation is terminated. Note that, instead of being one second, the maximum initialization timeout for the first power-on after partitioning is calculated from INI_TIMEOUT_AP (ECSD register byte 241). This timeout applies only for the first initialization after successful partitioning. For all subsequent initializations, a one-second timeout applies (like in the case of a nonpartitioned e.mmc device). Setting the PARTITION_CONFIG register enables the host to receive boot acknowledgment; in this way, the host can recognize when the slave is in boot mode. In fact, if boot acknowledge is enabled, the device sends an ACK sequence (0-1-0) to the host on the DAT line before starting to send boot data. Note that the ACK sequence must be sent to the host within 50ms after the CMD line goes LOW. Boot operation will terminate when all boot data of the enabled partition is sent to the host. To stop boot mode, the host can raise the CMD line. If this is done during DATA/ACK transfer, the device has to terminate the transfer within two clock cycles (one data cycle and one end-bit cycle). If this is done between consecutive blocks, the device must release the data line(s) in two clock cycles. After the host has released the CMD line, the host must wait at least 56 clock cycles before starting a normal MMC sequence by sending CMD1. 12

13 Booting a System From an e.mmc Device Figure 3: Boot Operation MIN 74 clock cycles Boot request recognized CMD ACK (optional) Init CMDs DAT S 010 E S 512B CRC E S 512B CRC E 50ms (MAX) 1s (MAX) Boot code and data MIN 56 clock cycles Boot request Alternative Boot Operation After power-up or reset operation, if the host issues CMD0 with the argument of 0xFFFFFFFA after 74 clock cycles or more before CMD1 is issued or before the CMD line goes low, the device recognizes the sequence and starts preparing boot data internally. The system must start the alternative boot operation within one second after CMD0 with the argument of 0xFFFFFFFA is issued. The boot operation consists of sending boot data to the host on the DAT line(s). The host must use push-pull mode until boot operation is terminated. As with a boot operation, instead of being one second, the maximum initialization timeout for the first power-on after partitioning is calculated from INI_TIMEOUT_AP (ECSD register byte 241). It is also possible to enable boot acknowledge, and the process is the same as for a boot operation. If boot acknowledge is enabled, the ACK sequence must be sent to the host within 50ms after CMD0 with the argument of 0xFFFFFFFA is received. The boot operation will terminate when all boot data of the enabled partition is sent to the host. To stop boot mode, the host can issue CMD0 (RESET command). If this is done during DATA/ACK transfer or between consecutive blocks, the process is the same as for boot operation. 13

14 Booting a System From an e.mmc Device Figure 4: Alternative Boot Operation Minimum 74 clock cycles Boot request recognized required after power Boot reset is stable CMD CMD0 1 Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z CMD0 DAT ACK (optional) S 010 E S 512B CRC E S 512B CRC E Init CMDs 50ms (MAX) 1s (MAX) Boot code and data MIN 56 clock cycles Boot request Note: 1. CMD0 with argument 0xFFFFFFFA 14

15 Linux Implementation Linux Implementation Writing Data in the Boot Area This section describes how to access the boot area to write data to and how to configure the boot partition with emmcparm. To enable write access to /dev/mmcblkxbooty, first disable the forced read-only system file force_ro as follows: # echo 0 > /sys/block/mmcblk0boot0/force_ro Next, check that the file content is 0. This enables the boot area for the WRITE operation: # cat /sys/block/mmcblk0boot0/force_ro 0 Finally, it is possible to write to "mmcblk0boot0." 15

16 Using emmcparm to Configure the Boot Partition It is possible to use the tools available in usr/technical_note/tn-fc-06_booting_from_embedded_mmc to configure the boot partitions: $ ll total 32 drwxrwxr-x 2 rah rah 4096 feb 28 09:59./ drwxrwxr-x 4 rah rah 4096 feb 28 08:47../ -rw-rw-r-- 1 rah rah 332 feb 28 09:20 0_config_boot_bus_conditions.csv -rw-rw-r-- 1 rah rah 332 feb 28 09:10 1_config_boot_wp.csv -rw-rw-r-- 1 rah rah 757 feb 28 09:18 2_config_boot_partition.csv -rwxrwxr-x 1 rah rah 4548 feb 28 09:55 config_boot_area.sh* The following command is used to configure the BOOT_BUS_CONDITIONS (before BOOT_BUS_WIDTH) EXT_CSD [177] register: $ sudo emmcparm -c 0_config_boot_bus_conditions.csv The following command is used to configure the BOOT_WP EXT_CSD [173] register: $ sudo emmcparm -c 1_config_boot_wp.csv The following command is used to configure the PARTITION_CONFIG EXT_CSD [179] register: $ sudo emmcparm -c 2_config_boot_partition.csv The following command is used to run all the three options above: #./config_boot_area.sh* Linux Implementation 16

17 Revision History Revision History Rev. E 03/18 Rev. D 04/13 Rev. C 10/12 Rev. B 6/12 Rev. A 5/12 Revised the document to make it valid for all e.mmc versions. Added Linux Implementation section. Revised boot features with the following: Latency is less when booting from the boot partition than when booting from the user area. Updated Boot Partitions section. Updated TN number. Removed Boot Size vs. User Size table. Updated the Booting a System from an e.mmc Device section. Initial release S. Federal Way, P.O. Box 6, Boise, ID , Tel: Sales inquiries: Micron and the Micron logo are trademarks of Micron Technology, Inc. All other trademarks are the property of their respective owners. This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein. Although considered final, these specifications are subject to change, as further product development and data characterization sometimes occur. 17

Command Register Settings Description Notes

Command Register Settings Description Notes Technical Note e.mmc Automotive 5.0 Cache Features TN-FC-50: e.mmc Automotive 5.0 Cache Features Introduction Introduction This technical note introduces an optional cache feature defined in the e.mmc