Lecture 1: Introduction
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1 Lecture 1: Itroductio g Class orgaizatio Istructor cotact Course objectives ad outcomes Lectures outlie Laboratory outlie Gradig system Tetative schedule g Lab schedule g Itelliget sesor systems (ISS) Systems, sesors ad itelligece Defiitios of ISS Buildig blocks of ISS Itelliget Sesor Systems Ricardo Gutierrez-Osua Wright State Uiversity 1
2 Istructor cotact ad meetig times g Istructor Ricardo Gutierrez-Osua g Office: 401 Russ g Tel: g rgutier@cs.wright.edu g Office hours: MW 4:30-5:30 PM or by appoitmet g Meetig times Lectures g MW 5:35-6:50PM g Russ 406 Labs g To be determied g Russ 339 Itelliget Sesor Systems Ricardo Gutierrez-Osua Wright State Uiversity 2
3 Course Objectives ad Outcomes g The objectives of the course are to Itroduce the fudametals of itelliget sesor systems: sesors, istrumetatio ad patter aalysis Provide the studets with a itegrative ad multidiscipliary experiece by buildig a complete multi-sesor itelliget system Allow the studets to develop istrumetatio, data acquisitio ad patter aalysis software usig moder equipmet ad software tools g The outcome of the course is the ability to desig, aalyze ad implemet Basic istrumetatio ad sigal coditioig circuits for sesors Virtual istrumetatio ad data acquisitio software for sesors ad actuators Patter aalysis algorithms for multi-sesor systems Itelliget Sesor Systems Ricardo Gutierrez-Osua Wright State Uiversity 3
4 Lecture outlie g g g g SENSORS Primary sesig priciples ad measuremet variables Sesor performace characteristics ad termiology INSTRUMENTATION Trasducer measuremet circuits Sigal coditioig circuits Data coversio: DAC, ADC Virtual istrumetatio with LabVIEW PATTERN ANALYSIS Itroductio to Statistical Patter Recogitio Dimesioality reductio Classificatio Validatio Data aalysis with MATLAB INTELLIGENT SENSOR SYSTEMS Structure, defiitios ad cocepts Advaced processig ad cotrol techiques Smart sesors Case study: the electroic ose The future of itelliget sesor systems Itelliget Sesor Systems Ricardo Gutierrez-Osua Wright State Uiversity 4
5 Laboratory outlie g LAB I: Sesor iterfacig Temperature sesor calibratio Gas sesor isothermal excitatio g LAB II: Data acquisitio Virtual istrumet ad GUI desig Aalog ad digital I/O File I/O g LAB III: System itegratio Cotrol of electromechaical actuators Flow ijectio assembly Itegratio of cotrol, DAQ ad GUI modules g LAB IV: Patter aalysis Sigal preprocessig Dimesioality reductio Classificatio g LAB V: Advaced sesor excitatio Pulse Width Modulatio Temperature cyclig Aalysis of performace Itelliget Sesor Systems Ricardo Gutierrez-Osua Wright State Uiversity 5
6 Gradig System g Gradig will be straight scale A, B, C, D, below 60 F g Course grade will be the weighted sum of three grades Laboratory (60%) Midterm exam (15%) Fial exam (25%) g Exams Closed-books, closed-otes Oe double-sided, had-writte sheet (8.5 x 11'') will be allowed Tests will emphasize ew material Itelliget Sesor Systems Ricardo Gutierrez-Osua Wright State Uiversity 6
7 Tetative schedule (1) Week 1 Date Topic (Caledar) Assigmets 1/1 New Year s Day (No class) 1/3 Course Itroductio Week 6 Week 5 Week 4 Week 3 Week 2 1/8 Sesors I 1/10 Sesors II 1/15 Marti Luther Kig, Jr. Day (No class) 1/17 Istrumetatio I 1/22 Istrumetatio II 1/24 Istrumetatio III 1/29 LabVIEW 1/31 Istrumetatio IV 2/5 Midterm Review 2/7 Midterm Exam Lab 1 Sesor iterfacig Lab 2 Data acquisitio Lab3 System itegratio Itelliget Sesor Systems Ricardo Gutierrez-Osua Wright State Uiversity 7
8 Tetative schedule (2) Week 7 Week 8 2/12 Patter aalysis I 2/14 Patter aalysis II 2/19 MATLAB 2/21 Patter aalysis III Lab4 Patter aalysis Week 9 Week 10 Week 11 2/26 Patter aalysis IV 2/28 Patter aalysis V 3/5 Itelliget Sesor Systems I 3/7 Itelliget Sesor Systems II 3/12 3/14 Itelliget Sesor Systems III (Last day of class) Exams Week* (No class) Lab 5 Advaced sesor excitatio *Fial exam will be held Friday, March 16, 2001, from 5:30 to 7:30PM i Russ 406 Itelliget Sesor Systems Ricardo Gutierrez-Osua Wright State Uiversity 8
9 Itelliget Sesor Systems g System A combiatio of two or more elemets, subsystems ad parts ecessary to carry out oe or more fuctios [PAW91] To iteract with the real world, a system requires g Sesor g Sesors: iputs devices g Actuators: output devices g Processig: sigals, iformatio ad kowledge A device that receives ad respods to a stimulus [Fd97] g Itelligece g Stimulus: mechaical, thermal, magetic, electric, optical, chemical g Respose: a electrical sigal (i most cases) The ability to combie g A priori kowledge (available before experiece) ad g Adaptive learig (from experiece) Itelliget Sesor Systems Ricardo Gutierrez-Osua Wright State Uiversity 9
10 Itelliget Sesor Systems g Several defiitios are available A sesor that is capable of modifyig its iteral behavior to optimize the collectio of data from the exteral world [Whi97] g The cocepts of adaptatio ad compesatio are cetral to the Itelliget Sesor philosophy A device that combies a sesig elemet ad a sigal processor o a sigle itegrated circuit [PY95a] g The miimum requiremets of the sigal processor are ot clear [PY95b] Basic itegrated electroics (sigal coditioig, ADC) A micro-processor Logic fuctios ad decisio makig A smart sesor is a sesor that provides fuctios beyod those ecessary for geeratig a correct represetatio of a sesed or cotrolled quatity (IEEE ) [Fk00] g This fuctio typically simplifies the itegratio of the trasducer ito applicatios i a etworked eviromet g Itelliget or Smart Sesors? Itelliget Sesor Systems Ricardo Gutierrez-Osua Wright State Uiversity 10
11 Buildig blocks of Itelliget Sesors g The pricipal sub-systems withi a ISS are [BW96] Primary sesig elemet(s) Excitatio cotrol Amplificatio Aalogue filterig Data coversio Compesatio Digital iformatio processig Digital commuicatios processig Amp. Real Sesor world elemet(s) Exc. Aalog processig Data coversio Commuicatios Digital processig BUS Itelliget Sesor Systems Ricardo Gutierrez-Osua Wright State Uiversity 11
12 The E-ose: a model ISS Persoal computer + - Istrumetatio electroics Odor delivery Sesor array Itelliget Sesor Systems Ricardo Gutierrez-Osua Wright State Uiversity 12
13 Refereces [PAW91] [Fd97] [Whi97] [PY95a] [PY95b] [Fk00] [BW96] R. Pallas-Arey ad J. G. Webster, 1991, Sesors ad Sigal Coditioig, Wiley, New York J. Frade, 1997, Hadbook of Moder Sesors. Physics, Desigs ad Applicatios, AIP, Woodbury, NY N. White, 1997, Itelliget Sesors i Sesor Review 17(2), pp E. T. Power ad F. Yalcikaya, 1995, Itelliget sesors: structure ad system, i Sesor Review 15(3), pp E. T. Power ad F. Yalcikaya, 1995, From basic sesors to itelliget sesors: defiitios ad examples, i Sesor Review 15(4), pp R. Frak, 2000, Uderstadig Smart Sesors, Artech, Bosto, MA. J. Brigell ad N. White, 1996, Itelliget Sesor Systems, 2 d Ed., IOP, Bristol, UK. Itelliget Sesor Systems Ricardo Gutierrez-Osua Wright State Uiversity 13
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