Computer Systems - HS

Transcription

1 What have we leared so far? Computer Systems High Level ENGG1203 2d Semester, Applicatios Sigals Systems & Cotrol Systems Computer & Embedded Systems Digital Logic Combiatioal Logic Sequetial Logic Circuits Basic Circuit Theory Electrical Sigals Voltage, Curret Power & Eergy Dr. Hayde So Departmet of Electrical ad Electroic Egieerig Low Level 2d sem, Computer i the 60s Src: 2d sem, Computer Systems - HS 2 Today s Computer DEC s PDP-10 Computer Systems - HS 3 2d sem, Computer Systems - HS 4

2 3 Classes of Computers Desktop Computer Desktop Most people s everyday ecouter to computers Server Embedded System Sigifies by the rise of persoal computer (PC) i the early 1990s Typical examples: Domiate the Future PC with a tower Notebook computers Apple imac, Mac Pro Same fudametal priciple of operatio, but with differet desig optimizatios ad tradeoffs. 2d sem, Computer Systems - HS 5 Embedded Systems i.e. Computer systems as compoets Perform simple, dedicated fuctios as part of a larger system Limited resources Processig power Memory Storage 2d sem, Netbook Nettop Tablet Smart Phoes 2d sem, Computer Systems - HS Embedded systems everywhere Perform far more tha simple, dedicated tasks Not so limited resources Cost & power cosumptio are major desig cocers Cost & power cosumptio are major desig cocers Computer Systems - HS 6 Moder Embedded Systems A computer system embedded withi a larger system Post-PC Era 7 2d sem, Computer Systems - HS 8

3 Server Icludes may of the most powerful computers i operatios Most moder servers are implemeted usig highly parallel multiprocessor systems Super computer Computer cluster Usually accessed oly through etwork Resposible for the most demadig computig eeds Web, video streamig Dataceter Scietific computatios Fiacial computatios Google hadles > 1 billio searches per day 2d sem, Computer Systems - HS 9 Warehouse Scale Computer A ew class of computer for massively parallel cluster of computers Dataceter as a computer ~100,000 servers iclude desig choices i electrical, electroic ad buildig costructio Exploit service level parallelism Desiged for cloud-based services 2d sem, Computer Systems - HS 10 The Big Challege Performace Power/ Eergy Geerally speakig, power cosumptio icreases with performace Techical challege: fid ways to improve performace without sigificat icrease to power TOP500 Gree d sem, Computer Systems - HS 11 2d sem, Computer Systems - HS 12

4 Stored Program Architecture Sometimes called the vo Neuma architecture Named after Joh vo Neuma Taleted mathematicia Key perso behid the developmet of EDVAC i the 1940s A stored-program computer stores both program istructio ad data i the same memory storage; performs computatio by executig istructios stored i the memory Stored-Program Computer Get the curret istructio Execute the istructio Determies the ext istructio to fetch 2d sem, Computer Systems - HS 13 2d sem, Computer Systems - HS 14 Ex: Calculatig Class Grades* grade = 0.1 lab mt +0.3 hw proj; grade = 0; tmp = 0.1 lab; grade = grade + tmp; tmp = 0.2 mt; grade = grade + tmp; tmp = 0.3 hw; grade = grade + tmp; tmp = 0.4 proj; grade = grade + tmp; *This is ot how we are goig to calculate your grades Time 2d sem, Computer Systems - HS 15 Calculatio i Processors 0.1 lab tmp grade clock cycle lab tmp grade + clock cycle mt tmp grade Values are loaded from memory ito CPU for computatio Results are stored back to memory CPU performs differet computatio o each cycle: 1 st cycle: x, 2 d cycle +, Oe operatio per cycle TIME As may cycle as eeded to complete applicatio clock cycle 3 2d sem, Computer Systems - HS mt tmp grade 0.4 proj + + tmp grade clock cycle 0.4 proj tmp grade

5 5 Classic Compoets of a Computer Computatio CPU 1. Cotrol path 2. Data path Computers as Electroic Systems Iput Process Output Memory Memory 3. Memory Iput Datapath Output Iteract with outside world I/O 4. Iput 5. Output Cotrol 2d sem, Computer Systems - HS 17 2d sem, Computer Systems - HS 18 Iput/Output The iterface betwee a computer ad the outside world Iterface with huma keyboard, mouse, speaker, microphoe, display touch scree, webcam Iterface with other computers Network coectios: WiFi, Etheret, Bluetooth, etc Permaet storage Harddisk Memory Stores istructios ad data Istructios: Cotrol the operatio of the CPU Obtaied from a user s software program through a process called compilatio. Data User iput Temporary data Computed output e.g. d = (a + b) c Iput data: values of a,b,c Temp data: (a+b) Output data: d 2d sem, Computer Systems - HS 19 2d sem, Computer Systems - HS 20

6 The CPU Cetral Processig Uit Cotrols the operatios of all parts of the system Arithmetic operatios Decisio makig A physical CPU (such as oe you buy from Itel or AMD) may iclude fuctios of other parts of the system Part of the memory system Part of I/O Two parts of the CPU Datapath The hardware portio that is eeded to carry out the operatios required by the processor (The muscles of the CPU) Cotrol The hardware portio that cotrols the operatios of the datapath (The brai of the CPU) I this course, CPU refers to just its core fuctio 2d sem, Computer Systems - HS 21 2d sem, Computer Systems - HS 22 CPU Datapath The datapath of a CPU performs the actual computatio Typical fuctios: Arithmetic: + Bit operatios: shift left/right, bitwise AND, OR Compariso: < > = Usually performed usig a Arithmetic ad Logical Uit (ALU) iside the CPU ALU ca be set to perform ay oe of the predefied fuctios Cotrolled accordig to istructio CPU Cotrol Determies what to do based o Istructio Result of previous computatio Iteral cotrol Determies the fuctio of the ALU based o the give istructio Determies if ad whe should a memory read/write be performed Determies if the CPU should perform a reset of the datapath Typical cotrol-related istructios Brachig: determies the ext istructio to fetch from the memory Memory operatios: load/store data from memory 2d sem, Computer Systems - HS 23 2d sem, Computer Systems - HS 24

7 Quick Summary: Reality Check Multi-Core CPU Datapath + Cotrol Memory (cache) I/O 2d sem, Computer Systems - HS 25 Itel Lyfield processor (source: AadTech) 2d sem, Computer Systems - HS 26 Represetig Numbers Negative Itegers No-Negative Itegers (Lecture 2) Negative Real Numbers No-Negative Real Numbers 2d sem, Computer Systems - HS 27 2d sem, Computer Systems - HS 28

8 Number Systems Huma teds to use a base 10 system a decimal umber system Biary umber system represets umbers i base 2 E.g.: = Hexadecimal umber system represets umbers i base 16 E.g.: = Used i computers together with base 2 system Easy coversio betwee hex ad bi Ca be thought as a shorthad for biary system Dec Bi Hex A B C D E F Biary ßà Hexadecimal From right to left, each group of 4 bits i biary form oe digit i hex represetatio Similarly, each hex digit expads ito 4 biary digits Example: = 2A3 16 3C 16 = Dec Bi Hex A B C D E F 2d sem, Computer Systems - HS 29 2d sem, Computer Systems - HS 30 From Decimal to Bi/Hex Ca similarly be foud usig short divisio : Successively divide the divided by the base (2 or 16) Ed whe remaider < base The remaiders form the umber i the resultig system whe couted from the bottom Example: Coverts ito hexadecimal umber D è = 14D 16 From Bi/Hex to Decimal The value of a biary/hexadecimal umber ca similarly be calculated as: 1 i=0 B i d i where d i is the value of digit at positio i coutig from the least sigificat digit (right-most) as 0, ad B is the base of the umber system = = = 23 3C4 16 = = = 964 2d sem, Computer Systems - HS 31 2d sem, Computer Systems - HS 32

9 Usiged Numbers Represet o-egative biary umbers (0, 1, 2, 3, ) usig their atural biary represetatios A -bit bitstrig ca represet umbers i "0, # 2 1$ % Represets equally spaced itegers o the umber lie Value Biary Bitstrig (8- bit) d sem, Computer Systems - HS 33 Negative Itegers Q: How do we represet the value of egative twety three i decimal? A: -23 Q: How do we represet the value of egative twety three i biary? A: Q: How do we represet the value of egative twety three i computers? A: Sig-Magitude 1 s complemet 2 s complemet 2d sem, Computer Systems - HS 34 Siged-Magitude Represetatio Add a sig bit to a bitstrig to represet the sig of a iteger E.g. Use a 1 to represet egative, 0 to represet positive ; A -bit bitstrig ca represet umbers i [ (2 1 1), 2 1 1] Pros: Easy to uderstad Cos: Two zeros Difficult to perform calculatio o values of differet sigs Patter Sig-Mag values Usiged values 2d sem, Computer Systems - HS Addig Sig-Magitude Numbers Record the sig A + B yes Apped the stored sig Start Same sig? Doe Record the sig of A A - B A is +ve? Ivert the sig of result 2d sem, Computer Systems - HS 36 yes o

10 1 s complemet To fid the egative of positive umber, apply bitwise NOT operatio to all bits E.g., with 8-bit umbers: A -bit bitstrig ca represet umbers i the rage [ (2 1 1), 2 1 1] Pros: Additio easier tha sig-mag Cos: Still has 2 zeros Patter 1 s comp Usiged values Sig-Mag values o Additio with 1 s complemet Start A + B Carry out? Doe yes Add 1 Ex. [eg + pos] : (-3) + 5 = = = ß carry out. Add 1 = 0010 Ex [eg + eg], A + B < 2 (-1) (-3) + (-2) = = = ß carry out. Add 1 = d sem, Computer Systems - HS 37 2d sem, Computer Systems - HS 38 Two s Complemet (1) Negative umbers are represeted by the 2 s complemet of the absolute value of that umber 2 s complemet of a -bit umber v is the value 2 - v For example, to represet value -3 usig a 4- bit bitstrig: = 16-3 = Two s complemet (2) 2 s complemet of a umber ca be obtaied by addig 1 to the 1 s complemet of the umber Origial s complemet s complemet The value of a bitstrig { b 1 b 2 b 0 } i 2 s complemet ca be calculated as: i= 0 Rage: Note that is asymmetric 2 i b i [ 2 1, 2 1 1] 2d sem, Computer Systems - HS 39 2d sem, Computer Systems - HS 40

11 Additio with 2 s complemet Start A + B Doe Ex. [eg + pos] : (-3) + 5 = = = 0010 ß igore carry out Ex [eg + eg], A + B < 2 (-1) (-3) + (-2) = = = 1011 Number Represetatio Summary Patter Usiged values Sig-Mag values 1 s comp 2 s comp d sem, Computer Systems - HS 41 2d sem, Computer Systems - HS 42 Subtractio i Computers To subtract two umbers i computer, a aïve way is to follow the stadard way of borrowig i decimal subtractio A smart way to do subtractio is to use the existig additio fuctio i the ALU A B = A + (-B) As log as we ca fid the egative value of a umber Subtractio usig Additio Recall that to fid the egative of a umber usig 2 s complemet, oe should 1. egate all the bits (1à0, 0à1) 2. Add 1 Sice egatig the bits is easy, ad we have a ALU that is capable of performig a add, we ca simply reuse the existig add hardware 2 s complemet represetatio makes it trivial 2d sem, Computer Systems - HS 43 2d sem, Computer Systems - HS 44

12 Coceptual Add/Sub Block Diagram A B A B Neg? issubtract Neg? issubtract A B A xor B C + C 1 or 0 + C carry i Recall that carry i is simply the 3 rd iput to a adder d sem, Computer Systems - HS 45 2d sem, Computer Systems - HS 46 Few Notes About Itegers Note that the very same bitstrig may represet completely differet values depedig o how you iterpret it Oly 2 s complemet represetatios allow direct additio/subtractio betwee +ve ad ve umbers without first detectig the sig I order to represet ve umbers, there must be a agreed-upo width Most moder computers represet itegers as 2 s complemets - Represetig Numbers Negative Itegers Negative Real Numbers No-Negative Itegers (Lecture 2) No-Negative Real Numbers 2d sem, Computer Systems - HS 47 2d sem, Computer Systems - HS 48

13 Real Numbers How to represet real umbers i biary? 0.37, 2/5, Recall how do you represet twety six poit five i decimal The digits to the left of the decimal poit have weights 10 0, 10 1,, ad the digits to the right of the decimal poit have 10-1,10-2 i.e., 26.5 Decimal poit 26.5 = But how do we represet 26.5 i biary? Biary Poit A biary poit represets the coefficiet of term 2 0 = 1. Coefficiets to the left of the biary poit have weights 2 0, 2 1, 2 2 Coefficiets to the right of the biary poit have weight 2-1, 2-2, 2-3 For example, the umber represets: = = d sem, Computer Systems - HS 49 2d sem, Computer Systems - HS 50 Floatig Poit Numbers A floatig poit umber embeds the biary poit locatio withi the umber represetatio Expoet: locatio of BP Value: = Sigificad: value Similar to the traditioal scietific otatio, except i biary Sigificad s 2 e Expoet IEEE Floatig Poit Number A stadard way to represet floatig poit umber for cross-platform compatibility IEEE 754 stadard is the most widely used floatig poit stadard Sigle precisio (32-bit) Double precisio (64-bit) Defies: Number represetatio format Exceptioal values (e.g. NaN) Roudig rules 2d sem, Computer Systems - HS 51 2d sem, Computer Systems - HS 52

14 IEEE 754 umber format (SP) IEEE Floatig Poit (SP,DP) Sigle precisio values: expoet 32-bit wide MSB is sig bit Sig-magitude represetatio Expoet is 8 bit wide Bias-127 (excess-127) for e < FF used for sub-ormal (small) umbers FF used for NaN & sigificad Sigificad is 23 bit wide Usually ormalized i the form 1.xxxxxxxx But may represet 0.xxxxxxx if expoet is Expoet Sigificad = 0 Sigificad 0 Equatio 00 0 Subormal -1 s sigificad 01 FE Normalized values -1 s 2 (e-127) 1.sigificad FF ± NaN Double precisio has similar format, but with 64 bits: Expoet: 11bits (biased 1023) Sigificad: 52bits Expoet Sigificad = 0 Sigificad 0 Equatio Subormal -1 s sigificad 001 7FE Normalized values -1 s 2 (e-1023) 1.sigificad 7FF ± NaN 2d sem, Computer Systems - HS 53 2d sem, Computer Systems - HS 54 Floatig Poit No-Associativity (a + b)+ c a + (b + c) The order of calculatio affects the results i floatig poit umbers Occurs due to limited size i siificad error due to roudig Associativity Example (Decimal) ! ! ! (rouded)! ! ! (rouded)! ! ! ! ! ! ! (rouded)! 2d sem, Computer Systems - HS 55 2d sem, Computer Systems - HS 56

15 Floatig Poit Number Lie Floatig poit umbers are ot uiformly distributed i the umber lie Deser as the magitude gets smaller Iteger Floatig Poit 2 e k k depeds o actual implemetatio (3 i this drawig) 8 I coclusio 3 classes of moder computer Servers most powerful Desktop stadard Embedded processors power ad cost coscious 5 compoets of a computer CPU: datapath + cotrol Memory I/O Numbers are represeted as biary bit strigs i computers 2 s complemet is the most commo way to represet +ve/-ve itegers i computers Adder/Subtractor desigs are highly similar with 2 s comp rep Floatig poit umbers represet real-umbers 2d sem, Computer Systems - HS 57 2d sem, Computer Systems - HS 58