Week 10 Assignment. The due date for submitting this assignment has passed.

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1 X Courses» Microprocessors and Microcontrollers Unit 11 - Week 10 Announcements Course Ask a Question Progress Mentor Course outline How to access the portal Week 10 Assignment The due date for submitting this assignment has passed. Submitted assignment Due on , 23:59 IST. Week 1 Week 2 Week 3 Week 4 Week 5 Week 6 Week 7 Week 8 Week 9 Week 10 Lecture 47 : ARM (Contd.) Lecture 48 : ARM (Contd.) Lecture 49 : PIC Lecture 50 : PIC, AVR Lecture 51 : AVR (Contd.) Quiz : Week 10 Assignment Week 10 : Lecture A project Material of Feedback for week 10 Week 10 The address range and the capacity of the data memory, respectively, of a PIC18F452 microcontroller are 1) 1 point Address Range: 00H FFH, Capacity: 256 bytes Address Range: 00H FFH, Capacity: 4096 bytes Address Range: 000H FFFH, Capacity: 256 bytes Address Range: 000H FFFH, Capacity: 4096 bytes Address Range: 000H FFFH, Capacity: 4096 bytes The widths of the address buses for program (APM) and data (ADM) memory, respectively, of the PIC18F family of microcontrollers are 2) 1 point APM: 21 bits, ADM: 21 bits APM: 21 bits, ADM: 12 bits APM: 12 bits, ADM: 21 bits APM: 12 bits, ADM: 12 bits APM: 21 bits, ADM: 12 bits The widths of the data buses for program (DPM) and data (DDM) memory, respectively, of the PIC18F family of microcontrollers are 3) 1 point DPM: 8 bits, DDM: 8 bits DPM: 8 bits, DDM: 16 bits 2014 NPTEL - Privacy & Terms - Honor Code - FAQs - DPM: 16 bits, DDM: 8 bits DPM: 16 bits, DDM: 16 bits In association with Funded by 1 of 5 Wednesday 16 May :00 PM

2 Assignment Answers Week 11 Week 12 DOWNLOAD VIDEOS Powered by DPM: 16 bits, DDM: 8 bits Which of the following input/output (I/O) pins in a PIC18F microcontroller can also be configured with Capture2 input/capture2 output/pwm output (CCP2) functionality? 4) 1 point RB3 RB2 RA3 RA2 RB3 Which of the following binary encodings is equivalent to the MOVLW 0x0E instruction in a PIC18F microcontroller? 5) 1 point Which of the following features are correctly mentioned with respect to an AVR AT90S2313 microcontroller? 6) 1 point 2K bytes of In-System Programmable Flash, 128 bytes SRAM 2K bytes of In-System Programmable Flash, 256 bytes SRAM 4K bytes of In-System Programmable Flash, 128 bytes SRAM 4K bytes of In-System Programmable Flash, 256 bytes SRAM 2K bytes of In-System Programmable Flash, 128 bytes SRAM Which of the following represents the correct combination of X-, Y-, and Z-registers in an AVR microcontroller (<A, B> denotes concatenation of the registers A and B, where A is the higher byte register and B is the lower byte register)? 7) 1 point X-register: <R27, R26>, Y-register: <R29, R28>, Z-register: <R30, R31> X-register: <R27, R26>, Y-register: <R28, R29>, Z-register: <R31, R30> X-register: <R27, R26>, Y-register: <R29, R28>, Z-register: <R31, R30> X-register: <R26, R27>, Y-register: <R29, R28>, Z-register: <R31, R30> X-register: <R27, R26>, Y-register: <R29, R28>, Z-register: <R31, R30> 2 of 5 Wednesday 16 May :00 PM

3 The encoded op-code 0x0CCC corresponds to which of the following instructions in an AT90S2313 microcontroller? 8) 1 point ADD R0, R10 ADD R12, R6 ADD R10, R0 ADD R6, R12 ADD R6, R12 Which of the following instructions does not conform to register direct addressing in an AVR microcontroller? 9) 1 point EOR R23 ADD R0, R10 CLR R22 ST Z, R14 ST Z, R14 The widths of the Output Compare Registers in an AVR microcontroller for Timer 0 (OCR0) and Timer 1 (OCR1), respectively, are 10) 1 point OCR0: 8 bits, OCR1: 8 bits OCR0: 8 bits, OCR1: 16 bits OCR0: 16 bits, OCR1: 8 bits OCR0: 16 bits, OCR1: 16 bits OCR0: 8 bits, OCR1: 16 bits Which of the following statement(s) is/are TRUE, with respect to an ARM processor? STATEMENT 1: If memory is organized as 16-bit words, ARM code is 20% faster than THUMB STATEMENT 2: If memory is organized as 32-bit words, ARM code is 45% faster than THUMB STATEMENT 3: If memory is organized as 16-bit words, THUMB code is 45% faster than ARM STATEMENT 4: If memory is organized as 32-bit words, THUMB code is 40% faster than ARM 11) 1 point STATEMENT 1 Both STATEMENT 1 and STATEMENT 4 Both STATEMENT 2 and STATEMENT 3 Both STATEMENT 3 and STATEMENT 4 3 of 5 Wednesday 16 May :00 PM

4 Both STATEMENT 3 and STATEMENT 4 Which of the following statements is TRUE with respect to an ARM processor? 12) 1 point ARM has higher code density compared to THUMB THUMB code uses up to 30% more power than ARM code THUMB code, on an average, requires 30% less space THUMB has three address formats THUMB code, on an average, requires 30% less space Which of the following combinations should be used for the best cost and power efficiency, with respect to an ARM processor? 13) 1 point 16-bit memory and ARM instruction set 32-bit memory with THUMB code Which of the following combinations should be used for the best performance, with respect to an ARM processor? 14) 1 point 16-bit memory and ARM instruction set 32-bit memory with THUMB code The maximum number of SWI calls can be made in the THUMB instruction mode of an ARM processor is 15) 1 point of 5 Wednesday 16 May :00 PM

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