A block of memory (FlashROM) starts at address 0x and it is 256 KB long. What is the last address in the block?

Transcription

1 A block of memory (FlashROM) starts at address 0x and it is 256 KB long. What is the last address in the block? 1

2 A block of memory (FlashROM) starts at address 0x and it is 256 KB long. What is the last address in the block? 2

3 The 32-bit long integer variable my_int is stored in memory at address 0x200000AB Draw a memory diagram showing the bytes of my_int Write the code to load it into R0 3

4 One convention used in ARM-Cortex programming is that function parameters are passed in the registers R0- R3, and the return value is passed back to the main program in R0. Re-write the code below with the value of Num passed in R3, and the value of Num+25 passed back in R0. 4

5 3.3.5 Shifts Logical Shift Right LSR C 1<n<32 Arithmetic Shift Right ASR Logical Shift Left LSL Rotate Shift Right ROR Rotate Right Extended RRX 0 1<n<32 0<n<31 1<n<32 n=1 5

6 SHIFT/ROTATE INSTRUCTIONS LSR{S}{cond} Rd, Rm, Rs ;logical shift right Rd=Rm>>Rs (unsigned) LSR{S}{cond} Rd, Rm, #n ;logical shift right Rd=Rm>>n (unsigned) ASR{S}{cond} Rd, Rm, Rs ;arithmetic shift right Rd=Rm>>Rs (signed) ASR{S}{cond} Rd, Rm, #n ;arithmetic shift right Rd=Rm>>n (signed) LSL{S}{cond} Rd, Rm, Rs ;shift left Rd=Rm<<Rs (signed, unsigned) LSL{S}{cond} Rd, Rm, #n ;shift left Rd=Rm<<n (signed, unsigned) ROR{S}{cond} Rd, Rm, Rs ;rotate right ROR{S}{cond} Rd, Rm, #n ;rotate right RRX{S}{cond} Rd, Rm ;rotate right 1 bit with extension Typo in text: it s RRX, not RXX 6

7 Your turn! MOV R0, #0x What are the hex number stored in R0, and the C flag after each instruction? LSL R0, R0, #1 ROR R0, R0, #5 ASR R0, R0, #3 RRX R0, R0 LSR R0, R0, R1 7

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9 Hint: Remember these suffixes that LDR and STR can take: {type} Data type Meaning 32-bit word 0 to 4,294,967,295 or -2,147,483,648 to +2,147,483,647 B Unsigned 8-bit byte 0 to 255, Zero pad to 32 bits on load SB Signed 8-bit byte -128 to +127, Sign extend to 32 bits on load H Unsigned 16-bit halfword 0 to 65535, Zero pad to 32 bits on load SH Signed 16-bit halfword to , Sign extend to 32 bits on load D 64-bit data Uses two registers 9

10 Read and understand Example 3.3 /

11 ADD / SUBTRACT INSTRUCTIONS 11

12 3.3.6 Arithmetic unsigned C bit Cleared 128 C bit Set The carry bit C, is clear after an unsigned addition when the result is correct (no overflow). It is set when the result is incorrect (overflow). 12

13 C bit Set C bit Cleared The carry bit C, is set after an unsigned subtraction when the result is correct. It is clear when the result is incorrect. 13

14 Arithmetic signed V bit Cleared V bit Set The overflow bit V, is set after a signed addition or subtraction when the result is incorrect (overflow). It is clear when result is correct (no overflow) 14

15 Signed number wheel V bit Cleared V bit Set The overflow bit, V, is set when we cross over from 127 to -128 while adding or cross over from -128 to 127 while subtracting. 15

16 Your turn! When the subtraction (32 129) is performed in an 8-bit system what is the result and the status of the NZVC bits? 16

17 Your turn! When the subtraction (32 129) is performed in an 8-bit system what is the result and the status of the NZVC bits? Result: (unsigned) -97 (signed) NZVC: 1010 Conclusion: The V bit is actually correct: it indicates that -129 is overflow in two s complement1 If we intend this to be an unsigned operation, then the N bit should be tested! 17

18 EOL5 18

19 A block of memory (RAM) starts at address 0x and it is 4 KB long. What is the last address in the block? 19

20 Remember the 1-bit full adder circuit! 20

21 SKIP the circuit diagrams of the adder and subtractor on pp

22 Arithmetic Instructions 22

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25 Addition summary Let the result R be the result of the addition A+B. N bit is set if unsigned result is above or if signed result is negative. N = R 31 Z bit is set if result is zero V bit is set after a signed addition if result is incorrect V X 31 M31 & R31 X31 & M31 & & R C bit is set after an unsigned addition if result is incorrect 31 C X & X 31 M31 M31 & R31 R31 & 31 25

26 Subtraction summary Let the result R be the result of the subtraction A-B. N bit is set if unsigned result is above or if signed result is negative. N = R 31 Z bit is set if result is zero V bit is set after a signed subtraction if result is incorrect C bit is clear after an unsigned subtraction if result is incorrect V X 31 M31 & R31 X31 & M31 & C X 31 & M 31 & R M 31 & R 31 R 31 & 31 X 31 26

27 Problem The NZVC bits are not available in high-level languages (e.g. C) 27

28 Solutions The NZVC bits are not available in high-level languages (e.g. C) Use: Promotion/demotion, or Saturation arithmetic 28

29 Unsigned promotion Promotion involves increasing the precision of the input numbers, and performing the operation at that higher precision Example: decimal 8-bit 16-bit , ,0000,1110, , ,0000,0100, , ,0001,0010,

30 Unsigned promotion ok R < R=R unsigned add promote A to A promote B to B R =A +B R 16 overflow R > R=255 ok R > 0 16 R=R unsigned sub promote A to A promote B to B R =A -B R 16 underflow R < 0 16 R=0 end end 30

31 Unsigned ceiling & floor Unsigned add Unsigned sub R=A+B R=A-B C=0 Correct C C=1 Ceiling R= C C=0 Floor C=1 R=0 Correct end end 31

32 Signed promotion To promote a signed number, we duplicate the sign bit decimal 8-bit 16-bit , ,1111,1010, , ,0000,0100, , ,1111,0110,

33 Signed ceiling & floor signed add promote A to A promote B to B signed sub promote A to A promote B to B underflow R < R =A +B R 16 overflow R > underflow R < -128 R =A -B R = -128 R=127 R = -128 R=127 R=R 16 R=R R 16 overflow R > end end 33

34 Common errors Overflow result exceeds the range of number system promotion and ceiling/floor. Drop-out occurs after an integer right shift or a divide intermediate result loses the information divide last when performing multiple calculations E.g. 100 (N/51) (100 N)/51 34

35 Common errors Roundoff is the error that occurs as a result of an arithmetic operation by discarding the least significant bits of the result multiplication of two 64-bit mantissas yields a 128-bit product. Roundoff during addition and subtraction two n-bit numbers are added the result is n+1 bits Truncation is the error that occurs when a number is converted from one format to another. For example when a real number is converted to a short real format 35

36 Even though most C compilers automatically promote to a higher precision during the intermediate calculations, they do not check for overflow when demoting the result back to the original format. It s up to the programmer to write functions like the ones shown! 36

37 Multiply and Divide 32-BIT MULTIPLY/DIVIDE INSTRUCTIONS MUL{S}{cond} {Rd,} Rn, Rm MLA{cond} Rd, Rn, Rm, Ra MLS{cond} Rd, Rn, Rm, Ra UDIV{cond} {Rd,} Rn, Rm SDIV{cond} {Rd,} Rn, Rm ;Rd = Rn * Rm ;Rd = Ra + Rn*Rm ;Rd = Ra - Rn*Rm ;Rd = Rn/Rm unsigned ;Rd = Rn/Rm signed 64-BIT MULTIPLY INSTRUCTIONS UMULL{cond} RdLo, RdHi, Rn, Rm SMULL{cond} RdLo, RdHi, Rn, Rm UMLAL{cond} RdLo, RdHi, Rn, Rm SMLAL{cond} RdLo, RdHi, Rn, Rm ;Rd = Rn * Rm ;Rd = Rn * Rm ;Rd = Rd + Rn*Rm ;Rd = Rd + Rn*Rm Multiplication does not set C,V bits

38 Understand this code! Where could overflow occur? 38

39 Your turn! How can you detect if the multiplication results in overflow? Modify the code so the final result is made 0 in case of overflow. 39

40 Nested Subroutines ; Rand ; Return R0=a random number between ; 1 and 100. Call Random and then divide ; the generated number by 100 ; return the remainder+1 Rand100 PUSH {LR} ; SAVE Link BL Random ;R0 is a 32-bit random number LDR R1,=100 BL Divide ADD R0,R3,#1 POP {LR} ;Restore Link back BX LR POP {PC} ; Divide ; find the unsigned quotient and remainder ; Inputs: dividend in R0 ; divisor in R1 ; Outputs: quotient in R2 ; remainder in R3 ;dividend = divisor*quotient + remainder Divide UDIV R2,R0,R1 ;R2=R0/R1,R2 is quotient MUL R3,R2,R1 ;R3=(R0/R1)*R1 SUB R3,R0,R3 ;R3=R0%R1, ;R3 is remainder of R0/R1 BX LR ;return ALIGN END One function calls another, so LR must be saved

41 QUIZ: Subroutines 41

42 The Fetch-Execute Cycle 42

43 Microcontroller ICode bus PPB Harvard Arm Cortex TM -M3 processor Internal NVIC peripherals Instructions Flash ROM DCode bus System bus Data RAM Input ports Output ports Simplified vn model for the Cortex M3/M4 Princeton / vn 43

44 Read cycle 44

45 Read cycle What is different for a POP instruction? 45

46 Write cycle 46

47 Write cycle What is different for a PUSH instruction? 47

48 Read data 6 Fetch-execute cycle recap is stored in a register The text says here Data passes through the ALU see next slide 48

49 Source: ARM Cortex-M3 Introduction (link on our webpage) 49

50 Explanations in lab! 50

51 Read: Directives 51

52 Second homework for Ch.3 End-of-chapter: 27 Due: Thursday, Oct.17 52

53 FYI: Reset, Subroutines and Stack A Reset occurs immediately after power is applied and when the reset signal is asserted (Reset button pressed) The Stack Pointer, SP (R13) is initialized at Reset to the 32-bit value at location 0 (Default: 0x ) The Program Counter, PC (R15) is initialized at Reset to the 32-bit value at location 4 (Reset Vector) (Default: 0x ) The Link Register (R14) is initialized at Reset to 0xFFFFFFFF Thumb bit is set at Reset Processor automatically saves return address in LR when a subroutine call is invoked. User can push and pull multiple registers on or from the Stack at subroutine entry and before subroutine return.