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1 Politecnico di Torino - ICT School Analog and Telecommunication Electronics F4 - Actuator driving» Driving BJT switches» Driving MOS-FET» SOA and protection» Smart switches 30/05/ ATLCE - F DDC 2011 DDC 1
2 Lesson F4: Switch/actuator driving Using BJT switches Command ON/OFF state parameters Speed analysis Using MOS-FET switches Command ON/OFF state parameters Speed analysis Special applications Smart SW, Fail-safe SW, References: Any text on electronic devices and basic circuits 30/05/ ATLCE - F DDC 2011 DDC 2
3 Switch interfaces Goal: drive Power Switches from logic circuits Logic circuit parameters: V OH/L, I OH/L Load parameters Type: R, L, C, I, V Required V and I Transition time (overvoltage/current, EMC) Special requirements (Galvanic insulation, ) Power device parameters Configuration; High/Low side, floating V, I, P max; SOA Active device parameters (current gain, Vt, ) Dynamic behavior 30/05/ ATLCE - F DDC 2011 DDC 3
4 Low/High-side/floating switches Low side switch Load to Vs (positive), switch to GND Unidirectional current flow in the switch SW pins near GND, easy driving from standard logic devices High side switch Load to GND, switch to Vs (positive) Unidirectional current flow in the switch SW pins near Vs, needs voltage shift driving circuits Floating switch All switch pins at undefined voltage, undefined current flow Mostly used for low level analog (multiplexer, S/H, ) Special driving circuits 30/05/ ATLCE - F DDC 2011 DDC 4
5 BJT Power switch figures Limits Parameters 30/05/ ATLCE - F DDC 2011 DDC 5
6 Driving BJT to ON state ON: low CE voltage drop (Vcesat) Base current higher than Ic/β Take margins (forced β) High Ib low Vcesat 30/05/ ATLCE - F DDC 2011 DDC 6
7 Driving BJT to OFF state OFF: Collector current Ic = 0 Keep Ib = 0» Steer Icbo away from Base Sub-threshold or reverse bias of BE junction» Warning: reverse Vbe breakdown ( 5 V) Base drive circuits Enough Ib Limited Vber 30/05/ ATLCE - F DDC 2011 DDC 7
8 Switching transient in BJT Same problems as pn junctions Turn ON: can be fast Turn OFF: stored charge removal Look at base driving network 30/05/ ATLCE - F DDC 2011 DDC 8
9 BJT SOA Check for ON state Switching mus be fast to get high power dissipation only for short time Check for OFF state 30/05/ ATLCE - F DDC 2011 DDC 9
10 Power dissipation Full ON or full OFF power close to 0 Intermediate state (active area) V and I 0 Power dissipation Reduce duration of transients Fast switching fast slow V, I P D 30/05/ ATLCE - F DDC 2011 DDC 10
11 BJT low-side drive circuit With NPN BJT ON Emitter to GND, load on Collector Command to Base (close to GND) Ic= Vs/Rl Provide enough base current (Ib > Ic/β) If current gain too low» Darlington, additional external CC, parallel outputs OFF Bring base current to 0: sub-threshold or reverse bias Avoid BE reverse breakdown (typical 5 V) Avoid thermal runaway for Icbo multiplication 30/05/ ATLCE - F DDC 2011 DDC 11
12 BJT high-side drive circuit With NPN BJT Collector to Vs, Emitter to load: a CC configuration Command to Base» Close to Vs, requires level shift and supply > Vs Difficult to saturate the BJT (Vb > Vc) With PNP BJT Emitter to Vs, load on Collector, command to Base Command from a low-side switch (NPN to GND) + pullup; same levels as for low-side ON: enough base current, forced beta,. OFF: base current to 0: sub-threshold or reverse bias 30/05/ ATLCE - F DDC 2011 DDC 12
13 Driving BJT from CMOS logic circuits ON: If Vdd = 5, 3,3, 2.5 V Vh > 0,6V OK Provide enough base current» Increase base drive current: logic outputs in parallel» Increase current gain: darlington configuration Lower Vdd (1,8,.. 0,8V) may require additional devices OFF Vl< 0,6V» Provide a path for Icbo (resistor to GND) Drive other logic circuits? Verify logic compatibility of Vo Isolate with independent buffer 30/05/ ATLCE - F DDC 2011 DDC 13
14 BJT drive: numeric example Driver: CMOS with Vdd = 5 V Load: 2 A, 12 V Switch: TIP30 (NPN) Low-side High-side PNP device 30/05/ ATLCE - F DDC 2011 DDC 14
15 Lesson F4: Switch/actuator driving Using BJT switches Command ON/OFF state parameters Speed analysis Using MOS-FET switches Command ON/OFF state parameters Speed analysis Special applications Protection, isolation Smart switches & Automotive Fail-safe switches 30/05/ ATLCE - F DDC 2011 DDC 15
16 MOS Power switch parameters Limits 30/05/ ATLCE - F DDC 2011 DDC 16
17 MOS Power switch parameters Parameters 30/05/ ATLCE - F DDC 2011 DDC 17
18 MOS-FET Power switches Not the same device! 30/05/ ATLCE - F DDC 2011 DDC 18
19 Driving MOS-FET to ON state Left: linear I,V axis Rigth: log I, V 30/05/ ATLCE - F DDC 2011 DDC 19
20 Driving MOS-FET to OFF state Vgs < Vt (OFF) Id=0 (cutoff) Vgs > Vt (ON) Id=Vds/Rd (triode region) Rd depends on Vgs, Vds Temperature 30/05/ ATLCE - F DDC 2011 DDC 20
21 Switching transient in MOS-FET V GS charged through R G V GS > V th (A): Id = 0, charge Cgs V GS V DS I D V GS < V th, Active region (B) Id > 0; Voltage gain G to D Miller effect on Cgd (C multiply) Saturation (C): Charge Cgd Verified in lab experiment V DD V TH A B C I D V GS V DS t 30/05/ ATLCE - F DDC 2011 DDC 21
22 Gate ringing in MOS-FET Gate drive wire makes a LC resonator Low losses (no R) Step in control voltage may cause Gate overvoltage Add damping to Gate drive circuit Series resistor No static power loss 30/05/ ATLCE - F DDC 2011 DDC 22
23 SOA in MOS-FET No secondary breakdown Id limited by Rds 30/05/ ATLCE - F DDC 2011 DDC 23
24 MOS low-side drive circuit Load to Vs, SW to GND With n-mos device Source to GND, load on Drain Command to Gate (close to GND) ON: OFF: Vgs> Vt Vgs< Vt With p-mos device, control referred to Vs May require non-standard logic levels Add n-mos level translator 30/05/ ATLCE - F DDC 2011 DDC 24
25 MOS high-side drive circuit Load connected to GND, SW to Vs With n-mos device Source to load, Drain to Vs, CD configuration Command to Gate (close to Vs, requires level shift) With p-mos device, Source to Vs, load on Drain May require non-standard logic levels, Level translator with n-mos low side 30/05/ ATLCE - F DDC 2011 DDC 25
26 MOS switch drive from logic circuit Vt < Vh Direct drive Power devices have high Gate capacitance Fast transition to limit power dissipation High current drive (dynamic) for the Gate Special driving circuits Parasitic inductance of Gate wire combined with the capacitor makes a LC with high Q, and can cause high overvoltage on Gate Damping resistor close to gate 30/05/ ATLCE - F DDC 2011 DDC 26
27 Complementary high/low-side SW Low side SW to GND, high side SW to Vs, with complementary commands Similar to complementary final stage of power amp., but uses CE configuration (saturated amplifier) Similar to CMOS outputs (complementary CS stages) Protection from direct current paths during transients Protection from both-on Load to intermediate voltage Bidirectional current Load to GND/Vs Faster switching 30/05/ ATLCE - F DDC 2011 DDC 27
28 Floating load H bridge Floating load, with complementary drive on each side: H bridge Voltage and current reverse in the load 2x voltage, 4x power Two commands Active/OFF Direction Zero power consumption when load OFF Used also for amplifiers: steady state has no DC 30/05/ ATLCE - F DDC 2011 DDC 28
29 Floating switch A floating switch has both nodes at any voltage Used in S/H circuits, mux (analog), or pass gates (digital). Needs floating command signal MOS driving Floating Vgs source: control current flowing in a G-S resistor BJT driving Drive the base from a current source Diode bridge 30/05/ ATLCE - F DDC 2011 DDC 29
30 Lesson F4: Switch/actuator driving Using BJT switches Command ON/OFF state parameters Speed analysis Using MOS-FET switches Command ON/OFF state parameters Speed analysis Special applications Protection, isolation Smart switches & Automotive Fail-safe switches 30/05/ ATLCE - F DDC 2011 DDC 30
31 Galvanic isolation Power section isolated from control section Transformer Optocoupler Benefits for Safety EMC 30/05/ ATLCE - F DDC 2011 DDC 31
32 Smart switches ICs which include Interface (usually to standard logic) Protection (I, V, temperature, faults, ) Example: HITFET BTS 142D 30/05/ ATLCE - F DDC 2011 DDC 32
33 Automotive Smart Switch Automotive loads connected to GND high side SW ICs which include Interface (to some standard communication structure) Protection (I, V, temperature) Fault detection and signaling (open, short, ) Example: 30/05/ ATLCE - F DDC 2011 DDC 33
34 Fail-safe switch Guaranteed state in case of failure Safe-ON» Guarantee ON (e.g. satellite power)» Parallel of several SW Safe-OFF» Guarantee OFF (e.g. safety isolation)» Series of several SW 30/05/ ATLCE - F DDC 2011 DDC 34
35 Fault tolerant switch Guaranteed operation (ON/OFF), even in case of (limited) failure Single SW Single SW routine Single SW routine routine CPU pin CPU pin CPU pin SUPPLY A B ACTUATOR M C Fault-tolerant Power Switch Actuator 30/05/ ATLCE - F DDC 2011 DDC 35
36 Fault tolerant switch circuit 30/05/ ATLCE - F DDC 2011 DDC 36
37 Switch driver circuit 30/05/ ATLCE - F DDC 2011 DDC 37
38 BJT drive: lab experiment BJT switch Effects of forced beta (base overdrive) Measure Vcesat Switching speed for diodes and BJT Measure recovery time Compare various driving circuits MOS switch Gate charge analysis Drive a medium power load with BJT 5W lamp Compare PWM with linear power control 30/05/ ATLCE - F DDC 2011 DDC 38
39 Lesson F4: final test Summarize the electrical parameters of logic circuits. How can we guarantee that a BJT switch goes fully in ON state? How to bring a BJT switch in OFF state (and keep it safe)? Draw a circuit to drive a low-side BJT switch from a CMOS logic circuit. List relevant parameters for MOS transistors used as switches. Describe switching transients in MOS devices. Which are the boundaries of SOA for MOS power devices? Draw a circuit to drive a high-side MOS switch from a CMOS logic device Draw the circuit to drive a floating switch from a logic signal. 30/05/ ATLCE - F DDC 2011 DDC 39
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