Level 2: The Hardware World Chapters 4 and 5 (topics of other cs courses)

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1 Level 2: The Hardware World Chapters 4 and 5 (topics of other cs courses) Invitation to Computer Science, Java Version, Third Edition Chapter 4: The Building Blocks: Binary Numbers, Boolean Logic, and Gates Invitation to Computer Science, Java Version, Third Edition 1

2 Introduction Chapter 4 focuses on hardware design (also called logic design) How to represent and store information inside a computer How to use the principles of symbolic logic to design gates How to use gates to construct circuits that perform operations such as adding and comparing numbers, and fetching instructions Invitation to Computer Science, Java Version, Third Edition 3 The Binary Numbering System A computer s internal storage techniques are different from the way people represent information in daily lives Information inside a digital computer is stored as a collection of binary data Invitation to Computer Science, Java Version, Third Edition 4 2

Binary Representation of Numeric and Textual Information Binary numbering system Base-2 Built from ones and zeros Each position is a power of 2 1101 = 1 x 2 3 + 1 x 2 2 + 0 x 2 1 + 1 x 2 0 Decimal

3 Binary Representation of Numeric and Textual Information Binary numbering system Base-2 Built from ones and zeros Each position is a power of = 1 x x x x 2 0 Decimal numbering system Base-10 Each position is a power of = 3 x x x x 10 0 Invitation to Computer Science, Java Version, Third Edition 5 Figure 4.2 Binary-to-Decimal Conversion Table Invitation to Computer Science, Java Version, Third Edition 6 3

4 Figure 4.5 Digitization of an Analog Signal such as sound (a) Sampling the Original Signal (b) Recreating the Signal from the Sampled Values Invitation to Computer Science, Java Version, Third Edition 7 Figure 4.11 Simplified Model of a Transistor Invitation to Computer Science, Java Version, Third Edition 9 4

Boolean Logic and Gates: Boolean Logic Boolean logic describes operations on true/false values True/false maps easily onto bistable environment Boolean logic operations on electronic signals can be

5 Boolean Logic and Gates: Boolean Logic Boolean logic describes operations on true/false values True/false maps easily onto bistable environment Boolean logic operations on electronic signals can be built out of transistors and other electronic devices Invitation to Computer Science, Java Version, Third Edition 10 Figure 4.15 The Three Basic Gates and Their Symbols Invitation to Computer Science, Java Version, Third Edition 11 5

Computer Science, Java Version, Third Edition 12 22

6 Figure 4.19 Diagram of a Typical Computer Circuit Invitation to Computer Science, Java Version, Third Edition 12 Figure 4.22 One-Bit Compare-for-Equality Circuit Invitation to Computer Science, Java Version, Third Edition 13 6

7 Figure 4.28 A Two-Input Multiplexor Circuit Invitation to Computer Science, Java Version, Third Edition 14 Figure 4.29 A 2-to-4 Decoder Circuit Invitation to Computer Science, Java Version, Third Edition 15 7

8 Summary Digital computers use binary representations of data: numbers, text, multimedia Binary values create a bistable environment, making computers reliable Boolean logic maps easily onto electronic hardware Circuits are constructed using Boolean expressions as an abstraction Computational and control circuits can be built from Boolean gates Invitation to Computer Science, Java Version, Third Edition 16 Chapter 5: Computer Systems Organization Invitation to Computer Science, Java Version, Third Edition 8

Introduction Computer organization examines the computer as a collection of interacting functional units Functional units may be built out of the circuits already studied Higher level of abstraction

9 Introduction Computer organization examines the computer as a collection of interacting functional units Functional units may be built out of the circuits already studied Higher level of abstraction assists in understanding by reducing complexity Invitation to Computer Science, Java Version, Third Edition 19 Figure 5.1 The Concept of Abstraction Invitation to Computer Science, Java Version, Third Edition 20 9

The Components of a Computer System Von Neumann architecture has four functional units Memory Input/Output Arithmetic/Logic unit Control unit Sequential execution of instructions Stored

10 The Components of a Computer System Von Neumann architecture has four functional units Memory Input/Output Arithmetic/Logic unit Control unit Sequential execution of instructions Stored program concept Invitation to Computer Science, Java Version, Third Edition 21 Figure 5.2 Components of the Von Neumann Architecture Invitation to Computer Science, Java Version, Third Edition 22 10

Memory and Cache Information stored and fetched from memory subsystem Random access memory maps addresses to memory locations Cache memory keeps values currently in use in faster memory to

11 Memory and Cache Information stored and fetched from memory subsystem Random access memory maps addresses to memory locations Cache memory keeps values currently in use in faster memory to speed access times Invitation to Computer Science, Java Version, Third Edition 23 Figure 5.3 Structure of Random Access Memory Invitation to Computer Science, Java Version, Third Edition 24 11

12 Input/Output and Mass Storage Communication with outside world and external data storage Human interfaces: Monitor, keyboard, mouse Archival storage: Not dependent on constant power External devices vary tremendously from each other Invitation to Computer Science, Java Version, Third Edition 27 Figure 5.8 Overall Organization of a Typical Disk Invitation to Computer Science, Java Version, Third Edition 28 12

Input/Output and Mass Storage (continued) I/O controller Intermediary between central processor and I/O devices Processor sends request and data, then goes on with its work I/O controller interrupts

13 Input/Output and Mass Storage (continued) I/O controller Intermediary between central processor and I/O devices Processor sends request and data, then goes on with its work I/O controller interrupts processor when request is complete Invitation to Computer Science, Java Version, Third Edition 29 The Arithmetic/Logic Unit Actual computations are performed Primitive operation circuits Arithmetic (ADD) Comparison (CE) Logic (AND) Data inputs and results stored in registers Multiplexor selects desired output Invitation to Computer Science, Java Version, Third Edition 32 13

14 The Control Unit Manages stored program execution Task Fetch from memory the next instruction to be executed Decode it: Determine what is to be done Execute it: Issue appropriate command to ALU, memory, and I/O controllers Invitation to Computer Science, Java Version, Third Edition 35 Machine Language Instructions Can be decoded and executed by control unit Parts of instructions Operation code (op code) Unique unsigned-integer code assigned to each machine language operation Address fields Memory addresses of the values on which operation will work Invitation to Computer Science, Java Version, Third Edition 36 14

15 Figure 5.14 Typical Machine Language Instruction Format For example, add x, y, where the op code for add is 9 (decimal) x and y correspond to memory address of 99 and 100 Will have machine language instruction of Invitation to Computer Science, Java Version, Third Edition 37 Putting All the Pieces Together the Von Neumann Architecture Subsystems connected by a bus Bus: Wires that permit data transfer among them At this level, ignore the details of circuits that perform these tasks: Abstraction! Computer repeats fetch-decode-execute cycle indefinitely Invitation to Computer Science, Java Version, Third Edition 39 15

16 Figure 5.18 The Organization of a Von Neumann Computer Invitation to Computer Science, Java Version, Third Edition 40 Non-Von Neumann Architectures Physical limitations on speed of Von Neumann computers Non-Von Neumann architectures explored to bypass these limitations Parallel computing architectures can provide improvements; multiple operations occur at the same time Invitation to Computer Science, Java Version, Third Edition 41 16

Non-Von Neumann Architectures (continued) SIMD architecture Single instruction/multiple data Multiple processors running in parallel All processors execute same operation at one time Each processor

17 Non-Von Neumann Architectures (continued) SIMD architecture Single instruction/multiple data Multiple processors running in parallel All processors execute same operation at one time Each processor operates on its own data Suitable for vector operations Invitation to Computer Science, Java Version, Third Edition 42 Figure 5.21 A SIMD Parallel Processing System Invitation to Computer Science, Java Version, Third Edition 43 17

Non-Von Neumann Architectures (continued) MIMD architecture Multiple instruction/multiple data Multiple processors running in parallel Each processor performs its own operations on its own data

18 Non-Von Neumann Architectures (continued) MIMD architecture Multiple instruction/multiple data Multiple processors running in parallel Each processor performs its own operations on its own data Processors communicate with each other Invitation to Computer Science, Java Version, Third Edition 44 Figure 5.22 Model of MIMD Parallel Processing Invitation to Computer Science, Java Version, Third Edition 45 18

19 Summary Computer organization examines different subsystems of a computer: memory, input/output, arithmetic/logic unit, and control unit Machine language gives codes for each primitive instruction the computer can perform and its arguments Von Neumann machine: Sequential execution of a stored program Parallel computers improve speed by doing multiple tasks at one time Invitation to Computer Science, Java Version, Third Edition 46 Summary of Level 2 Focus on how to design and build computer systems Chapter 4 Binary codes Transistors Gates Circuits Invitation to Computer Science, Java Version, Third Edition 47 19

20 Summary of Level 2 (continued) Chapter 5 Von Neumann architecture Shortcomings of the sequential model of computing Parallel computers Invitation to Computer Science, Java Version, Third Edition 48 20

Chapter 5: Computer Systems Organization. Invitation to Computer Science, C++ Version, Third Edition

Chapter 5: Computer Systems Organization Invitation to Computer Science, C++ Version, Third Edition Objectives In this chapter, you will learn about: The components of a computer system Putting all the